1/*
  2 * Copyright 2016 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 */
 23// CZ Ucode Loading Definitions
 24#ifndef SMU_UCODE_XFER_CZ_H
 25#define SMU_UCODE_XFER_CZ_H
 26
 27#define NUM_JOBLIST_ENTRIES      32
 28
 29#define TASK_TYPE_NO_ACTION      0
 30#define TASK_TYPE_UCODE_LOAD     1
 31#define TASK_TYPE_UCODE_SAVE     2
 32#define TASK_TYPE_REG_LOAD       3
 33#define TASK_TYPE_REG_SAVE       4
 34#define TASK_TYPE_INITIALIZE     5
 35
 36#define TASK_ARG_REG_SMCIND      0
 37#define TASK_ARG_REG_MMIO        1
 38#define TASK_ARG_REG_FCH         2
 39#define TASK_ARG_REG_UNB         3
 40
 41#define TASK_ARG_INIT_MM_PWR_LOG 0
 42#define TASK_ARG_INIT_CLK_TABLE  1
 43
 44#define JOB_GFX_SAVE             0
 45#define JOB_GFX_RESTORE          1
 46#define JOB_FCH_SAVE             2
 47#define JOB_FCH_RESTORE          3
 48#define JOB_UNB_SAVE             4
 49#define JOB_UNB_RESTORE          5
 50#define JOB_GMC_SAVE             6
 51#define JOB_GMC_RESTORE          7
 52#define JOB_GNB_SAVE             8
 53#define JOB_GNB_RESTORE          9
 54
 55#define IGNORE_JOB               0xff
 56#define END_OF_TASK_LIST     (uint16_t)0xffff
 57
 58// Size of DRAM regions (in bytes) requested by SMU:
 59#define SMU_DRAM_REQ_MM_PWR_LOG 48 
 60
 61#define UCODE_ID_SDMA0           0
 62#define UCODE_ID_SDMA1           1
 63#define UCODE_ID_CP_CE           2
 64#define UCODE_ID_CP_PFP          3
 65#define UCODE_ID_CP_ME           4
 66#define UCODE_ID_CP_MEC_JT1      5
 67#define UCODE_ID_CP_MEC_JT2      6
 68#define UCODE_ID_GMCON_RENG      7
 69#define UCODE_ID_RLC_G           8
 70#define UCODE_ID_RLC_SCRATCH     9
 71#define UCODE_ID_RLC_SRM_ARAM    10
 72#define UCODE_ID_RLC_SRM_DRAM    11
 73#define UCODE_ID_DMCU_ERAM       12
 74#define UCODE_ID_DMCU_IRAM       13
 75
 76#define UCODE_ID_SDMA0_MASK           0x00000001       
 77#define UCODE_ID_SDMA1_MASK           0x00000002        
 78#define UCODE_ID_CP_CE_MASK           0x00000004      
 79#define UCODE_ID_CP_PFP_MASK          0x00000008         
 80#define UCODE_ID_CP_ME_MASK           0x00000010          
 81#define UCODE_ID_CP_MEC_JT1_MASK      0x00000020             
 82#define UCODE_ID_CP_MEC_JT2_MASK      0x00000040          
 83#define UCODE_ID_GMCON_RENG_MASK      0x00000080            
 84#define UCODE_ID_RLC_G_MASK           0x00000100           
 85#define UCODE_ID_RLC_SCRATCH_MASK     0x00000200         
 86#define UCODE_ID_RLC_SRM_ARAM_MASK    0x00000400                
 87#define UCODE_ID_RLC_SRM_DRAM_MASK    0x00000800                 
 88#define UCODE_ID_DMCU_ERAM_MASK       0x00001000             
 89#define UCODE_ID_DMCU_IRAM_MASK       0x00002000              
 90
 91#define UCODE_ID_SDMA0_SIZE_BYTE           10368        
 92#define UCODE_ID_SDMA1_SIZE_BYTE           10368          
 93#define UCODE_ID_CP_CE_SIZE_BYTE           8576        
 94#define UCODE_ID_CP_PFP_SIZE_BYTE          16768           
 95#define UCODE_ID_CP_ME_SIZE_BYTE           16768            
 96#define UCODE_ID_CP_MEC_JT1_SIZE_BYTE      384               
 97#define UCODE_ID_CP_MEC_JT2_SIZE_BYTE      384            
 98#define UCODE_ID_GMCON_RENG_SIZE_BYTE      4096              
 99#define UCODE_ID_RLC_G_SIZE_BYTE           2048             
100#define UCODE_ID_RLC_SCRATCH_SIZE_BYTE     132           
101#define UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE    8192                  
102#define UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE    4096                   
103#define UCODE_ID_DMCU_ERAM_SIZE_BYTE       24576               
104#define UCODE_ID_DMCU_IRAM_SIZE_BYTE       1024                 
105
106#define NUM_UCODES               14
107
108typedef struct {
109	uint32_t high;
110	uint32_t low;
111} data_64_t;
112
113struct SMU_Task {
114    uint8_t type;
115    uint8_t arg;
116    uint16_t next;
117    data_64_t addr;
118    uint32_t size_bytes;
119};
120typedef struct SMU_Task SMU_Task;
121
122struct TOC {
123    uint8_t JobList[NUM_JOBLIST_ENTRIES];
124    SMU_Task tasks[1];
125};
126
127// META DATA COMMAND Definitions
128#define METADATA_CMD_MODE0         0x00000103 
129#define METADATA_CMD_MODE1         0x00000113 
130#define METADATA_CMD_MODE2         0x00000123 
131#define METADATA_CMD_MODE3         0x00000133
132#define METADATA_CMD_DELAY         0x00000203
133#define METADATA_CMD_CHNG_REGSPACE 0x00000303
134#define METADATA_PERFORM_ON_SAVE   0x00001000
135#define METADATA_PERFORM_ON_LOAD   0x00002000
136#define METADATA_CMD_ARG_MASK      0xFFFF0000
137#define METADATA_CMD_ARG_SHIFT     16
138
139// Simple register addr/data fields
140struct SMU_MetaData_Mode0 {
141    uint32_t register_address;
142    uint32_t register_data;
143};
144typedef struct SMU_MetaData_Mode0 SMU_MetaData_Mode0;
145
146// Register addr/data with mask
147struct SMU_MetaData_Mode1 {
148    uint32_t register_address;
149    uint32_t register_mask;
150    uint32_t register_data;
151};
152typedef struct SMU_MetaData_Mode1 SMU_MetaData_Mode1;
153
154struct SMU_MetaData_Mode2 {
155    uint32_t register_address;
156    uint32_t register_mask;
157    uint32_t target_value;
158};
159typedef struct SMU_MetaData_Mode2 SMU_MetaData_Mode2;
160
161// Always write data (even on a save operation)
162struct SMU_MetaData_Mode3 {
163    uint32_t register_address;
164    uint32_t register_mask;
165    uint32_t register_data;
166};
167typedef struct SMU_MetaData_Mode3 SMU_MetaData_Mode3;
168
169#endif