1/*
 2 * Clock driver for the ARM RealView boards
 3 * Copyright (C) 2012 Linus Walleij
 4 *
 5 * This program is free software; you can redistribute it and/or modify
 6 * it under the terms of the GNU General Public License version 2 as
 7 * published by the Free Software Foundation.
 8 */
 9#include <linux/clkdev.h>
10#include <linux/err.h>
11#include <linux/io.h>
12#include <linux/clk-provider.h>
13
14#include "clk-icst.h"
15
16#define REALVIEW_SYS_OSC0_OFFSET             0x0C
17#define REALVIEW_SYS_OSC1_OFFSET             0x10
18#define REALVIEW_SYS_OSC2_OFFSET             0x14
19#define REALVIEW_SYS_OSC3_OFFSET             0x18
20#define REALVIEW_SYS_OSC4_OFFSET             0x1C	/* OSC1 for RealView/AB */
21#define REALVIEW_SYS_LOCK_OFFSET             0x20
22
23/*
24 * Implementation of the ARM RealView clock trees.
25 */
26
27static const struct icst_params realview_oscvco_params = {
28	.ref		= 24000000,
29	.vco_max	= ICST307_VCO_MAX,
30	.vco_min	= ICST307_VCO_MIN,
31	.vd_min		= 4 + 8,
32	.vd_max		= 511 + 8,
33	.rd_min		= 1 + 2,
34	.rd_max		= 127 + 2,
35	.s2div		= icst307_s2div,
36	.idx2s		= icst307_idx2s,
37};
38
39static const struct clk_icst_desc realview_osc0_desc __initconst = {
40	.params = &realview_oscvco_params,
41	.vco_offset = REALVIEW_SYS_OSC0_OFFSET,
42	.lock_offset = REALVIEW_SYS_LOCK_OFFSET,
43};
44
45static const struct clk_icst_desc realview_osc4_desc __initconst = {
46	.params = &realview_oscvco_params,
47	.vco_offset = REALVIEW_SYS_OSC4_OFFSET,
48	.lock_offset = REALVIEW_SYS_LOCK_OFFSET,
49};
50
51/*
52 * realview_clk_init() - set up the RealView clock tree
53 */
54void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176)
55{
56	struct clk *clk;
57
58	/* APB clock dummy */
59	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, 0, 0);
60	clk_register_clkdev(clk, "apb_pclk", NULL);
61
62	/* 24 MHz clock */
63	clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, 0, 24000000);
64	clk_register_clkdev(clk, NULL, "dev:uart0");
65	clk_register_clkdev(clk, NULL, "dev:uart1");
66	clk_register_clkdev(clk, NULL, "dev:uart2");
67	clk_register_clkdev(clk, NULL, "fpga:kmi0");
68	clk_register_clkdev(clk, NULL, "fpga:kmi1");
69	clk_register_clkdev(clk, NULL, "fpga:mmc0");
70	clk_register_clkdev(clk, NULL, "dev:ssp0");
71	if (is_pb1176) {
72		/*
73		 * UART3 is on the dev chip in PB1176
74		 * UART4 only exists in PB1176
75		 */
76		clk_register_clkdev(clk, NULL, "dev:uart3");
77		clk_register_clkdev(clk, NULL, "dev:uart4");
78	} else
79		clk_register_clkdev(clk, NULL, "fpga:uart3");
80
81
82	/* 1 MHz clock */
83	clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, 0, 1000000);
84	clk_register_clkdev(clk, NULL, "sp804");
85
86	/* ICST VCO clock */
87	if (is_pb1176)
88		clk = icst_clk_register(NULL, &realview_osc0_desc,
89					"osc0", NULL, sysbase);
90	else
91		clk = icst_clk_register(NULL, &realview_osc4_desc,
92					"osc4", NULL, sysbase);
93
94	clk_register_clkdev(clk, NULL, "dev:clcd");
95	clk_register_clkdev(clk, NULL, "issp:clcd");
96}