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1/*
2 * Copyright (C) 1995 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * Gareth Hughes <gareth@valinux.com>, May 2000
6 */
7
8/*
9 * This file handles the architecture-dependent parts of process handling..
10 */
11
12#include <linux/stackprotector.h>
13#include <linux/cpu.h>
14#include <linux/errno.h>
15#include <linux/sched.h>
16#include <linux/fs.h>
17#include <linux/kernel.h>
18#include <linux/mm.h>
19#include <linux/elfcore.h>
20#include <linux/smp.h>
21#include <linux/stddef.h>
22#include <linux/slab.h>
23#include <linux/vmalloc.h>
24#include <linux/user.h>
25#include <linux/interrupt.h>
26#include <linux/delay.h>
27#include <linux/reboot.h>
28#include <linux/init.h>
29#include <linux/mc146818rtc.h>
30#include <linux/module.h>
31#include <linux/kallsyms.h>
32#include <linux/ptrace.h>
33#include <linux/personality.h>
34#include <linux/tick.h>
35#include <linux/percpu.h>
36#include <linux/prctl.h>
37#include <linux/ftrace.h>
38#include <linux/uaccess.h>
39#include <linux/io.h>
40#include <linux/kdebug.h>
41#include <linux/cpuidle.h>
42
43#include <asm/pgtable.h>
44#include <asm/system.h>
45#include <asm/ldt.h>
46#include <asm/processor.h>
47#include <asm/i387.h>
48#include <asm/desc.h>
49#ifdef CONFIG_MATH_EMULATION
50#include <asm/math_emu.h>
51#endif
52
53#include <linux/err.h>
54
55#include <asm/tlbflush.h>
56#include <asm/cpu.h>
57#include <asm/idle.h>
58#include <asm/syscalls.h>
59#include <asm/debugreg.h>
60
61asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
62
63/*
64 * Return saved PC of a blocked thread.
65 */
66unsigned long thread_saved_pc(struct task_struct *tsk)
67{
68 return ((unsigned long *)tsk->thread.sp)[3];
69}
70
71#ifndef CONFIG_SMP
72static inline void play_dead(void)
73{
74 BUG();
75}
76#endif
77
78/*
79 * The idle thread. There's no useful work to be
80 * done, so just try to conserve power and have a
81 * low exit latency (ie sit in a loop waiting for
82 * somebody to say that they'd like to reschedule)
83 */
84void cpu_idle(void)
85{
86 int cpu = smp_processor_id();
87
88 /*
89 * If we're the non-boot CPU, nothing set the stack canary up
90 * for us. CPU0 already has it initialized but no harm in
91 * doing it again. This is a good place for updating it, as
92 * we wont ever return from this function (so the invalid
93 * canaries already on the stack wont ever trigger).
94 */
95 boot_init_stack_canary();
96
97 current_thread_info()->status |= TS_POLLING;
98
99 /* endless idle loop with no priority at all */
100 while (1) {
101 tick_nohz_stop_sched_tick(1);
102 while (!need_resched()) {
103
104 check_pgt_cache();
105 rmb();
106
107 if (cpu_is_offline(cpu))
108 play_dead();
109
110 local_irq_disable();
111 /* Don't trace irqs off for idle */
112 stop_critical_timings();
113 if (cpuidle_idle_call())
114 pm_idle();
115 start_critical_timings();
116 }
117 tick_nohz_restart_sched_tick();
118 preempt_enable_no_resched();
119 schedule();
120 preempt_disable();
121 }
122}
123
124void __show_regs(struct pt_regs *regs, int all)
125{
126 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
127 unsigned long d0, d1, d2, d3, d6, d7;
128 unsigned long sp;
129 unsigned short ss, gs;
130
131 if (user_mode_vm(regs)) {
132 sp = regs->sp;
133 ss = regs->ss & 0xffff;
134 gs = get_user_gs(regs);
135 } else {
136 sp = kernel_stack_pointer(regs);
137 savesegment(ss, ss);
138 savesegment(gs, gs);
139 }
140
141 show_regs_common();
142
143 printk(KERN_DEFAULT "EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n",
144 (u16)regs->cs, regs->ip, regs->flags,
145 smp_processor_id());
146 print_symbol("EIP is at %s\n", regs->ip);
147
148 printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
149 regs->ax, regs->bx, regs->cx, regs->dx);
150 printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
151 regs->si, regs->di, regs->bp, sp);
152 printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",
153 (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss);
154
155 if (!all)
156 return;
157
158 cr0 = read_cr0();
159 cr2 = read_cr2();
160 cr3 = read_cr3();
161 cr4 = read_cr4_safe();
162 printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
163 cr0, cr2, cr3, cr4);
164
165 get_debugreg(d0, 0);
166 get_debugreg(d1, 1);
167 get_debugreg(d2, 2);
168 get_debugreg(d3, 3);
169 printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
170 d0, d1, d2, d3);
171
172 get_debugreg(d6, 6);
173 get_debugreg(d7, 7);
174 printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n",
175 d6, d7);
176}
177
178void release_thread(struct task_struct *dead_task)
179{
180 BUG_ON(dead_task->mm);
181 release_vm86_irqs(dead_task);
182}
183
184/*
185 * This gets called before we allocate a new thread and copy
186 * the current task into it.
187 */
188void prepare_to_copy(struct task_struct *tsk)
189{
190 unlazy_fpu(tsk);
191}
192
193int copy_thread(unsigned long clone_flags, unsigned long sp,
194 unsigned long unused,
195 struct task_struct *p, struct pt_regs *regs)
196{
197 struct pt_regs *childregs;
198 struct task_struct *tsk;
199 int err;
200
201 childregs = task_pt_regs(p);
202 *childregs = *regs;
203 childregs->ax = 0;
204 childregs->sp = sp;
205
206 p->thread.sp = (unsigned long) childregs;
207 p->thread.sp0 = (unsigned long) (childregs+1);
208
209 p->thread.ip = (unsigned long) ret_from_fork;
210
211 task_user_gs(p) = get_user_gs(regs);
212
213 p->thread.io_bitmap_ptr = NULL;
214 tsk = current;
215 err = -ENOMEM;
216
217 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
218
219 if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) {
220 p->thread.io_bitmap_ptr = kmemdup(tsk->thread.io_bitmap_ptr,
221 IO_BITMAP_BYTES, GFP_KERNEL);
222 if (!p->thread.io_bitmap_ptr) {
223 p->thread.io_bitmap_max = 0;
224 return -ENOMEM;
225 }
226 set_tsk_thread_flag(p, TIF_IO_BITMAP);
227 }
228
229 err = 0;
230
231 /*
232 * Set a new TLS for the child thread?
233 */
234 if (clone_flags & CLONE_SETTLS)
235 err = do_set_thread_area(p, -1,
236 (struct user_desc __user *)childregs->si, 0);
237
238 if (err && p->thread.io_bitmap_ptr) {
239 kfree(p->thread.io_bitmap_ptr);
240 p->thread.io_bitmap_max = 0;
241 }
242 return err;
243}
244
245void
246start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
247{
248 set_user_gs(regs, 0);
249 regs->fs = 0;
250 regs->ds = __USER_DS;
251 regs->es = __USER_DS;
252 regs->ss = __USER_DS;
253 regs->cs = __USER_CS;
254 regs->ip = new_ip;
255 regs->sp = new_sp;
256 /*
257 * Free the old FP and other extended state
258 */
259 free_thread_xstate(current);
260}
261EXPORT_SYMBOL_GPL(start_thread);
262
263
264/*
265 * switch_to(x,yn) should switch tasks from x to y.
266 *
267 * We fsave/fwait so that an exception goes off at the right time
268 * (as a call from the fsave or fwait in effect) rather than to
269 * the wrong process. Lazy FP saving no longer makes any sense
270 * with modern CPU's, and this simplifies a lot of things (SMP
271 * and UP become the same).
272 *
273 * NOTE! We used to use the x86 hardware context switching. The
274 * reason for not using it any more becomes apparent when you
275 * try to recover gracefully from saved state that is no longer
276 * valid (stale segment register values in particular). With the
277 * hardware task-switch, there is no way to fix up bad state in
278 * a reasonable manner.
279 *
280 * The fact that Intel documents the hardware task-switching to
281 * be slow is a fairly red herring - this code is not noticeably
282 * faster. However, there _is_ some room for improvement here,
283 * so the performance issues may eventually be a valid point.
284 * More important, however, is the fact that this allows us much
285 * more flexibility.
286 *
287 * The return value (in %ax) will be the "prev" task after
288 * the task-switch, and shows up in ret_from_fork in entry.S,
289 * for example.
290 */
291__notrace_funcgraph struct task_struct *
292__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
293{
294 struct thread_struct *prev = &prev_p->thread,
295 *next = &next_p->thread;
296 int cpu = smp_processor_id();
297 struct tss_struct *tss = &per_cpu(init_tss, cpu);
298 bool preload_fpu;
299
300 /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
301
302 /*
303 * If the task has used fpu the last 5 timeslices, just do a full
304 * restore of the math state immediately to avoid the trap; the
305 * chances of needing FPU soon are obviously high now
306 */
307 preload_fpu = tsk_used_math(next_p) && next_p->fpu_counter > 5;
308
309 __unlazy_fpu(prev_p);
310
311 /* we're going to use this soon, after a few expensive things */
312 if (preload_fpu)
313 prefetch(next->fpu.state);
314
315 /*
316 * Reload esp0.
317 */
318 load_sp0(tss, next);
319
320 /*
321 * Save away %gs. No need to save %fs, as it was saved on the
322 * stack on entry. No need to save %es and %ds, as those are
323 * always kernel segments while inside the kernel. Doing this
324 * before setting the new TLS descriptors avoids the situation
325 * where we temporarily have non-reloadable segments in %fs
326 * and %gs. This could be an issue if the NMI handler ever
327 * used %fs or %gs (it does not today), or if the kernel is
328 * running inside of a hypervisor layer.
329 */
330 lazy_save_gs(prev->gs);
331
332 /*
333 * Load the per-thread Thread-Local Storage descriptor.
334 */
335 load_TLS(next, cpu);
336
337 /*
338 * Restore IOPL if needed. In normal use, the flags restore
339 * in the switch assembly will handle this. But if the kernel
340 * is running virtualized at a non-zero CPL, the popf will
341 * not restore flags, so it must be done in a separate step.
342 */
343 if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl))
344 set_iopl_mask(next->iopl);
345
346 /*
347 * Now maybe handle debug registers and/or IO bitmaps
348 */
349 if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV ||
350 task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT))
351 __switch_to_xtra(prev_p, next_p, tss);
352
353 /* If we're going to preload the fpu context, make sure clts
354 is run while we're batching the cpu state updates. */
355 if (preload_fpu)
356 clts();
357
358 /*
359 * Leave lazy mode, flushing any hypercalls made here.
360 * This must be done before restoring TLS segments so
361 * the GDT and LDT are properly updated, and must be
362 * done before math_state_restore, so the TS bit is up
363 * to date.
364 */
365 arch_end_context_switch(next_p);
366
367 if (preload_fpu)
368 __math_state_restore();
369
370 /*
371 * Restore %gs if needed (which is common)
372 */
373 if (prev->gs | next->gs)
374 lazy_load_gs(next->gs);
375
376 percpu_write(current_task, next_p);
377
378 return prev_p;
379}
380
381#define top_esp (THREAD_SIZE - sizeof(unsigned long))
382#define top_ebp (THREAD_SIZE - 2*sizeof(unsigned long))
383
384unsigned long get_wchan(struct task_struct *p)
385{
386 unsigned long bp, sp, ip;
387 unsigned long stack_page;
388 int count = 0;
389 if (!p || p == current || p->state == TASK_RUNNING)
390 return 0;
391 stack_page = (unsigned long)task_stack_page(p);
392 sp = p->thread.sp;
393 if (!stack_page || sp < stack_page || sp > top_esp+stack_page)
394 return 0;
395 /* include/asm-i386/system.h:switch_to() pushes bp last. */
396 bp = *(unsigned long *) sp;
397 do {
398 if (bp < stack_page || bp > top_ebp+stack_page)
399 return 0;
400 ip = *(unsigned long *) (bp+4);
401 if (!in_sched_functions(ip))
402 return ip;
403 bp = *(unsigned long *) bp;
404 } while (count++ < 16);
405 return 0;
406}
407
1/*
2 * Copyright (C) 1995 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * Gareth Hughes <gareth@valinux.com>, May 2000
6 */
7
8/*
9 * This file handles the architecture-dependent parts of process handling..
10 */
11
12#include <linux/cpu.h>
13#include <linux/errno.h>
14#include <linux/sched.h>
15#include <linux/fs.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/elfcore.h>
19#include <linux/smp.h>
20#include <linux/stddef.h>
21#include <linux/slab.h>
22#include <linux/vmalloc.h>
23#include <linux/user.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/reboot.h>
27#include <linux/mc146818rtc.h>
28#include <linux/export.h>
29#include <linux/kallsyms.h>
30#include <linux/ptrace.h>
31#include <linux/personality.h>
32#include <linux/percpu.h>
33#include <linux/prctl.h>
34#include <linux/ftrace.h>
35#include <linux/uaccess.h>
36#include <linux/io.h>
37#include <linux/kdebug.h>
38
39#include <asm/pgtable.h>
40#include <asm/ldt.h>
41#include <asm/processor.h>
42#include <asm/fpu/internal.h>
43#include <asm/desc.h>
44#ifdef CONFIG_MATH_EMULATION
45#include <asm/math_emu.h>
46#endif
47
48#include <linux/err.h>
49
50#include <asm/tlbflush.h>
51#include <asm/cpu.h>
52#include <asm/syscalls.h>
53#include <asm/debugreg.h>
54#include <asm/switch_to.h>
55#include <asm/vm86.h>
56#include <asm/intel_rdt.h>
57
58void __show_regs(struct pt_regs *regs, int all)
59{
60 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
61 unsigned long d0, d1, d2, d3, d6, d7;
62 unsigned long sp;
63 unsigned short ss, gs;
64
65 if (user_mode(regs)) {
66 sp = regs->sp;
67 ss = regs->ss & 0xffff;
68 gs = get_user_gs(regs);
69 } else {
70 sp = kernel_stack_pointer(regs);
71 savesegment(ss, ss);
72 savesegment(gs, gs);
73 }
74
75 printk(KERN_DEFAULT "EIP: %pS\n", (void *)regs->ip);
76 printk(KERN_DEFAULT "EFLAGS: %08lx CPU: %d\n", regs->flags,
77 smp_processor_id());
78
79 printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
80 regs->ax, regs->bx, regs->cx, regs->dx);
81 printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
82 regs->si, regs->di, regs->bp, sp);
83 printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",
84 (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss);
85
86 if (!all)
87 return;
88
89 cr0 = read_cr0();
90 cr2 = read_cr2();
91 cr3 = read_cr3();
92 cr4 = __read_cr4();
93 printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
94 cr0, cr2, cr3, cr4);
95
96 get_debugreg(d0, 0);
97 get_debugreg(d1, 1);
98 get_debugreg(d2, 2);
99 get_debugreg(d3, 3);
100 get_debugreg(d6, 6);
101 get_debugreg(d7, 7);
102
103 /* Only print out debug registers if they are in their non-default state. */
104 if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
105 (d6 == DR6_RESERVED) && (d7 == 0x400))
106 return;
107
108 printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
109 d0, d1, d2, d3);
110 printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n",
111 d6, d7);
112}
113
114void release_thread(struct task_struct *dead_task)
115{
116 BUG_ON(dead_task->mm);
117 release_vm86_irqs(dead_task);
118}
119
120int copy_thread_tls(unsigned long clone_flags, unsigned long sp,
121 unsigned long arg, struct task_struct *p, unsigned long tls)
122{
123 struct pt_regs *childregs = task_pt_regs(p);
124 struct fork_frame *fork_frame = container_of(childregs, struct fork_frame, regs);
125 struct inactive_task_frame *frame = &fork_frame->frame;
126 struct task_struct *tsk;
127 int err;
128
129 frame->bp = 0;
130 frame->ret_addr = (unsigned long) ret_from_fork;
131 p->thread.sp = (unsigned long) fork_frame;
132 p->thread.sp0 = (unsigned long) (childregs+1);
133 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
134
135 if (unlikely(p->flags & PF_KTHREAD)) {
136 /* kernel thread */
137 memset(childregs, 0, sizeof(struct pt_regs));
138 frame->bx = sp; /* function */
139 frame->di = arg;
140 p->thread.io_bitmap_ptr = NULL;
141 return 0;
142 }
143 frame->bx = 0;
144 *childregs = *current_pt_regs();
145 childregs->ax = 0;
146 if (sp)
147 childregs->sp = sp;
148
149 task_user_gs(p) = get_user_gs(current_pt_regs());
150
151 p->thread.io_bitmap_ptr = NULL;
152 tsk = current;
153 err = -ENOMEM;
154
155 if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) {
156 p->thread.io_bitmap_ptr = kmemdup(tsk->thread.io_bitmap_ptr,
157 IO_BITMAP_BYTES, GFP_KERNEL);
158 if (!p->thread.io_bitmap_ptr) {
159 p->thread.io_bitmap_max = 0;
160 return -ENOMEM;
161 }
162 set_tsk_thread_flag(p, TIF_IO_BITMAP);
163 }
164
165 err = 0;
166
167 /*
168 * Set a new TLS for the child thread?
169 */
170 if (clone_flags & CLONE_SETTLS)
171 err = do_set_thread_area(p, -1,
172 (struct user_desc __user *)tls, 0);
173
174 if (err && p->thread.io_bitmap_ptr) {
175 kfree(p->thread.io_bitmap_ptr);
176 p->thread.io_bitmap_max = 0;
177 }
178 return err;
179}
180
181void
182start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
183{
184 set_user_gs(regs, 0);
185 regs->fs = 0;
186 regs->ds = __USER_DS;
187 regs->es = __USER_DS;
188 regs->ss = __USER_DS;
189 regs->cs = __USER_CS;
190 regs->ip = new_ip;
191 regs->sp = new_sp;
192 regs->flags = X86_EFLAGS_IF;
193 force_iret();
194}
195EXPORT_SYMBOL_GPL(start_thread);
196
197
198/*
199 * switch_to(x,y) should switch tasks from x to y.
200 *
201 * We fsave/fwait so that an exception goes off at the right time
202 * (as a call from the fsave or fwait in effect) rather than to
203 * the wrong process. Lazy FP saving no longer makes any sense
204 * with modern CPU's, and this simplifies a lot of things (SMP
205 * and UP become the same).
206 *
207 * NOTE! We used to use the x86 hardware context switching. The
208 * reason for not using it any more becomes apparent when you
209 * try to recover gracefully from saved state that is no longer
210 * valid (stale segment register values in particular). With the
211 * hardware task-switch, there is no way to fix up bad state in
212 * a reasonable manner.
213 *
214 * The fact that Intel documents the hardware task-switching to
215 * be slow is a fairly red herring - this code is not noticeably
216 * faster. However, there _is_ some room for improvement here,
217 * so the performance issues may eventually be a valid point.
218 * More important, however, is the fact that this allows us much
219 * more flexibility.
220 *
221 * The return value (in %ax) will be the "prev" task after
222 * the task-switch, and shows up in ret_from_fork in entry.S,
223 * for example.
224 */
225__visible __notrace_funcgraph struct task_struct *
226__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
227{
228 struct thread_struct *prev = &prev_p->thread,
229 *next = &next_p->thread;
230 struct fpu *prev_fpu = &prev->fpu;
231 struct fpu *next_fpu = &next->fpu;
232 int cpu = smp_processor_id();
233 struct tss_struct *tss = &per_cpu(cpu_tss, cpu);
234
235 /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
236
237 switch_fpu_prepare(prev_fpu, cpu);
238
239 /*
240 * Save away %gs. No need to save %fs, as it was saved on the
241 * stack on entry. No need to save %es and %ds, as those are
242 * always kernel segments while inside the kernel. Doing this
243 * before setting the new TLS descriptors avoids the situation
244 * where we temporarily have non-reloadable segments in %fs
245 * and %gs. This could be an issue if the NMI handler ever
246 * used %fs or %gs (it does not today), or if the kernel is
247 * running inside of a hypervisor layer.
248 */
249 lazy_save_gs(prev->gs);
250
251 /*
252 * Load the per-thread Thread-Local Storage descriptor.
253 */
254 load_TLS(next, cpu);
255
256 /*
257 * Restore IOPL if needed. In normal use, the flags restore
258 * in the switch assembly will handle this. But if the kernel
259 * is running virtualized at a non-zero CPL, the popf will
260 * not restore flags, so it must be done in a separate step.
261 */
262 if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl))
263 set_iopl_mask(next->iopl);
264
265 /*
266 * Now maybe handle debug registers and/or IO bitmaps
267 */
268 if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV ||
269 task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT))
270 __switch_to_xtra(prev_p, next_p, tss);
271
272 /*
273 * Leave lazy mode, flushing any hypercalls made here.
274 * This must be done before restoring TLS segments so
275 * the GDT and LDT are properly updated, and must be
276 * done before fpu__restore(), so the TS bit is up
277 * to date.
278 */
279 arch_end_context_switch(next_p);
280
281 /*
282 * Reload esp0 and cpu_current_top_of_stack. This changes
283 * current_thread_info().
284 */
285 load_sp0(tss, next);
286 this_cpu_write(cpu_current_top_of_stack,
287 (unsigned long)task_stack_page(next_p) +
288 THREAD_SIZE);
289
290 /*
291 * Restore %gs if needed (which is common)
292 */
293 if (prev->gs | next->gs)
294 lazy_load_gs(next->gs);
295
296 switch_fpu_finish(next_fpu, cpu);
297
298 this_cpu_write(current_task, next_p);
299
300 /* Load the Intel cache allocation PQR MSR. */
301 intel_rdt_sched_in();
302
303 return prev_p;
304}