1#include <asm/asm-offsets.h>
  2#include <asm/page.h>
 
 
 
 
 
 
 
 
 
  3#include <asm-generic/vmlinux.lds.h>
  4
  5#undef mips
  6#define mips mips
  7OUTPUT_ARCH(mips)
  8ENTRY(kernel_entry)
  9PHDRS {
 10	text PT_LOAD FLAGS(7);	/* RWX */
 
 11	note PT_NOTE FLAGS(4);	/* R__ */
 
 12}
 13
 14#ifdef CONFIG_32BIT
 15	#ifdef CONFIG_CPU_LITTLE_ENDIAN
 16		jiffies  = jiffies_64;
 17	#else
 18		jiffies  = jiffies_64 + 4;
 19	#endif
 20#else
 21	jiffies  = jiffies_64;
 22#endif
 23
 24SECTIONS
 25{
 26#ifdef CONFIG_BOOT_ELF64
 27	/* Read-only sections, merged into text segment: */
 28	/* . = 0xc000000000000000; */
 29
 30	/* This is the value for an Origin kernel, taken from an IRIX kernel.  */
 31	/* . = 0xc00000000001c000; */
 32
 33	/* Set the vaddr for the text segment to a value
 34	 *   >= 0xa800 0000 0001 9000 if no symmon is going to configured
 35	 *   >= 0xa800 0000 0030 0000 otherwise
 36	 */
 37
 38	/* . = 0xa800000000300000; */
 39	. = 0xffffffff80300000;
 40#endif
 41	. = VMLINUX_LOAD_ADDRESS;
 42	/* read-only */
 43	_text = .;	/* Text and read-only data */
 44	.text : {
 45		TEXT_TEXT
 46		SCHED_TEXT
 
 47		LOCK_TEXT
 48		KPROBES_TEXT
 49		IRQENTRY_TEXT
 
 50		*(.text.*)
 51		*(.fixup)
 52		*(.gnu.warning)
 53	} :text = 0
 54	_etext = .;	/* End of text section */
 55
 56	EXCEPTION_TABLE(16)
 57
 58	/* Exception table for data bus errors */
 59	__dbe_table : {
 60		__start___dbe_table = .;
 61		*(__dbe_table)
 62		__stop___dbe_table = .;
 63	}
 64
 65	NOTES :text :note
 
 
 
 
 
 66	.dummy : { *(.dummy) } :text
 67
 68	_sdata = .;			/* Start of data section */
 69	RODATA
 70
 71	/* writeable */
 72	_sdata = .;				/* Start of data section */
 73	.data : {	/* Data */
 74		. = . + DATAOFFSET;		/* for CONFIG_MAPPED_KERNEL */
 75
 76		INIT_TASK_DATA(PAGE_SIZE)
 77		NOSAVE_DATA
 78		CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
 79		READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
 80		DATA_DATA
 81		CONSTRUCTORS
 82	}
 83	_gp = . + 0x8000;
 84	.lit8 : {
 85		*(.lit8)
 86	}
 87	.lit4 : {
 88		*(.lit4)
 89	}
 90	/* We want the small data sections together, so single-instruction offsets
 91	   can access them all, and initialized data all before uninitialized, so
 92	   we can shorten the on-disk segment size.  */
 93	.sdata : {
 94		*(.sdata)
 95	}
 96	_edata =  .;			/* End of data section */
 97
 98	/* will be freed after init */
 99	. = ALIGN(PAGE_SIZE);		/* Init code and data */
100	__init_begin = .;
101	INIT_TEXT_SECTION(PAGE_SIZE)
102	INIT_DATA_SECTION(16)
103
104	. = ALIGN(4);
105	.mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
106		__mips_machines_start = .;
107		*(.mips.machines.init)
108		__mips_machines_end = .;
109	}
110
111	/* .exit.text is discarded at runtime, not link time, to deal with
112	 * references from .rodata
113	 */
114	.exit.text : {
115		EXIT_TEXT
116	}
117	.exit.data : {
118		EXIT_DATA
119	}
120
121	PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
122	. = ALIGN(PAGE_SIZE);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
123	__init_end = .;
124	/* freed after init ends here */
125
126	BSS_SECTION(0, 0, 0)
 
 
 
 
127
128	_end = . ;
129
130	/* These mark the ABI of the kernel for debuggers.  */
131	.mdebug.abi32 : {
132		KEEP(*(.mdebug.abi32))
133	}
134	.mdebug.abi64 : {
135		KEEP(*(.mdebug.abi64))
136	}
137
138	/* This is the MIPS specific mdebug section.  */
139	.mdebug : {
140		*(.mdebug)
141	}
142
143	STABS_DEBUG
144	DWARF_DEBUG
145
146	/* These must appear regardless of  .  */
147	.gptab.sdata : {
148		*(.gptab.data)
149		*(.gptab.sdata)
150	}
151	.gptab.sbss : {
152		*(.gptab.bss)
153		*(.gptab.sbss)
154	}
155
156	/* Sections to be discarded */
157	DISCARDS
158	/DISCARD/ : {
159		/* ABI crap starts here */
 
160		*(.MIPS.options)
161		*(.options)
162		*(.pdr)
163		*(.reginfo)
 
164	}
165}

  1#include <asm/asm-offsets.h>
  2#include <asm/thread_info.h>
  3
  4#define PAGE_SIZE _PAGE_SIZE
  5
  6/*
  7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
  8 * ensure that it has .bss alignment (64K).
  9 */
 10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
 11
 12#include <asm-generic/vmlinux.lds.h>
 13
 14#undef mips
 15#define mips mips
 16OUTPUT_ARCH(mips)
 17ENTRY(kernel_entry)
 18PHDRS {
 19	text PT_LOAD FLAGS(7);	/* RWX */
 20#ifndef CONFIG_CAVIUM_OCTEON_SOC
 21	note PT_NOTE FLAGS(4);	/* R__ */
 22#endif /* CAVIUM_OCTEON_SOC */
 23}
 24
 25#ifdef CONFIG_32BIT
 26	#ifdef CONFIG_CPU_LITTLE_ENDIAN
 27		jiffies	 = jiffies_64;
 28	#else
 29		jiffies	 = jiffies_64 + 4;
 30	#endif
 31#else
 32	jiffies	 = jiffies_64;
 33#endif
 34
 35SECTIONS
 36{
 37#ifdef CONFIG_BOOT_ELF64
 38	/* Read-only sections, merged into text segment: */
 39	/* . = 0xc000000000000000; */
 40
 41	/* This is the value for an Origin kernel, taken from an IRIX kernel.  */
 42	/* . = 0xc00000000001c000; */
 43
 44	/* Set the vaddr for the text segment to a value
 45	 *   >= 0xa800 0000 0001 9000 if no symmon is going to configured
 46	 *   >= 0xa800 0000 0030 0000 otherwise
 47	 */
 48
 49	/* . = 0xa800000000300000; */
 50	. = 0xffffffff80300000;
 51#endif
 52	. = VMLINUX_LOAD_ADDRESS;
 53	/* read-only */
 54	_text = .;	/* Text and read-only data */
 55	.text : {
 56		TEXT_TEXT
 57		SCHED_TEXT
 58		CPUIDLE_TEXT
 59		LOCK_TEXT
 60		KPROBES_TEXT
 61		IRQENTRY_TEXT
 62		SOFTIRQENTRY_TEXT
 63		*(.text.*)
 64		*(.fixup)
 65		*(.gnu.warning)
 66	} :text = 0
 67	_etext = .;	/* End of text section */
 68
 69	EXCEPTION_TABLE(16)
 70
 71	/* Exception table for data bus errors */
 72	__dbe_table : {
 73		__start___dbe_table = .;
 74		*(__dbe_table)
 75		__stop___dbe_table = .;
 76	}
 77
 78#ifdef CONFIG_CAVIUM_OCTEON_SOC
 79#define NOTES_HEADER
 80#else /* CONFIG_CAVIUM_OCTEON_SOC */
 81#define NOTES_HEADER :note
 82#endif /* CONFIG_CAVIUM_OCTEON_SOC */
 83	NOTES :text NOTES_HEADER
 84	.dummy : { *(.dummy) } :text
 85
 86	_sdata = .;			/* Start of data section */
 87	RODATA
 88
 89	/* writeable */
 
 90	.data : {	/* Data */
 91		. = . + DATAOFFSET;		/* for CONFIG_MAPPED_KERNEL */
 92
 93		INIT_TASK_DATA(THREAD_SIZE)
 94		NOSAVE_DATA
 95		CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
 96		READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
 97		DATA_DATA
 98		CONSTRUCTORS
 99	}
100	_gp = . + 0x8000;
101	.lit8 : {
102		*(.lit8)
103	}
104	.lit4 : {
105		*(.lit4)
106	}
107	/* We want the small data sections together, so single-instruction offsets
108	   can access them all, and initialized data all before uninitialized, so
109	   we can shorten the on-disk segment size.  */
110	.sdata : {
111		*(.sdata)
112	}
113	_edata =  .;			/* End of data section */
114
115	/* will be freed after init */
116	. = ALIGN(PAGE_SIZE);		/* Init code and data */
117	__init_begin = .;
118	INIT_TEXT_SECTION(PAGE_SIZE)
119	INIT_DATA_SECTION(16)
120
121	. = ALIGN(4);
122	.mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
123		__mips_machines_start = .;
124		*(.mips.machines.init)
125		__mips_machines_end = .;
126	}
127
128	/* .exit.text is discarded at runtime, not link time, to deal with
129	 * references from .rodata
130	 */
131	.exit.text : {
132		EXIT_TEXT
133	}
134	.exit.data : {
135		EXIT_DATA
136	}
137#ifdef CONFIG_SMP
138	PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
139#endif
140
141#ifdef CONFIG_RELOCATABLE
142	. = ALIGN(4);
143
144	.data.reloc : {
145		_relocation_start = .;
146		/*
147		 * Space for relocation table
148		 * This needs to be filled so that the
149		 * relocs tool can overwrite the content.
150		 * An invalid value is left at the start of the
151		 * section to abort relocation if the table
152		 * has not been filled in.
153		 */
154		LONG(0xFFFFFFFF);
155		FILL(0);
156		. += CONFIG_RELOCATION_TABLE_SIZE - 4;
157		_relocation_end = .;
158	}
159#endif
160
161#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
162	__appended_dtb = .;
163	/* leave space for appended DTB */
164	. += 0x100000;
165#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
166	.appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
167		*(.appended_dtb)
168		KEEP(*(.appended_dtb))
169	}
170#endif
171	/*
172	 * Align to 64K in attempt to eliminate holes before the
173	 * .bss..swapper_pg_dir section at the start of .bss.  This
174	 * also satisfies PAGE_SIZE alignment as the largest page size
175	 * allowed is 64K.
176	 */
177	. = ALIGN(0x10000);
178	__init_end = .;
179	/* freed after init ends here */
180
181	/*
182	 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
183	 * gets that alignment.	 .sbss should be empty, so there will be
184	 * no holes after __init_end. */
185	BSS_SECTION(0, 0x10000, 0)
186
187	_end = . ;
188
189	/* These mark the ABI of the kernel for debuggers.  */
190	.mdebug.abi32 : {
191		KEEP(*(.mdebug.abi32))
192	}
193	.mdebug.abi64 : {
194		KEEP(*(.mdebug.abi64))
195	}
196
197	/* This is the MIPS specific mdebug section.  */
198	.mdebug : {
199		*(.mdebug)
200	}
201
202	STABS_DEBUG
203	DWARF_DEBUG
204
205	/* These must appear regardless of  .  */
206	.gptab.sdata : {
207		*(.gptab.data)
208		*(.gptab.sdata)
209	}
210	.gptab.sbss : {
211		*(.gptab.bss)
212		*(.gptab.sbss)
213	}
214
215	/* Sections to be discarded */
216	DISCARDS
217	/DISCARD/ : {
218		/* ABI crap starts here */
219		*(.MIPS.abiflags)
220		*(.MIPS.options)
221		*(.options)
222		*(.pdr)
223		*(.reginfo)
224		*(.eh_frame)
225	}
226}