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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Much of this is taken from binutils and GNU libc ...
7 */
8#ifndef _ASM_ELF_H
9#define _ASM_ELF_H
10
11
12/* ELF header e_flags defines. */
13/* MIPS architecture level. */
14#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
15#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
16#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
17#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
18#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
19#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
20#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
21#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
22#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
23
24/* The ABI of a file. */
25#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
26#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
27
28#define PT_MIPS_REGINFO 0x70000000
29#define PT_MIPS_RTPROC 0x70000001
30#define PT_MIPS_OPTIONS 0x70000002
31
32/* Flags in the e_flags field of the header */
33#define EF_MIPS_NOREORDER 0x00000001
34#define EF_MIPS_PIC 0x00000002
35#define EF_MIPS_CPIC 0x00000004
36#define EF_MIPS_ABI2 0x00000020
37#define EF_MIPS_OPTIONS_FIRST 0x00000080
38#define EF_MIPS_32BITMODE 0x00000100
39#define EF_MIPS_ABI 0x0000f000
40#define EF_MIPS_ARCH 0xf0000000
41
42#define DT_MIPS_RLD_VERSION 0x70000001
43#define DT_MIPS_TIME_STAMP 0x70000002
44#define DT_MIPS_ICHECKSUM 0x70000003
45#define DT_MIPS_IVERSION 0x70000004
46#define DT_MIPS_FLAGS 0x70000005
47 #define RHF_NONE 0x00000000
48 #define RHF_HARDWAY 0x00000001
49 #define RHF_NOTPOT 0x00000002
50 #define RHF_SGI_ONLY 0x00000010
51#define DT_MIPS_BASE_ADDRESS 0x70000006
52#define DT_MIPS_CONFLICT 0x70000008
53#define DT_MIPS_LIBLIST 0x70000009
54#define DT_MIPS_LOCAL_GOTNO 0x7000000a
55#define DT_MIPS_CONFLICTNO 0x7000000b
56#define DT_MIPS_LIBLISTNO 0x70000010
57#define DT_MIPS_SYMTABNO 0x70000011
58#define DT_MIPS_UNREFEXTNO 0x70000012
59#define DT_MIPS_GOTSYM 0x70000013
60#define DT_MIPS_HIPAGENO 0x70000014
61#define DT_MIPS_RLD_MAP 0x70000016
62
63#define R_MIPS_NONE 0
64#define R_MIPS_16 1
65#define R_MIPS_32 2
66#define R_MIPS_REL32 3
67#define R_MIPS_26 4
68#define R_MIPS_HI16 5
69#define R_MIPS_LO16 6
70#define R_MIPS_GPREL16 7
71#define R_MIPS_LITERAL 8
72#define R_MIPS_GOT16 9
73#define R_MIPS_PC16 10
74#define R_MIPS_CALL16 11
75#define R_MIPS_GPREL32 12
76/* The remaining relocs are defined on Irix, although they are not
77 in the MIPS ELF ABI. */
78#define R_MIPS_UNUSED1 13
79#define R_MIPS_UNUSED2 14
80#define R_MIPS_UNUSED3 15
81#define R_MIPS_SHIFT5 16
82#define R_MIPS_SHIFT6 17
83#define R_MIPS_64 18
84#define R_MIPS_GOT_DISP 19
85#define R_MIPS_GOT_PAGE 20
86#define R_MIPS_GOT_OFST 21
87/*
88 * The following two relocation types are specified in the MIPS ABI
89 * conformance guide version 1.2 but not yet in the psABI.
90 */
91#define R_MIPS_GOTHI16 22
92#define R_MIPS_GOTLO16 23
93#define R_MIPS_SUB 24
94#define R_MIPS_INSERT_A 25
95#define R_MIPS_INSERT_B 26
96#define R_MIPS_DELETE 27
97#define R_MIPS_HIGHER 28
98#define R_MIPS_HIGHEST 29
99/*
100 * The following two relocation types are specified in the MIPS ABI
101 * conformance guide version 1.2 but not yet in the psABI.
102 */
103#define R_MIPS_CALLHI16 30
104#define R_MIPS_CALLLO16 31
105/*
106 * This range is reserved for vendor specific relocations.
107 */
108#define R_MIPS_LOVENDOR 100
109#define R_MIPS_HIVENDOR 127
110
111#define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */
112#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
113#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
114#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
115#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
116
117#define SHT_MIPS_LIST 0x70000000
118#define SHT_MIPS_CONFLICT 0x70000002
119#define SHT_MIPS_GPTAB 0x70000003
120#define SHT_MIPS_UCODE 0x70000004
121#define SHT_MIPS_DEBUG 0x70000005
122#define SHT_MIPS_REGINFO 0x70000006
123#define SHT_MIPS_PACKAGE 0x70000007
124#define SHT_MIPS_PACKSYM 0x70000008
125#define SHT_MIPS_RELD 0x70000009
126#define SHT_MIPS_IFACE 0x7000000b
127#define SHT_MIPS_CONTENT 0x7000000c
128#define SHT_MIPS_OPTIONS 0x7000000d
129#define SHT_MIPS_SHDR 0x70000010
130#define SHT_MIPS_FDESC 0x70000011
131#define SHT_MIPS_EXTSYM 0x70000012
132#define SHT_MIPS_DENSE 0x70000013
133#define SHT_MIPS_PDESC 0x70000014
134#define SHT_MIPS_LOCSYM 0x70000015
135#define SHT_MIPS_AUXSYM 0x70000016
136#define SHT_MIPS_OPTSYM 0x70000017
137#define SHT_MIPS_LOCSTR 0x70000018
138#define SHT_MIPS_LINE 0x70000019
139#define SHT_MIPS_RFDESC 0x7000001a
140#define SHT_MIPS_DELTASYM 0x7000001b
141#define SHT_MIPS_DELTAINST 0x7000001c
142#define SHT_MIPS_DELTACLASS 0x7000001d
143#define SHT_MIPS_DWARF 0x7000001e
144#define SHT_MIPS_DELTADECL 0x7000001f
145#define SHT_MIPS_SYMBOL_LIB 0x70000020
146#define SHT_MIPS_EVENTS 0x70000021
147#define SHT_MIPS_TRANSLATE 0x70000022
148#define SHT_MIPS_PIXIE 0x70000023
149#define SHT_MIPS_XLATE 0x70000024
150#define SHT_MIPS_XLATE_DEBUG 0x70000025
151#define SHT_MIPS_WHIRL 0x70000026
152#define SHT_MIPS_EH_REGION 0x70000027
153#define SHT_MIPS_XLATE_OLD 0x70000028
154#define SHT_MIPS_PDR_EXCEPTION 0x70000029
155
156#define SHF_MIPS_GPREL 0x10000000
157#define SHF_MIPS_MERGE 0x20000000
158#define SHF_MIPS_ADDR 0x40000000
159#define SHF_MIPS_STRING 0x80000000
160#define SHF_MIPS_NOSTRIP 0x08000000
161#define SHF_MIPS_LOCAL 0x04000000
162#define SHF_MIPS_NAMES 0x02000000
163#define SHF_MIPS_NODUPES 0x01000000
164
165#ifndef ELF_ARCH
166/* ELF register definitions */
167#define ELF_NGREG 45
168#define ELF_NFPREG 33
169
170typedef unsigned long elf_greg_t;
171typedef elf_greg_t elf_gregset_t[ELF_NGREG];
172
173typedef double elf_fpreg_t;
174typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
175
176#ifdef CONFIG_32BIT
177
178/*
179 * This is used to ensure we don't load something for the wrong architecture.
180 */
181#define elf_check_arch(hdr) \
182({ \
183 int __res = 1; \
184 struct elfhdr *__h = (hdr); \
185 \
186 if (__h->e_machine != EM_MIPS) \
187 __res = 0; \
188 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
189 __res = 0; \
190 if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
191 __res = 0; \
192 if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
193 ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
194 __res = 0; \
195 \
196 __res; \
197})
198
199/*
200 * These are used to set parameters in the core dumps.
201 */
202#define ELF_CLASS ELFCLASS32
203
204#endif /* CONFIG_32BIT */
205
206#ifdef CONFIG_64BIT
207/*
208 * This is used to ensure we don't load something for the wrong architecture.
209 */
210#define elf_check_arch(hdr) \
211({ \
212 int __res = 1; \
213 struct elfhdr *__h = (hdr); \
214 \
215 if (__h->e_machine != EM_MIPS) \
216 __res = 0; \
217 if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
218 __res = 0; \
219 \
220 __res; \
221})
222
223/*
224 * These are used to set parameters in the core dumps.
225 */
226#define ELF_CLASS ELFCLASS64
227
228#endif /* CONFIG_64BIT */
229
230/*
231 * These are used to set parameters in the core dumps.
232 */
233#ifdef __MIPSEB__
234#define ELF_DATA ELFDATA2MSB
235#elif defined(__MIPSEL__)
236#define ELF_DATA ELFDATA2LSB
237#endif
238#define ELF_ARCH EM_MIPS
239
240#endif /* !defined(ELF_ARCH) */
241
242struct mips_abi;
243
244extern struct mips_abi mips_abi;
245extern struct mips_abi mips_abi_32;
246extern struct mips_abi mips_abi_n32;
247
248#ifdef CONFIG_32BIT
249
250#define SET_PERSONALITY(ex) \
251do { \
252 if (personality(current->personality) != PER_LINUX) \
253 set_personality(PER_LINUX); \
254 \
255 current->thread.abi = &mips_abi; \
256} while (0)
257
258#endif /* CONFIG_32BIT */
259
260#ifdef CONFIG_64BIT
261
262#ifdef CONFIG_MIPS32_N32
263#define __SET_PERSONALITY32_N32() \
264 do { \
265 set_thread_flag(TIF_32BIT_ADDR); \
266 current->thread.abi = &mips_abi_n32; \
267 } while (0)
268#else
269#define __SET_PERSONALITY32_N32() \
270 do { } while (0)
271#endif
272
273#ifdef CONFIG_MIPS32_O32
274#define __SET_PERSONALITY32_O32() \
275 do { \
276 set_thread_flag(TIF_32BIT_REGS); \
277 set_thread_flag(TIF_32BIT_ADDR); \
278 current->thread.abi = &mips_abi_32; \
279 } while (0)
280#else
281#define __SET_PERSONALITY32_O32() \
282 do { } while (0)
283#endif
284
285#ifdef CONFIG_MIPS32_COMPAT
286#define __SET_PERSONALITY32(ex) \
287do { \
288 if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
289 ((ex).e_flags & EF_MIPS_ABI) == 0) \
290 __SET_PERSONALITY32_N32(); \
291 else \
292 __SET_PERSONALITY32_O32(); \
293} while (0)
294#else
295#define __SET_PERSONALITY32(ex) do { } while (0)
296#endif
297
298#define SET_PERSONALITY(ex) \
299do { \
300 unsigned int p; \
301 \
302 clear_thread_flag(TIF_32BIT_REGS); \
303 clear_thread_flag(TIF_32BIT_ADDR); \
304 \
305 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
306 __SET_PERSONALITY32(ex); \
307 else \
308 current->thread.abi = &mips_abi; \
309 \
310 p = personality(current->personality); \
311 if (p != PER_LINUX32 && p != PER_LINUX) \
312 set_personality(PER_LINUX); \
313} while (0)
314
315#endif /* CONFIG_64BIT */
316
317struct pt_regs;
318struct task_struct;
319
320extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
321extern int dump_task_regs(struct task_struct *, elf_gregset_t *);
322extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
323
324#ifndef ELF_CORE_COPY_REGS
325#define ELF_CORE_COPY_REGS(elf_regs, regs) \
326 elf_dump_regs((elf_greg_t *)&(elf_regs), regs);
327#endif
328#ifndef ELF_CORE_COPY_TASK_REGS
329#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
330#endif
331#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
332 dump_task_fpu(tsk, elf_fpregs)
333
334#define ELF_EXEC_PAGESIZE PAGE_SIZE
335
336/* This yields a mask that user programs can use to figure out what
337 instruction set this cpu supports. This could be done in userspace,
338 but it's not easy, and we've already done it here. */
339
340#define ELF_HWCAP (0)
341
342/*
343 * This yields a string that ld.so will use to load implementation
344 * specific libraries for optimization. This is more specific in
345 * intent than poking at uname or /proc/cpuinfo.
346 */
347
348#define ELF_PLATFORM __elf_platform
349extern const char *__elf_platform;
350
351/*
352 * See comments in asm-alpha/elf.h, this is the same thing
353 * on the MIPS.
354 */
355#define ELF_PLAT_INIT(_r, load_addr) do { \
356 _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
357 _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
358 _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
359 _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
360 _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
361 _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
362 _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
363 _r->regs[30] = _r->regs[31] = 0; \
364} while (0)
365
366/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
367 use of this is to invoke "./ld.so someprog" to test out a new version of
368 the loader. We need to make sure that it is out of the way of the program
369 that it will "exec", and that there is sufficient room for the brk. */
370
371#ifndef ELF_ET_DYN_BASE
372#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
373#endif
374
375#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
376struct linux_binprm;
377extern int arch_setup_additional_pages(struct linux_binprm *bprm,
378 int uses_interp);
379
380struct mm_struct;
381extern unsigned long arch_randomize_brk(struct mm_struct *mm);
382#define arch_randomize_brk arch_randomize_brk
383
384#endif /* _ASM_ELF_H */
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Much of this is taken from binutils and GNU libc ...
7 */
8#ifndef _ASM_ELF_H
9#define _ASM_ELF_H
10
11#include <linux/auxvec.h>
12#include <linux/fs.h>
13#include <uapi/linux/elf.h>
14
15#include <asm/current.h>
16
17/* ELF header e_flags defines. */
18/* MIPS architecture level. */
19#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
20#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
21#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
22#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
23#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
24#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
25#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
26#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
27#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
28
29/* The ABI of a file. */
30#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
31#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
32
33#define PT_MIPS_REGINFO 0x70000000
34#define PT_MIPS_RTPROC 0x70000001
35#define PT_MIPS_OPTIONS 0x70000002
36#define PT_MIPS_ABIFLAGS 0x70000003
37
38/* Flags in the e_flags field of the header */
39#define EF_MIPS_NOREORDER 0x00000001
40#define EF_MIPS_PIC 0x00000002
41#define EF_MIPS_CPIC 0x00000004
42#define EF_MIPS_ABI2 0x00000020
43#define EF_MIPS_OPTIONS_FIRST 0x00000080
44#define EF_MIPS_32BITMODE 0x00000100
45#define EF_MIPS_FP64 0x00000200
46#define EF_MIPS_NAN2008 0x00000400
47#define EF_MIPS_ABI 0x0000f000
48#define EF_MIPS_ARCH 0xf0000000
49
50#define DT_MIPS_RLD_VERSION 0x70000001
51#define DT_MIPS_TIME_STAMP 0x70000002
52#define DT_MIPS_ICHECKSUM 0x70000003
53#define DT_MIPS_IVERSION 0x70000004
54#define DT_MIPS_FLAGS 0x70000005
55 #define RHF_NONE 0x00000000
56 #define RHF_HARDWAY 0x00000001
57 #define RHF_NOTPOT 0x00000002
58 #define RHF_SGI_ONLY 0x00000010
59#define DT_MIPS_BASE_ADDRESS 0x70000006
60#define DT_MIPS_CONFLICT 0x70000008
61#define DT_MIPS_LIBLIST 0x70000009
62#define DT_MIPS_LOCAL_GOTNO 0x7000000a
63#define DT_MIPS_CONFLICTNO 0x7000000b
64#define DT_MIPS_LIBLISTNO 0x70000010
65#define DT_MIPS_SYMTABNO 0x70000011
66#define DT_MIPS_UNREFEXTNO 0x70000012
67#define DT_MIPS_GOTSYM 0x70000013
68#define DT_MIPS_HIPAGENO 0x70000014
69#define DT_MIPS_RLD_MAP 0x70000016
70
71#define R_MIPS_NONE 0
72#define R_MIPS_16 1
73#define R_MIPS_32 2
74#define R_MIPS_REL32 3
75#define R_MIPS_26 4
76#define R_MIPS_HI16 5
77#define R_MIPS_LO16 6
78#define R_MIPS_GPREL16 7
79#define R_MIPS_LITERAL 8
80#define R_MIPS_GOT16 9
81#define R_MIPS_PC16 10
82#define R_MIPS_CALL16 11
83#define R_MIPS_GPREL32 12
84/* The remaining relocs are defined on Irix, although they are not
85 in the MIPS ELF ABI. */
86#define R_MIPS_UNUSED1 13
87#define R_MIPS_UNUSED2 14
88#define R_MIPS_UNUSED3 15
89#define R_MIPS_SHIFT5 16
90#define R_MIPS_SHIFT6 17
91#define R_MIPS_64 18
92#define R_MIPS_GOT_DISP 19
93#define R_MIPS_GOT_PAGE 20
94#define R_MIPS_GOT_OFST 21
95/*
96 * The following two relocation types are specified in the MIPS ABI
97 * conformance guide version 1.2 but not yet in the psABI.
98 */
99#define R_MIPS_GOTHI16 22
100#define R_MIPS_GOTLO16 23
101#define R_MIPS_SUB 24
102#define R_MIPS_INSERT_A 25
103#define R_MIPS_INSERT_B 26
104#define R_MIPS_DELETE 27
105#define R_MIPS_HIGHER 28
106#define R_MIPS_HIGHEST 29
107/*
108 * The following two relocation types are specified in the MIPS ABI
109 * conformance guide version 1.2 but not yet in the psABI.
110 */
111#define R_MIPS_CALLHI16 30
112#define R_MIPS_CALLLO16 31
113/*
114 * Introduced for MIPSr6.
115 */
116#define R_MIPS_PC21_S2 60
117#define R_MIPS_PC26_S2 61
118/*
119 * This range is reserved for vendor specific relocations.
120 */
121#define R_MIPS_LOVENDOR 100
122#define R_MIPS_HIVENDOR 127
123
124#define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */
125#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
126#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
127#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
128#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
129
130#define SHT_MIPS_LIST 0x70000000
131#define SHT_MIPS_CONFLICT 0x70000002
132#define SHT_MIPS_GPTAB 0x70000003
133#define SHT_MIPS_UCODE 0x70000004
134#define SHT_MIPS_DEBUG 0x70000005
135#define SHT_MIPS_REGINFO 0x70000006
136#define SHT_MIPS_PACKAGE 0x70000007
137#define SHT_MIPS_PACKSYM 0x70000008
138#define SHT_MIPS_RELD 0x70000009
139#define SHT_MIPS_IFACE 0x7000000b
140#define SHT_MIPS_CONTENT 0x7000000c
141#define SHT_MIPS_OPTIONS 0x7000000d
142#define SHT_MIPS_SHDR 0x70000010
143#define SHT_MIPS_FDESC 0x70000011
144#define SHT_MIPS_EXTSYM 0x70000012
145#define SHT_MIPS_DENSE 0x70000013
146#define SHT_MIPS_PDESC 0x70000014
147#define SHT_MIPS_LOCSYM 0x70000015
148#define SHT_MIPS_AUXSYM 0x70000016
149#define SHT_MIPS_OPTSYM 0x70000017
150#define SHT_MIPS_LOCSTR 0x70000018
151#define SHT_MIPS_LINE 0x70000019
152#define SHT_MIPS_RFDESC 0x7000001a
153#define SHT_MIPS_DELTASYM 0x7000001b
154#define SHT_MIPS_DELTAINST 0x7000001c
155#define SHT_MIPS_DELTACLASS 0x7000001d
156#define SHT_MIPS_DWARF 0x7000001e
157#define SHT_MIPS_DELTADECL 0x7000001f
158#define SHT_MIPS_SYMBOL_LIB 0x70000020
159#define SHT_MIPS_EVENTS 0x70000021
160#define SHT_MIPS_TRANSLATE 0x70000022
161#define SHT_MIPS_PIXIE 0x70000023
162#define SHT_MIPS_XLATE 0x70000024
163#define SHT_MIPS_XLATE_DEBUG 0x70000025
164#define SHT_MIPS_WHIRL 0x70000026
165#define SHT_MIPS_EH_REGION 0x70000027
166#define SHT_MIPS_XLATE_OLD 0x70000028
167#define SHT_MIPS_PDR_EXCEPTION 0x70000029
168
169#define SHF_MIPS_GPREL 0x10000000
170#define SHF_MIPS_MERGE 0x20000000
171#define SHF_MIPS_ADDR 0x40000000
172#define SHF_MIPS_STRING 0x80000000
173#define SHF_MIPS_NOSTRIP 0x08000000
174#define SHF_MIPS_LOCAL 0x04000000
175#define SHF_MIPS_NAMES 0x02000000
176#define SHF_MIPS_NODUPES 0x01000000
177
178#define MIPS_ABI_FP_ANY 0 /* FP ABI doesn't matter */
179#define MIPS_ABI_FP_DOUBLE 1 /* -mdouble-float */
180#define MIPS_ABI_FP_SINGLE 2 /* -msingle-float */
181#define MIPS_ABI_FP_SOFT 3 /* -msoft-float */
182#define MIPS_ABI_FP_OLD_64 4 /* -mips32r2 -mfp64 */
183#define MIPS_ABI_FP_XX 5 /* -mfpxx */
184#define MIPS_ABI_FP_64 6 /* -mips32r2 -mfp64 */
185#define MIPS_ABI_FP_64A 7 /* -mips32r2 -mfp64 -mno-odd-spreg */
186
187struct mips_elf_abiflags_v0 {
188 uint16_t version; /* Version of flags structure */
189 uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */
190 uint8_t isa_rev; /* The revision of ISA: 0 for MIPS V and below,
191 1-n otherwise */
192 uint8_t gpr_size; /* The size of general purpose registers */
193 uint8_t cpr1_size; /* The size of co-processor 1 registers */
194 uint8_t cpr2_size; /* The size of co-processor 2 registers */
195 uint8_t fp_abi; /* The floating-point ABI */
196 uint32_t isa_ext; /* Mask of processor-specific extensions */
197 uint32_t ases; /* Mask of ASEs used */
198 uint32_t flags1; /* Mask of general flags */
199 uint32_t flags2;
200};
201
202#ifndef ELF_ARCH
203/* ELF register definitions */
204#define ELF_NGREG 45
205#define ELF_NFPREG 33
206
207typedef unsigned long elf_greg_t;
208typedef elf_greg_t elf_gregset_t[ELF_NGREG];
209
210typedef double elf_fpreg_t;
211typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
212
213#ifdef CONFIG_32BIT
214/*
215 * This is used to ensure we don't load something for the wrong architecture.
216 */
217#define elf_check_arch elfo32_check_arch
218
219/*
220 * These are used to set parameters in the core dumps.
221 */
222#define ELF_CLASS ELFCLASS32
223
224#endif /* CONFIG_32BIT */
225
226#ifdef CONFIG_64BIT
227/*
228 * This is used to ensure we don't load something for the wrong architecture.
229 */
230#define elf_check_arch elfn64_check_arch
231
232/*
233 * These are used to set parameters in the core dumps.
234 */
235#define ELF_CLASS ELFCLASS64
236
237#endif /* CONFIG_64BIT */
238
239/*
240 * These are used to set parameters in the core dumps.
241 */
242#ifdef __MIPSEB__
243#define ELF_DATA ELFDATA2MSB
244#elif defined(__MIPSEL__)
245#define ELF_DATA ELFDATA2LSB
246#endif
247#define ELF_ARCH EM_MIPS
248
249#endif /* !defined(ELF_ARCH) */
250
251/*
252 * In order to be sure that we don't attempt to execute an O32 binary which
253 * requires 64 bit FP (FR=1) on a system which does not support it we refuse
254 * to execute any binary which has bits specified by the following macro set
255 * in its ELF header flags.
256 */
257#ifdef CONFIG_MIPS_O32_FP64_SUPPORT
258# define __MIPS_O32_FP64_MUST_BE_ZERO 0
259#else
260# define __MIPS_O32_FP64_MUST_BE_ZERO EF_MIPS_FP64
261#endif
262
263#define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS)
264
265#define vmcore_elf32_check_arch mips_elf_check_machine
266#define vmcore_elf64_check_arch mips_elf_check_machine
267
268/*
269 * Return non-zero if HDR identifies an o32 ELF binary.
270 */
271#define elfo32_check_arch(hdr) \
272({ \
273 int __res = 1; \
274 struct elfhdr *__h = (hdr); \
275 \
276 if (!mips_elf_check_machine(__h)) \
277 __res = 0; \
278 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
279 __res = 0; \
280 if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
281 __res = 0; \
282 if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
283 ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
284 __res = 0; \
285 if (__h->e_flags & __MIPS_O32_FP64_MUST_BE_ZERO) \
286 __res = 0; \
287 \
288 __res; \
289})
290
291/*
292 * Return non-zero if HDR identifies an n64 ELF binary.
293 */
294#define elfn64_check_arch(hdr) \
295({ \
296 int __res = 1; \
297 struct elfhdr *__h = (hdr); \
298 \
299 if (!mips_elf_check_machine(__h)) \
300 __res = 0; \
301 if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
302 __res = 0; \
303 \
304 __res; \
305})
306
307/*
308 * Return non-zero if HDR identifies an n32 ELF binary.
309 */
310#define elfn32_check_arch(hdr) \
311({ \
312 int __res = 1; \
313 struct elfhdr *__h = (hdr); \
314 \
315 if (!mips_elf_check_machine(__h)) \
316 __res = 0; \
317 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
318 __res = 0; \
319 if (((__h->e_flags & EF_MIPS_ABI2) == 0) || \
320 ((__h->e_flags & EF_MIPS_ABI) != 0)) \
321 __res = 0; \
322 \
323 __res; \
324})
325
326struct mips_abi;
327
328extern struct mips_abi mips_abi;
329extern struct mips_abi mips_abi_32;
330extern struct mips_abi mips_abi_n32;
331
332#ifdef CONFIG_32BIT
333
334#define SET_PERSONALITY2(ex, state) \
335do { \
336 clear_thread_flag(TIF_HYBRID_FPREGS); \
337 set_thread_flag(TIF_32BIT_FPREGS); \
338 \
339 current->thread.abi = &mips_abi; \
340 \
341 mips_set_personality_fp(state); \
342 mips_set_personality_nan(state); \
343 \
344 if (personality(current->personality) != PER_LINUX) \
345 set_personality(PER_LINUX); \
346} while (0)
347
348#endif /* CONFIG_32BIT */
349
350#ifdef CONFIG_64BIT
351
352#ifdef CONFIG_MIPS32_N32
353#define __SET_PERSONALITY32_N32() \
354 do { \
355 set_thread_flag(TIF_32BIT_ADDR); \
356 \
357 current->thread.abi = &mips_abi_n32; \
358 } while (0)
359#else
360#define __SET_PERSONALITY32_N32() \
361 do { } while (0)
362#endif
363
364#ifdef CONFIG_MIPS32_O32
365#define __SET_PERSONALITY32_O32(ex, state) \
366 do { \
367 set_thread_flag(TIF_32BIT_REGS); \
368 set_thread_flag(TIF_32BIT_ADDR); \
369 clear_thread_flag(TIF_HYBRID_FPREGS); \
370 set_thread_flag(TIF_32BIT_FPREGS); \
371 \
372 current->thread.abi = &mips_abi_32; \
373 \
374 mips_set_personality_fp(state); \
375 } while (0)
376#else
377#define __SET_PERSONALITY32_O32(ex, state) \
378 do { } while (0)
379#endif
380
381#ifdef CONFIG_MIPS32_COMPAT
382#define __SET_PERSONALITY32(ex, state) \
383do { \
384 if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
385 ((ex).e_flags & EF_MIPS_ABI) == 0) \
386 __SET_PERSONALITY32_N32(); \
387 else \
388 __SET_PERSONALITY32_O32(ex, state); \
389} while (0)
390#else
391#define __SET_PERSONALITY32(ex, state) do { } while (0)
392#endif
393
394#define SET_PERSONALITY2(ex, state) \
395do { \
396 unsigned int p; \
397 \
398 clear_thread_flag(TIF_32BIT_REGS); \
399 clear_thread_flag(TIF_32BIT_FPREGS); \
400 clear_thread_flag(TIF_HYBRID_FPREGS); \
401 clear_thread_flag(TIF_32BIT_ADDR); \
402 \
403 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
404 __SET_PERSONALITY32(ex, state); \
405 else \
406 current->thread.abi = &mips_abi; \
407 \
408 mips_set_personality_nan(state); \
409 \
410 p = personality(current->personality); \
411 if (p != PER_LINUX32 && p != PER_LINUX) \
412 set_personality(PER_LINUX); \
413} while (0)
414
415#endif /* CONFIG_64BIT */
416
417#define CORE_DUMP_USE_REGSET
418#define ELF_EXEC_PAGESIZE PAGE_SIZE
419
420/* This yields a mask that user programs can use to figure out what
421 instruction set this cpu supports. This could be done in userspace,
422 but it's not easy, and we've already done it here. */
423
424#define ELF_HWCAP (elf_hwcap)
425extern unsigned int elf_hwcap;
426#include <asm/hwcap.h>
427
428/*
429 * This yields a string that ld.so will use to load implementation
430 * specific libraries for optimization. This is more specific in
431 * intent than poking at uname or /proc/cpuinfo.
432 */
433
434#define ELF_PLATFORM __elf_platform
435extern const char *__elf_platform;
436
437/*
438 * See comments in asm-alpha/elf.h, this is the same thing
439 * on the MIPS.
440 */
441#define ELF_PLAT_INIT(_r, load_addr) do { \
442 _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
443 _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
444 _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
445 _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
446 _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
447 _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
448 _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
449 _r->regs[30] = _r->regs[31] = 0; \
450} while (0)
451
452/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
453 use of this is to invoke "./ld.so someprog" to test out a new version of
454 the loader. We need to make sure that it is out of the way of the program
455 that it will "exec", and that there is sufficient room for the brk. */
456
457#ifndef ELF_ET_DYN_BASE
458#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
459#endif
460
461/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
462#define ARCH_DLINFO \
463do { \
464 NEW_AUX_ENT(AT_SYSINFO_EHDR, \
465 (unsigned long)current->mm->context.vdso); \
466} while (0)
467
468#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
469struct linux_binprm;
470extern int arch_setup_additional_pages(struct linux_binprm *bprm,
471 int uses_interp);
472
473struct arch_elf_state {
474 int nan_2008;
475 int fp_abi;
476 int interp_fp_abi;
477 int overall_fp_mode;
478};
479
480#define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (kernel internal) */
481
482#define INIT_ARCH_ELF_STATE { \
483 .nan_2008 = -1, \
484 .fp_abi = MIPS_ABI_FP_UNKNOWN, \
485 .interp_fp_abi = MIPS_ABI_FP_UNKNOWN, \
486 .overall_fp_mode = -1, \
487}
488
489/* Whether to accept legacy-NaN and 2008-NaN user binaries. */
490extern bool mips_use_nan_legacy;
491extern bool mips_use_nan_2008;
492
493extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
494 bool is_interp, struct arch_elf_state *state);
495
496extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
497 struct arch_elf_state *state);
498
499extern void mips_set_personality_nan(struct arch_elf_state *state);
500extern void mips_set_personality_fp(struct arch_elf_state *state);
501
502#define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk)
503extern int mips_elf_read_implies_exec(void *elf_ex, int exstack);
504
505#endif /* _ASM_ELF_H */