1/* arch/arm/mach-msm/io.c
  2 *
  3 * MSM7K, QSD io support
  4 *
  5 * Copyright (C) 2007 Google, Inc.
  6 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
  7 * Author: Brian Swetland <swetland@google.com>
  8 *
  9 * This software is licensed under the terms of the GNU General Public
 10 * License version 2, as published by the Free Software Foundation, and
 11 * may be copied, distributed, and modified under those terms.
 12 *
 13 * This program is distributed in the hope that it will be useful,
 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16 * GNU General Public License for more details.
 17 *
 18 */
 19
 20#include <linux/kernel.h>
 21#include <linux/init.h>
 22#include <linux/io.h>
 23
 24#include <mach/hardware.h>
 25#include <asm/page.h>
 26#include <mach/msm_iomap.h>
 27#include <asm/mach/map.h>
 28
 29#include <mach/board.h>
 30
 31#define MSM_CHIP_DEVICE(name, chip) {			      \
 32		.virtual = (unsigned long) MSM_##name##_BASE, \
 33		.pfn = __phys_to_pfn(chip##_##name##_PHYS), \
 34		.length = chip##_##name##_SIZE, \
 35		.type = MT_DEVICE_NONSHARED, \
 36	 }
 37
 38#define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM)
 39
 40#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X27) \
 41	|| defined(CONFIG_ARCH_MSM7X25)
 42static struct map_desc msm_io_desc[] __initdata = {
 43	MSM_DEVICE(VIC),
 44	MSM_CHIP_DEVICE(CSR, MSM7X00),
 45	MSM_DEVICE(DMOV),
 46	MSM_CHIP_DEVICE(GPIO1, MSM7X00),
 47	MSM_CHIP_DEVICE(GPIO2, MSM7X00),
 48	MSM_DEVICE(CLK_CTL),
 49#ifdef CONFIG_MSM_DEBUG_UART
 50	MSM_DEVICE(DEBUG_UART),
 51#endif
 52#ifdef CONFIG_ARCH_MSM7X30
 53	MSM_DEVICE(GCC),
 54#endif
 55	{
 56		.virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
 57		.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
 58		.length =   MSM_SHARED_RAM_SIZE,
 59		.type =     MT_DEVICE,
 60	},
 61};
 62
 63void __init msm_map_common_io(void)
 64{
 65	/* Make sure the peripheral register window is closed, since
 66	 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
 67	 * pages are peripheral interface or not.
 68	 */
 69	asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
 70	iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
 71}
 72#endif
 73
 74#ifdef CONFIG_ARCH_QSD8X50
 75static struct map_desc qsd8x50_io_desc[] __initdata = {
 76	MSM_DEVICE(VIC),
 77	MSM_CHIP_DEVICE(CSR, QSD8X50),
 78	MSM_DEVICE(DMOV),
 79	MSM_CHIP_DEVICE(GPIO1, QSD8X50),
 80	MSM_CHIP_DEVICE(GPIO2, QSD8X50),
 81	MSM_DEVICE(CLK_CTL),
 82	MSM_DEVICE(SIRC),
 83	MSM_DEVICE(SCPLL),
 84	MSM_DEVICE(AD5),
 85	MSM_DEVICE(MDC),
 86#ifdef CONFIG_MSM_DEBUG_UART
 87	MSM_DEVICE(DEBUG_UART),
 88#endif
 89	{
 90		.virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
 91		.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
 92		.length =   MSM_SHARED_RAM_SIZE,
 93		.type =     MT_DEVICE,
 94	},
 95};
 96
 97void __init msm_map_qsd8x50_io(void)
 98{
 99	iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
100}
101#endif /* CONFIG_ARCH_QSD8X50 */
102
103#ifdef CONFIG_ARCH_MSM8X60
104static struct map_desc msm8x60_io_desc[] __initdata = {
105	MSM_CHIP_DEVICE(QGIC_DIST, MSM8X60),
106	MSM_CHIP_DEVICE(QGIC_CPU, MSM8X60),
107	MSM_CHIP_DEVICE(TMR, MSM8X60),
108	MSM_CHIP_DEVICE(TMR0, MSM8X60),
109	MSM_DEVICE(ACC),
110	MSM_DEVICE(GCC),
111};
112
113void __init msm_map_msm8x60_io(void)
114{
115	iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
116}
117#endif /* CONFIG_ARCH_MSM8X60 */
118
119#ifdef CONFIG_ARCH_MSM8960
120static struct map_desc msm8960_io_desc[] __initdata = {
121	MSM_CHIP_DEVICE(QGIC_DIST, MSM8960),
122	MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
123	MSM_CHIP_DEVICE(TMR, MSM8960),
124	MSM_CHIP_DEVICE(TMR0, MSM8960),
125};
126
127void __init msm_map_msm8960_io(void)
128{
129	iotable_init(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
130}
131#endif /* CONFIG_ARCH_MSM8960 */
132
133#ifdef CONFIG_ARCH_MSM7X30
134static struct map_desc msm7x30_io_desc[] __initdata = {
135	MSM_DEVICE(VIC),
136	MSM_CHIP_DEVICE(CSR, MSM7X30),
137	MSM_DEVICE(DMOV),
138	MSM_CHIP_DEVICE(GPIO1, MSM7X30),
139	MSM_CHIP_DEVICE(GPIO2, MSM7X30),
140	MSM_DEVICE(CLK_CTL),
141	MSM_DEVICE(CLK_CTL_SH2),
142	MSM_DEVICE(AD5),
143	MSM_DEVICE(MDC),
144	MSM_DEVICE(ACC),
145	MSM_DEVICE(SAW),
146	MSM_DEVICE(GCC),
147	MSM_DEVICE(TCSR),
148#ifdef CONFIG_MSM_DEBUG_UART
149	MSM_DEVICE(DEBUG_UART),
150#endif
151	{
152		.virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
153		.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
154		.length =   MSM_SHARED_RAM_SIZE,
155		.type =     MT_DEVICE,
156	},
157};
158
159void __init msm_map_msm7x30_io(void)
160{
161	iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
162}
163#endif /* CONFIG_ARCH_MSM7X30 */
164
165void __iomem *
166__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
167{
168	if (mtype == MT_DEVICE) {
169		/* The peripherals in the 88000000 - D0000000 range
170		 * are only accessible by type MT_DEVICE_NONSHARED.
171		 * Adjust mtype as necessary to make this "just work."
172		 */
173		if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
174			mtype = MT_DEVICE_NONSHARED;
175	}
176
177	return __arm_ioremap_caller(phys_addr, size, mtype,
178		__builtin_return_address(0));
179}
180EXPORT_SYMBOL(__msm_ioremap);