1#include <linux/sh_intc.h>
  2#include <linux/irq.h>
 
  3#include <linux/list.h>
  4#include <linux/kernel.h>
  5#include <linux/types.h>
  6#include <linux/radix-tree.h>
  7#include <linux/sysdev.h>
  8
  9#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
 10	((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
 11	 ((addr_e) << 16) | ((addr_d << 24)))
 12
 13#define _INTC_SHIFT(h)		(h & 0x1f)
 14#define _INTC_WIDTH(h)		((h >> 5) & 0xf)
 15#define _INTC_FN(h)		((h >> 9) & 0xf)
 16#define _INTC_MODE(h)		((h >> 13) & 0x7)
 17#define _INTC_ADDR_E(h)		((h >> 16) & 0xff)
 18#define _INTC_ADDR_D(h)		((h >> 24) & 0xff)
 19
 20#ifdef CONFIG_SMP
 21#define IS_SMP(x)		(x.smp)
 22#define INTC_REG(d, x, c)	(d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
 23#define SMP_NR(d, x)		((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
 24#else
 25#define IS_SMP(x)		0
 26#define INTC_REG(d, x, c)	(d->reg[(x)])
 27#define SMP_NR(d, x)		1
 28#endif
 29
 30struct intc_handle_int {
 31	unsigned int irq;
 32	unsigned long handle;
 33};
 34
 35struct intc_window {
 36	phys_addr_t phys;
 37	void __iomem *virt;
 38	unsigned long size;
 39};
 40
 41struct intc_map_entry {
 42	intc_enum enum_id;
 43	struct intc_desc_int *desc;
 44};
 45
 46struct intc_subgroup_entry {
 47	unsigned int pirq;
 48	intc_enum enum_id;
 49	unsigned long handle;
 50};
 51
 52struct intc_desc_int {
 53	struct list_head list;
 54	struct sys_device sysdev;
 55	struct radix_tree_root tree;
 56	raw_spinlock_t lock;
 57	unsigned int index;
 58	unsigned long *reg;
 59#ifdef CONFIG_SMP
 60	unsigned long *smp;
 61#endif
 62	unsigned int nr_reg;
 63	struct intc_handle_int *prio;
 64	unsigned int nr_prio;
 65	struct intc_handle_int *sense;
 66	unsigned int nr_sense;
 67	struct intc_window *window;
 68	unsigned int nr_windows;
 
 69	struct irq_chip chip;
 
 70};
 71
 72
 73enum {
 74	REG_FN_ERR = 0,
 75	REG_FN_TEST_BASE = 1,
 76	REG_FN_WRITE_BASE = 5,
 77	REG_FN_MODIFY_BASE = 9
 78};
 79
 80enum {	MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
 81	MODE_MASK_REG,       /* Bit(s) set -> interrupt disabled */
 82	MODE_DUAL_REG,       /* Two registers, set bit to enable / disable */
 83	MODE_PRIO_REG,       /* Priority value written to enable interrupt */
 84	MODE_PCLR_REG,       /* Above plus all bits set to disable interrupt */
 85};
 86
 87static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
 88{
 89	struct irq_chip *chip = irq_get_chip(irq);
 90
 91	return container_of(chip, struct intc_desc_int, chip);
 92}
 93
 94/*
 95 * Grumble.
 96 */
 97static inline void activate_irq(int irq)
 98{
 99#ifdef CONFIG_ARM
100	/* ARM requires an extra step to clear IRQ_NOREQUEST, which it
101	 * sets on behalf of every irq_chip.  Also sets IRQ_NOPROBE.
102	 */
103	set_irq_flags(irq, IRQF_VALID);
104#else
105	/* same effect on other architectures */
106	irq_set_noprobe(irq);
107#endif
108}
109
110/* access.c */
111extern unsigned long
112(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);
113
114extern unsigned long
115(*intc_enable_fns[])(unsigned long addr, unsigned long handle,
116		     unsigned long (*fn)(unsigned long,
117				unsigned long, unsigned long),
118		     unsigned int irq);
119extern unsigned long
120(*intc_disable_fns[])(unsigned long addr, unsigned long handle,
121		      unsigned long (*fn)(unsigned long,
122				unsigned long, unsigned long),
123		      unsigned int irq);
124extern unsigned long
125(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
126		            unsigned long (*fn)(unsigned long,
127				unsigned long, unsigned long),
128			    unsigned int irq);
129
130unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
131unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
132unsigned int intc_set_field_from_handle(unsigned int value,
133			    unsigned int field_value,
134			    unsigned int handle);
135unsigned long intc_get_field_from_handle(unsigned int value,
136					 unsigned int handle);
137
138/* balancing.c */
139#ifdef CONFIG_INTC_BALANCING
140void intc_balancing_enable(unsigned int irq);
141void intc_balancing_disable(unsigned int irq);
142void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
143			  struct intc_desc_int *d, intc_enum id);
144#else
145static inline void intc_balancing_enable(unsigned int irq) { }
146static inline void intc_balancing_disable(unsigned int irq) { }
147static inline void
148intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
149		     struct intc_desc_int *d, intc_enum id) { }
150#endif
151
152/* chip.c */
153extern struct irq_chip intc_irq_chip;
154void _intc_enable(struct irq_data *data, unsigned long handle);
155
156/* core.c */
157extern struct list_head intc_list;
158extern raw_spinlock_t intc_big_lock;
159extern unsigned int nr_intc_controllers;
160extern struct sysdev_class intc_sysdev_class;
161
162unsigned int intc_get_dfl_prio_level(void);
163unsigned int intc_get_prio_level(unsigned int irq);
164void intc_set_prio_level(unsigned int irq, unsigned int level);
165
166/* handle.c */
167unsigned int intc_get_mask_handle(struct intc_desc *desc,
168				  struct intc_desc_int *d,
169				  intc_enum enum_id, int do_grps);
170unsigned int intc_get_prio_handle(struct intc_desc *desc,
171				  struct intc_desc_int *d,
172				  intc_enum enum_id, int do_grps);
173unsigned int intc_get_sense_handle(struct intc_desc *desc,
174				   struct intc_desc_int *d,
175				   intc_enum enum_id);
176void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
177			 struct intc_desc_int *d, intc_enum id);
178unsigned long intc_get_ack_handle(unsigned int irq);
179void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
180			      intc_enum enum_id, int enable);
 
 
 
181
182/* virq.c */
183void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
184void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
185struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);

  1#include <linux/sh_intc.h>
  2#include <linux/irq.h>
  3#include <linux/irqdomain.h>
  4#include <linux/list.h>
  5#include <linux/kernel.h>
  6#include <linux/types.h>
  7#include <linux/radix-tree.h>
  8#include <linux/device.h>
  9
 10#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
 11	((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
 12	 ((addr_e) << 16) | ((addr_d << 24)))
 13
 14#define _INTC_SHIFT(h)		(h & 0x1f)
 15#define _INTC_WIDTH(h)		((h >> 5) & 0xf)
 16#define _INTC_FN(h)		((h >> 9) & 0xf)
 17#define _INTC_MODE(h)		((h >> 13) & 0x7)
 18#define _INTC_ADDR_E(h)		((h >> 16) & 0xff)
 19#define _INTC_ADDR_D(h)		((h >> 24) & 0xff)
 20
 21#ifdef CONFIG_SMP
 22#define IS_SMP(x)		(x.smp)
 23#define INTC_REG(d, x, c)	(d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
 24#define SMP_NR(d, x)		((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
 25#else
 26#define IS_SMP(x)		0
 27#define INTC_REG(d, x, c)	(d->reg[(x)])
 28#define SMP_NR(d, x)		1
 29#endif
 30
 31struct intc_handle_int {
 32	unsigned int irq;
 33	unsigned long handle;
 34};
 35
 36struct intc_window {
 37	phys_addr_t phys;
 38	void __iomem *virt;
 39	unsigned long size;
 40};
 41
 42struct intc_map_entry {
 43	intc_enum enum_id;
 44	struct intc_desc_int *desc;
 45};
 46
 47struct intc_subgroup_entry {
 48	unsigned int pirq;
 49	intc_enum enum_id;
 50	unsigned long handle;
 51};
 52
 53struct intc_desc_int {
 54	struct list_head list;
 55	struct device dev;
 56	struct radix_tree_root tree;
 57	raw_spinlock_t lock;
 58	unsigned int index;
 59	unsigned long *reg;
 60#ifdef CONFIG_SMP
 61	unsigned long *smp;
 62#endif
 63	unsigned int nr_reg;
 64	struct intc_handle_int *prio;
 65	unsigned int nr_prio;
 66	struct intc_handle_int *sense;
 67	unsigned int nr_sense;
 68	struct intc_window *window;
 69	unsigned int nr_windows;
 70	struct irq_domain *domain;
 71	struct irq_chip chip;
 72	bool skip_suspend;
 73};
 74
 75
 76enum {
 77	REG_FN_ERR = 0,
 78	REG_FN_TEST_BASE = 1,
 79	REG_FN_WRITE_BASE = 5,
 80	REG_FN_MODIFY_BASE = 9
 81};
 82
 83enum {	MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
 84	MODE_MASK_REG,       /* Bit(s) set -> interrupt disabled */
 85	MODE_DUAL_REG,       /* Two registers, set bit to enable / disable */
 86	MODE_PRIO_REG,       /* Priority value written to enable interrupt */
 87	MODE_PCLR_REG,       /* Above plus all bits set to disable interrupt */
 88};
 89
 90static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
 91{
 92	struct irq_chip *chip = irq_get_chip(irq);
 93
 94	return container_of(chip, struct intc_desc_int, chip);
 95}
 96
 97/*
 98 * Grumble.
 99 */
100static inline void activate_irq(int irq)
101{
102	irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
103}
104
105static inline int intc_handle_int_cmp(const void *a, const void *b)
106{
107	const struct intc_handle_int *_a = a;
108	const struct intc_handle_int *_b = b;
109
110	return _a->irq - _b->irq;
111}
112
113/* access.c */
114extern unsigned long
115(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);
116
117extern unsigned long
118(*intc_enable_fns[])(unsigned long addr, unsigned long handle,
119		     unsigned long (*fn)(unsigned long,
120				unsigned long, unsigned long),
121		     unsigned int irq);
122extern unsigned long
123(*intc_disable_fns[])(unsigned long addr, unsigned long handle,
124		      unsigned long (*fn)(unsigned long,
125				unsigned long, unsigned long),
126		      unsigned int irq);
127extern unsigned long
128(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
129		            unsigned long (*fn)(unsigned long,
130				unsigned long, unsigned long),
131			    unsigned int irq);
132
133unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
134unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
135unsigned int intc_set_field_from_handle(unsigned int value,
136			    unsigned int field_value,
137			    unsigned int handle);
138unsigned long intc_get_field_from_handle(unsigned int value,
139					 unsigned int handle);
140
141/* balancing.c */
142#ifdef CONFIG_INTC_BALANCING
143void intc_balancing_enable(unsigned int irq);
144void intc_balancing_disable(unsigned int irq);
145void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
146			  struct intc_desc_int *d, intc_enum id);
147#else
148static inline void intc_balancing_enable(unsigned int irq) { }
149static inline void intc_balancing_disable(unsigned int irq) { }
150static inline void
151intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
152		     struct intc_desc_int *d, intc_enum id) { }
153#endif
154
155/* chip.c */
156extern struct irq_chip intc_irq_chip;
157void _intc_enable(struct irq_data *data, unsigned long handle);
158
159/* core.c */
160extern struct list_head intc_list;
161extern raw_spinlock_t intc_big_lock;
162extern struct bus_type intc_subsys;
 
163
164unsigned int intc_get_dfl_prio_level(void);
165unsigned int intc_get_prio_level(unsigned int irq);
166void intc_set_prio_level(unsigned int irq, unsigned int level);
167
168/* handle.c */
169unsigned int intc_get_mask_handle(struct intc_desc *desc,
170				  struct intc_desc_int *d,
171				  intc_enum enum_id, int do_grps);
172unsigned int intc_get_prio_handle(struct intc_desc *desc,
173				  struct intc_desc_int *d,
174				  intc_enum enum_id, int do_grps);
175unsigned int intc_get_sense_handle(struct intc_desc *desc,
176				   struct intc_desc_int *d,
177				   intc_enum enum_id);
178void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
179			 struct intc_desc_int *d, intc_enum id);
180unsigned long intc_get_ack_handle(unsigned int irq);
181void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
182			      intc_enum enum_id, int enable);
183
184/* irqdomain.c */
185void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw);
186
187/* virq.c */
188void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
189void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
190struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);