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v3.1
 1#
 2# Generic HWSPINLOCK framework
 3#
 4
 
 5config HWSPINLOCK
 6	tristate "Generic Hardware Spinlock framework"
 7	depends on ARCH_OMAP4
 8	help
 9	  Say y here to support the generic hardware spinlock framework.
10	  You only need to enable this if you have hardware spinlock module
11	  on your system (usually only relevant if your system has remote slave
12	  coprocessors).
13
14	  If unsure, say N.
15
16config HWSPINLOCK_OMAP
17	tristate "OMAP Hardware Spinlock device"
18	depends on HWSPINLOCK && ARCH_OMAP4
 
19	help
20	  Say y here to support the OMAP Hardware Spinlock device (firstly
21	  introduced in OMAP4).
22
23	  If unsure, say N.
v4.10.11
 1#
 2# Generic HWSPINLOCK framework
 3#
 4
 5# HWSPINLOCK always gets selected by whoever wants it.
 6config HWSPINLOCK
 7	tristate
 
 
 
 
 
 
 8
 9menu "Hardware Spinlock drivers"
10
11config HWSPINLOCK_OMAP
12	tristate "OMAP Hardware Spinlock device"
13	depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX
14	select HWSPINLOCK
15	help
16	  Say y here to support the OMAP Hardware Spinlock device (firstly
17	  introduced in OMAP4).
18
19	  If unsure, say N.
20
21config HWSPINLOCK_QCOM
22	tristate "Qualcomm Hardware Spinlock device"
23	depends on ARCH_QCOM
24	select HWSPINLOCK
25	select MFD_SYSCON
26	help
27	  Say y here to support the Qualcomm Hardware Mutex functionality, which
28	  provides a synchronisation mechanism for the various processors on
29	  the SoC.
30
31	  If unsure, say N.
32
33config HWSPINLOCK_SIRF
34	tristate "SIRF Hardware Spinlock device"
35	depends on ARCH_SIRF
36	select HWSPINLOCK
37	help
38	  Say y here to support the SIRF Hardware Spinlock device, which
39	  provides a synchronisation mechanism for the various processors
40	  on the SoC.
41
42	  It's safe to say n here if you're not interested in SIRF hardware
43	  spinlock or just want a bare minimum kernel.
44
45config HSEM_U8500
46	tristate "STE Hardware Semaphore functionality"
47	depends on ARCH_U8500
48	select HWSPINLOCK
49	help
50	  Say y here to support the STE Hardware Semaphore functionality, which
51	  provides a synchronisation mechanism for the various processor on the
52	  SoC.
53
54	  If unsure, say N.
55
56endmenu