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  1/*
  2 * Copyright (C) 2015 Red Hat, Inc.
  3 * All Rights Reserved.
  4 *
  5 * Permission is hereby granted, free of charge, to any person obtaining
  6 * a copy of this software and associated documentation files (the
  7 * "Software"), to deal in the Software without restriction, including
  8 * without limitation the rights to use, copy, modify, merge, publish,
  9 * distribute, sublicense, and/or sell copies of the Software, and to
 10 * permit persons to whom the Software is furnished to do so, subject to
 11 * the following conditions:
 12 *
 13 * The above copyright notice and this permission notice (including the
 14 * next paragraph) shall be included in all copies or substantial
 15 * portions of the Software.
 16 *
 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 24 */
 25
 26#ifndef VIRTIO_DRV_H
 27#define VIRTIO_DRV_H
 28
 29#include <linux/virtio.h>
 30#include <linux/virtio_ids.h>
 31#include <linux/virtio_config.h>
 32#include <linux/virtio_gpu.h>
 33
 34#include <drm/drmP.h>
 35#include <drm/drm_gem.h>
 36#include <drm/drm_atomic.h>
 37#include <drm/drm_crtc_helper.h>
 38#include <ttm/ttm_bo_api.h>
 39#include <ttm/ttm_bo_driver.h>
 40#include <ttm/ttm_placement.h>
 41#include <ttm/ttm_module.h>
 42
 43#define DRIVER_NAME "virtio_gpu"
 44#define DRIVER_DESC "virtio GPU"
 45#define DRIVER_DATE "0"
 46
 47#define DRIVER_MAJOR 0
 48#define DRIVER_MINOR 0
 49#define DRIVER_PATCHLEVEL 1
 50
 51/* virtgpu_drm_bus.c */
 52int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
 53
 54struct virtio_gpu_object {
 55	struct drm_gem_object gem_base;
 56	uint32_t hw_res_handle;
 57
 58	struct sg_table *pages;
 59	void *vmap;
 60	bool dumb;
 61	struct ttm_place                placement_code;
 62	struct ttm_placement		placement;
 63	struct ttm_buffer_object	tbo;
 64	struct ttm_bo_kmap_obj		kmap;
 65};
 66#define gem_to_virtio_gpu_obj(gobj) \
 67	container_of((gobj), struct virtio_gpu_object, gem_base)
 68
 69struct virtio_gpu_vbuffer;
 70struct virtio_gpu_device;
 71
 72typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
 73				   struct virtio_gpu_vbuffer *vbuf);
 74
 75struct virtio_gpu_fence_driver {
 76	atomic64_t       last_seq;
 77	uint64_t         sync_seq;
 78	uint64_t         context;
 79	struct list_head fences;
 80	spinlock_t       lock;
 81};
 82
 83struct virtio_gpu_fence {
 84	struct dma_fence f;
 85	struct virtio_gpu_fence_driver *drv;
 86	struct list_head node;
 87	uint64_t seq;
 88};
 89#define to_virtio_fence(x) \
 90	container_of(x, struct virtio_gpu_fence, f)
 91
 92struct virtio_gpu_vbuffer {
 93	char *buf;
 94	int size;
 95
 96	void *data_buf;
 97	uint32_t data_size;
 98
 99	char *resp_buf;
100	int resp_size;
101
102	virtio_gpu_resp_cb resp_cb;
103
104	struct list_head list;
105};
106
107struct virtio_gpu_output {
108	int index;
109	struct drm_crtc crtc;
110	struct drm_connector conn;
111	struct drm_encoder enc;
112	struct virtio_gpu_display_one info;
113	struct virtio_gpu_update_cursor cursor;
114	int cur_x;
115	int cur_y;
116};
117#define drm_crtc_to_virtio_gpu_output(x) \
118	container_of(x, struct virtio_gpu_output, crtc)
119#define drm_connector_to_virtio_gpu_output(x) \
120	container_of(x, struct virtio_gpu_output, conn)
121#define drm_encoder_to_virtio_gpu_output(x) \
122	container_of(x, struct virtio_gpu_output, enc)
123
124struct virtio_gpu_framebuffer {
125	struct drm_framebuffer base;
126	struct drm_gem_object *obj;
127	int x1, y1, x2, y2; /* dirty rect */
128	spinlock_t dirty_lock;
129	uint32_t hw_res_handle;
130};
131#define to_virtio_gpu_framebuffer(x) \
132	container_of(x, struct virtio_gpu_framebuffer, base)
133
134struct virtio_gpu_mman {
135	struct ttm_bo_global_ref        bo_global_ref;
136	struct drm_global_reference	mem_global_ref;
137	bool				mem_global_referenced;
138	struct ttm_bo_device		bdev;
139};
140
141struct virtio_gpu_fbdev;
142
143struct virtio_gpu_queue {
144	struct virtqueue *vq;
145	spinlock_t qlock;
146	wait_queue_head_t ack_queue;
147	struct work_struct dequeue_work;
148};
149
150struct virtio_gpu_drv_capset {
151	uint32_t id;
152	uint32_t max_version;
153	uint32_t max_size;
154};
155
156struct virtio_gpu_drv_cap_cache {
157	struct list_head head;
158	void *caps_cache;
159	uint32_t id;
160	uint32_t version;
161	uint32_t size;
162	atomic_t is_valid;
163};
164
165struct virtio_gpu_device {
166	struct device *dev;
167	struct drm_device *ddev;
168
169	struct virtio_device *vdev;
170
171	struct virtio_gpu_mman mman;
172
173	/* pointer to fbdev info structure */
174	struct virtio_gpu_fbdev *vgfbdev;
175	struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
176	uint32_t num_scanouts;
177
178	struct virtio_gpu_queue ctrlq;
179	struct virtio_gpu_queue cursorq;
180	struct list_head free_vbufs;
181	spinlock_t free_vbufs_lock;
182	void *vbufs;
183	bool vqs_ready;
184
185	struct idr	resource_idr;
186	spinlock_t resource_idr_lock;
187
188	wait_queue_head_t resp_wq;
189	/* current display info */
190	spinlock_t display_info_lock;
191	bool display_info_pending;
192
193	struct virtio_gpu_fence_driver fence_drv;
194
195	struct idr	ctx_id_idr;
196	spinlock_t ctx_id_idr_lock;
197
198	bool has_virgl_3d;
199
200	struct work_struct config_changed_work;
201
202	struct virtio_gpu_drv_capset *capsets;
203	uint32_t num_capsets;
204	struct list_head cap_cache;
205};
206
207struct virtio_gpu_fpriv {
208	uint32_t ctx_id;
209};
210
211/* virtio_ioctl.c */
212#define DRM_VIRTIO_NUM_IOCTLS 10
213extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
214
215/* virtio_kms.c */
216int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags);
217int virtio_gpu_driver_unload(struct drm_device *dev);
218int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
219void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
220
221/* virtio_gem.c */
222void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
223int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
224void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
225int virtio_gpu_gem_create(struct drm_file *file,
226			  struct drm_device *dev,
227			  uint64_t size,
228			  struct drm_gem_object **obj_p,
229			  uint32_t *handle_p);
230int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
231			       struct drm_file *file);
232void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
233				 struct drm_file *file);
234struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
235						  size_t size, bool kernel,
236						  bool pinned);
237int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
238				struct drm_device *dev,
239				struct drm_mode_create_dumb *args);
240int virtio_gpu_mode_dumb_destroy(struct drm_file *file_priv,
241				 struct drm_device *dev,
242				 uint32_t handle);
243int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
244			      struct drm_device *dev,
245			      uint32_t handle, uint64_t *offset_p);
246
247/* virtio_fb */
248#define VIRTIO_GPUFB_CONN_LIMIT 1
249int virtio_gpu_fbdev_init(struct virtio_gpu_device *vgdev);
250void virtio_gpu_fbdev_fini(struct virtio_gpu_device *vgdev);
251int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
252			     struct drm_clip_rect *clips,
253			     unsigned num_clips);
254/* virtio vg */
255int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
256void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
257void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
258			       uint32_t *resid);
259void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id);
260void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
261				    uint32_t resource_id,
262				    uint32_t format,
263				    uint32_t width,
264				    uint32_t height);
265void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
266				   uint32_t resource_id);
267void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
268					uint32_t resource_id, uint64_t offset,
269					__le32 width, __le32 height,
270					__le32 x, __le32 y,
271					struct virtio_gpu_fence **fence);
272void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
273				   uint32_t resource_id,
274				   uint32_t x, uint32_t y,
275				   uint32_t width, uint32_t height);
276void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
277				uint32_t scanout_id, uint32_t resource_id,
278				uint32_t width, uint32_t height,
279				uint32_t x, uint32_t y);
280int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
281			     struct virtio_gpu_object *obj,
282			     uint32_t resource_id,
283			     struct virtio_gpu_fence **fence);
284int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
285int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
286void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
287			    struct virtio_gpu_output *output);
288int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
289void virtio_gpu_cmd_resource_inval_backing(struct virtio_gpu_device *vgdev,
290					   uint32_t resource_id);
291int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
292int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
293			      int idx, int version,
294			      struct virtio_gpu_drv_cap_cache **cache_p);
295void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
296				   uint32_t nlen, const char *name);
297void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
298				    uint32_t id);
299void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
300					    uint32_t ctx_id,
301					    uint32_t resource_id);
302void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
303					    uint32_t ctx_id,
304					    uint32_t resource_id);
305void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
306			   void *data, uint32_t data_size,
307			   uint32_t ctx_id, struct virtio_gpu_fence **fence);
308void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
309					  uint32_t resource_id, uint32_t ctx_id,
310					  uint64_t offset, uint32_t level,
311					  struct virtio_gpu_box *box,
312					  struct virtio_gpu_fence **fence);
313void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
314					uint32_t resource_id, uint32_t ctx_id,
315					uint64_t offset, uint32_t level,
316					struct virtio_gpu_box *box,
317					struct virtio_gpu_fence **fence);
318void
319virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
320				  struct virtio_gpu_resource_create_3d *rc_3d,
321				  struct virtio_gpu_fence **fence);
322void virtio_gpu_ctrl_ack(struct virtqueue *vq);
323void virtio_gpu_cursor_ack(struct virtqueue *vq);
324void virtio_gpu_fence_ack(struct virtqueue *vq);
325void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
326void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
327void virtio_gpu_dequeue_fence_func(struct work_struct *work);
328
329/* virtio_gpu_display.c */
330int virtio_gpu_framebuffer_init(struct drm_device *dev,
331				struct virtio_gpu_framebuffer *vgfb,
332				const struct drm_mode_fb_cmd2 *mode_cmd,
333				struct drm_gem_object *obj);
334int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
335void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
336
337/* virtio_gpu_plane.c */
338struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
339					enum drm_plane_type type,
340					int index);
341
342/* virtio_gpu_ttm.c */
343int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
344void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
345int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
346
347/* virtio_gpu_fence.c */
348int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
349			  struct virtio_gpu_ctrl_hdr *cmd_hdr,
350			  struct virtio_gpu_fence **fence);
351void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
352				    u64 last_seq);
353
354/* virtio_gpu_object */
355int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
356			     unsigned long size, bool kernel, bool pinned,
357			     struct virtio_gpu_object **bo_ptr);
358int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr);
359int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
360				   struct virtio_gpu_object *bo);
361void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
362int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
363
364/* virtgpu_prime.c */
365int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
366void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
367struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
368struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
369        struct drm_device *dev, struct dma_buf_attachment *attach,
370        struct sg_table *sgt);
371void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
372void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
373int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
374                                struct vm_area_struct *vma);
375
376static inline struct virtio_gpu_object*
377virtio_gpu_object_ref(struct virtio_gpu_object *bo)
378{
379	ttm_bo_reference(&bo->tbo);
380	return bo;
381}
382
383static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
384{
385	struct ttm_buffer_object *tbo;
386
387	if ((*bo) == NULL)
388		return;
389	tbo = &((*bo)->tbo);
390	ttm_bo_unref(&tbo);
391	if (tbo == NULL)
392		*bo = NULL;
393}
394
395static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
396{
397	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
398}
399
400static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
401					 bool no_wait)
402{
403	int r;
404
405	r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
406	if (unlikely(r != 0)) {
407		if (r != -ERESTARTSYS) {
408			struct virtio_gpu_device *qdev =
409				bo->gem_base.dev->dev_private;
410			dev_err(qdev->dev, "%p reserve failed\n", bo);
411		}
412		return r;
413	}
414	return 0;
415}
416
417static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
418{
419	ttm_bo_unreserve(&bo->tbo);
420}
421
422/* virgl debufs */
423int virtio_gpu_debugfs_init(struct drm_minor *minor);
424void virtio_gpu_debugfs_takedown(struct drm_minor *minor);
425
426#endif