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1/*
2 * Copyright (C) 2005, 2006 IBM Corporation
3 * Copyright (C) 2014, 2015 Intel Corporation
4 *
5 * Authors:
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
8 *
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 *
11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
13 *
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
20 * License.
21 */
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/pnp.h>
26#include <linux/slab.h>
27#include <linux/interrupt.h>
28#include <linux/wait.h>
29#include <linux/acpi.h>
30#include <linux/freezer.h>
31#include "tpm.h"
32#include "tpm_tis_core.h"
33
34/* Before we attempt to access the TPM we must see that the valid bit is set.
35 * The specification says that this bit is 0 at reset and remains 0 until the
36 * 'TPM has gone through its self test and initialization and has established
37 * correct values in the other bits.'
38 */
39static int wait_startup(struct tpm_chip *chip, int l)
40{
41 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
42 unsigned long stop = jiffies + chip->timeout_a;
43
44 do {
45 int rc;
46 u8 access;
47
48 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
49 if (rc < 0)
50 return rc;
51
52 if (access & TPM_ACCESS_VALID)
53 return 0;
54 msleep(TPM_TIMEOUT);
55 } while (time_before(jiffies, stop));
56 return -1;
57}
58
59static int check_locality(struct tpm_chip *chip, int l)
60{
61 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
62 int rc;
63 u8 access;
64
65 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
66 if (rc < 0)
67 return rc;
68
69 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
70 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
71 return priv->locality = l;
72
73 return -1;
74}
75
76static void release_locality(struct tpm_chip *chip, int l, int force)
77{
78 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
79 int rc;
80 u8 access;
81
82 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
83 if (rc < 0)
84 return;
85
86 if (force || (access &
87 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
88 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
89 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
90
91}
92
93static int request_locality(struct tpm_chip *chip, int l)
94{
95 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
96 unsigned long stop, timeout;
97 long rc;
98
99 if (check_locality(chip, l) >= 0)
100 return l;
101
102 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
103 if (rc < 0)
104 return rc;
105
106 stop = jiffies + chip->timeout_a;
107
108 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
109again:
110 timeout = stop - jiffies;
111 if ((long)timeout <= 0)
112 return -1;
113 rc = wait_event_interruptible_timeout(priv->int_queue,
114 (check_locality
115 (chip, l) >= 0),
116 timeout);
117 if (rc > 0)
118 return l;
119 if (rc == -ERESTARTSYS && freezing(current)) {
120 clear_thread_flag(TIF_SIGPENDING);
121 goto again;
122 }
123 } else {
124 /* wait for burstcount */
125 do {
126 if (check_locality(chip, l) >= 0)
127 return l;
128 msleep(TPM_TIMEOUT);
129 } while (time_before(jiffies, stop));
130 }
131 return -1;
132}
133
134static u8 tpm_tis_status(struct tpm_chip *chip)
135{
136 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
137 int rc;
138 u8 status;
139
140 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
141 if (rc < 0)
142 return 0;
143
144 return status;
145}
146
147static void tpm_tis_ready(struct tpm_chip *chip)
148{
149 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
150
151 /* this causes the current command to be aborted */
152 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
153}
154
155static int get_burstcount(struct tpm_chip *chip)
156{
157 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
158 unsigned long stop;
159 int burstcnt, rc;
160 u32 value;
161
162 /* wait for burstcount */
163 /* which timeout value, spec has 2 answers (c & d) */
164 stop = jiffies + chip->timeout_d;
165 do {
166 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
167 if (rc < 0)
168 return rc;
169
170 burstcnt = (value >> 8) & 0xFFFF;
171 if (burstcnt)
172 return burstcnt;
173 msleep(TPM_TIMEOUT);
174 } while (time_before(jiffies, stop));
175 return -EBUSY;
176}
177
178static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
179{
180 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
181 int size = 0, burstcnt, rc;
182
183 while (size < count) {
184 rc = wait_for_tpm_stat(chip,
185 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
186 chip->timeout_c,
187 &priv->read_queue, true);
188 if (rc < 0)
189 return rc;
190 burstcnt = get_burstcount(chip);
191 if (burstcnt < 0) {
192 dev_err(&chip->dev, "Unable to read burstcount\n");
193 return burstcnt;
194 }
195 burstcnt = min_t(int, burstcnt, count - size);
196
197 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
198 burstcnt, buf + size);
199 if (rc < 0)
200 return rc;
201
202 size += burstcnt;
203 }
204 return size;
205}
206
207static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
208{
209 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
210 int size = 0;
211 int expected, status;
212
213 if (count < TPM_HEADER_SIZE) {
214 size = -EIO;
215 goto out;
216 }
217
218 size = recv_data(chip, buf, TPM_HEADER_SIZE);
219 /* read first 10 bytes, including tag, paramsize, and result */
220 if (size < TPM_HEADER_SIZE) {
221 dev_err(&chip->dev, "Unable to read header\n");
222 goto out;
223 }
224
225 expected = be32_to_cpu(*(__be32 *) (buf + 2));
226 if (expected > count) {
227 size = -EIO;
228 goto out;
229 }
230
231 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
232 expected - TPM_HEADER_SIZE);
233 if (size < expected) {
234 dev_err(&chip->dev, "Unable to read remainder of result\n");
235 size = -ETIME;
236 goto out;
237 }
238
239 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
240 &priv->int_queue, false) < 0) {
241 size = -ETIME;
242 goto out;
243 }
244 status = tpm_tis_status(chip);
245 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
246 dev_err(&chip->dev, "Error left over data\n");
247 size = -EIO;
248 goto out;
249 }
250
251out:
252 tpm_tis_ready(chip);
253 release_locality(chip, priv->locality, 0);
254 return size;
255}
256
257/*
258 * If interrupts are used (signaled by an irq set in the vendor structure)
259 * tpm.c can skip polling for the data to be available as the interrupt is
260 * waited for here
261 */
262static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
263{
264 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
265 int rc, status, burstcnt;
266 size_t count = 0;
267 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
268
269 if (request_locality(chip, 0) < 0)
270 return -EBUSY;
271
272 status = tpm_tis_status(chip);
273 if ((status & TPM_STS_COMMAND_READY) == 0) {
274 tpm_tis_ready(chip);
275 if (wait_for_tpm_stat
276 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
277 &priv->int_queue, false) < 0) {
278 rc = -ETIME;
279 goto out_err;
280 }
281 }
282
283 while (count < len - 1) {
284 burstcnt = get_burstcount(chip);
285 if (burstcnt < 0) {
286 dev_err(&chip->dev, "Unable to read burstcount\n");
287 rc = burstcnt;
288 goto out_err;
289 }
290 burstcnt = min_t(int, burstcnt, len - count - 1);
291 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
292 burstcnt, buf + count);
293 if (rc < 0)
294 goto out_err;
295
296 count += burstcnt;
297
298 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
299 &priv->int_queue, false) < 0) {
300 rc = -ETIME;
301 goto out_err;
302 }
303 status = tpm_tis_status(chip);
304 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
305 rc = -EIO;
306 goto out_err;
307 }
308 }
309
310 /* write last byte */
311 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
312 if (rc < 0)
313 goto out_err;
314
315 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
316 &priv->int_queue, false) < 0) {
317 rc = -ETIME;
318 goto out_err;
319 }
320 status = tpm_tis_status(chip);
321 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
322 rc = -EIO;
323 goto out_err;
324 }
325
326 return 0;
327
328out_err:
329 tpm_tis_ready(chip);
330 release_locality(chip, priv->locality, 0);
331 return rc;
332}
333
334static void disable_interrupts(struct tpm_chip *chip)
335{
336 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
337 u32 intmask;
338 int rc;
339
340 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
341 if (rc < 0)
342 intmask = 0;
343
344 intmask &= ~TPM_GLOBAL_INT_ENABLE;
345 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
346
347 devm_free_irq(chip->dev.parent, priv->irq, chip);
348 priv->irq = 0;
349 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
350}
351
352/*
353 * If interrupts are used (signaled by an irq set in the vendor structure)
354 * tpm.c can skip polling for the data to be available as the interrupt is
355 * waited for here
356 */
357static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
358{
359 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
360 int rc;
361 u32 ordinal;
362 unsigned long dur;
363
364 rc = tpm_tis_send_data(chip, buf, len);
365 if (rc < 0)
366 return rc;
367
368 /* go and do it */
369 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
370 if (rc < 0)
371 goto out_err;
372
373 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
374 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
375
376 if (chip->flags & TPM_CHIP_FLAG_TPM2)
377 dur = tpm2_calc_ordinal_duration(chip, ordinal);
378 else
379 dur = tpm_calc_ordinal_duration(chip, ordinal);
380
381 if (wait_for_tpm_stat
382 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
383 &priv->read_queue, false) < 0) {
384 rc = -ETIME;
385 goto out_err;
386 }
387 }
388 return len;
389out_err:
390 tpm_tis_ready(chip);
391 release_locality(chip, priv->locality, 0);
392 return rc;
393}
394
395static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
396{
397 int rc, irq;
398 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
399
400 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
401 return tpm_tis_send_main(chip, buf, len);
402
403 /* Verify receipt of the expected IRQ */
404 irq = priv->irq;
405 priv->irq = 0;
406 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
407 rc = tpm_tis_send_main(chip, buf, len);
408 priv->irq = irq;
409 chip->flags |= TPM_CHIP_FLAG_IRQ;
410 if (!priv->irq_tested)
411 msleep(1);
412 if (!priv->irq_tested)
413 disable_interrupts(chip);
414 priv->irq_tested = true;
415 return rc;
416}
417
418struct tis_vendor_timeout_override {
419 u32 did_vid;
420 unsigned long timeout_us[4];
421};
422
423static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
424 /* Atmel 3204 */
425 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
426 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
427};
428
429static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
430 unsigned long *timeout_cap)
431{
432 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
433 int i, rc;
434 u32 did_vid;
435
436 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
437 if (rc < 0)
438 return rc;
439
440 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
441 if (vendor_timeout_overrides[i].did_vid != did_vid)
442 continue;
443 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
444 sizeof(vendor_timeout_overrides[i].timeout_us));
445 return true;
446 }
447
448 return false;
449}
450
451/*
452 * Early probing for iTPM with STS_DATA_EXPECT flaw.
453 * Try sending command without itpm flag set and if that
454 * fails, repeat with itpm flag set.
455 */
456static int probe_itpm(struct tpm_chip *chip)
457{
458 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
459 int rc = 0;
460 u8 cmd_getticks[] = {
461 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
462 0x00, 0x00, 0x00, 0xf1
463 };
464 size_t len = sizeof(cmd_getticks);
465 u16 vendor;
466
467 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
468 if (rc < 0)
469 return rc;
470
471 /* probe only iTPMS */
472 if (vendor != TPM_VID_INTEL)
473 return 0;
474
475 rc = tpm_tis_send_data(chip, cmd_getticks, len);
476 if (rc == 0)
477 goto out;
478
479 tpm_tis_ready(chip);
480 release_locality(chip, priv->locality, 0);
481
482 rc = tpm_tis_send_data(chip, cmd_getticks, len);
483 if (rc == 0) {
484 dev_info(&chip->dev, "Detected an iTPM.\n");
485 rc = 1;
486 } else
487 rc = -EFAULT;
488
489out:
490 tpm_tis_ready(chip);
491 release_locality(chip, priv->locality, 0);
492
493 return rc;
494}
495
496static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
497{
498 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
499
500 switch (priv->manufacturer_id) {
501 case TPM_VID_WINBOND:
502 return ((status == TPM_STS_VALID) ||
503 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
504 case TPM_VID_STM:
505 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
506 default:
507 return (status == TPM_STS_COMMAND_READY);
508 }
509}
510
511static irqreturn_t tis_int_handler(int dummy, void *dev_id)
512{
513 struct tpm_chip *chip = dev_id;
514 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
515 u32 interrupt;
516 int i, rc;
517
518 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
519 if (rc < 0)
520 return IRQ_NONE;
521
522 if (interrupt == 0)
523 return IRQ_NONE;
524
525 priv->irq_tested = true;
526 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
527 wake_up_interruptible(&priv->read_queue);
528 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
529 for (i = 0; i < 5; i++)
530 if (check_locality(chip, i) >= 0)
531 break;
532 if (interrupt &
533 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
534 TPM_INTF_CMD_READY_INT))
535 wake_up_interruptible(&priv->int_queue);
536
537 /* Clear interrupts handled with TPM_EOI */
538 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
539 if (rc < 0)
540 return IRQ_NONE;
541
542 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
543 return IRQ_HANDLED;
544}
545
546static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
547{
548 const char *desc = "attempting to generate an interrupt";
549 u32 cap2;
550 cap_t cap;
551
552 if (chip->flags & TPM_CHIP_FLAG_TPM2)
553 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
554 else
555 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc);
556}
557
558/* Register the IRQ and issue a command that will cause an interrupt. If an
559 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
560 * everything and leave in polling mode. Returns 0 on success.
561 */
562static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
563 int flags, int irq)
564{
565 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
566 u8 original_int_vec;
567 int rc;
568 u32 int_status;
569
570 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
571 dev_name(&chip->dev), chip) != 0) {
572 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
573 irq);
574 return -1;
575 }
576 priv->irq = irq;
577
578 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
579 &original_int_vec);
580 if (rc < 0)
581 return rc;
582
583 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
584 if (rc < 0)
585 return rc;
586
587 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
588 if (rc < 0)
589 return rc;
590
591 /* Clear all existing */
592 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
593 if (rc < 0)
594 return rc;
595
596 /* Turn on */
597 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
598 intmask | TPM_GLOBAL_INT_ENABLE);
599 if (rc < 0)
600 return rc;
601
602 priv->irq_tested = false;
603
604 /* Generate an interrupt by having the core call through to
605 * tpm_tis_send
606 */
607 rc = tpm_tis_gen_interrupt(chip);
608 if (rc < 0)
609 return rc;
610
611 /* tpm_tis_send will either confirm the interrupt is working or it
612 * will call disable_irq which undoes all of the above.
613 */
614 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
615 rc = tpm_tis_write8(priv, original_int_vec,
616 TPM_INT_VECTOR(priv->locality));
617 if (rc < 0)
618 return rc;
619
620 return 1;
621 }
622
623 return 0;
624}
625
626/* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
627 * do not have ACPI/etc. We typically expect the interrupt to be declared if
628 * present.
629 */
630static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
631{
632 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
633 u8 original_int_vec;
634 int i, rc;
635
636 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
637 &original_int_vec);
638 if (rc < 0)
639 return;
640
641 if (!original_int_vec) {
642 if (IS_ENABLED(CONFIG_X86))
643 for (i = 3; i <= 15; i++)
644 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
645 i))
646 return;
647 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
648 original_int_vec))
649 return;
650}
651
652void tpm_tis_remove(struct tpm_chip *chip)
653{
654 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
655 u32 reg = TPM_INT_ENABLE(priv->locality);
656 u32 interrupt;
657 int rc;
658
659 rc = tpm_tis_read32(priv, reg, &interrupt);
660 if (rc < 0)
661 interrupt = 0;
662
663 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
664 release_locality(chip, priv->locality, 1);
665}
666EXPORT_SYMBOL_GPL(tpm_tis_remove);
667
668static const struct tpm_class_ops tpm_tis = {
669 .flags = TPM_OPS_AUTO_STARTUP,
670 .status = tpm_tis_status,
671 .recv = tpm_tis_recv,
672 .send = tpm_tis_send,
673 .cancel = tpm_tis_ready,
674 .update_timeouts = tpm_tis_update_timeouts,
675 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
676 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
677 .req_canceled = tpm_tis_req_canceled,
678};
679
680int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
681 const struct tpm_tis_phy_ops *phy_ops,
682 acpi_handle acpi_dev_handle)
683{
684 u32 vendor, intfcaps, intmask;
685 u8 rid;
686 int rc, probe;
687 struct tpm_chip *chip;
688
689 chip = tpmm_chip_alloc(dev, &tpm_tis);
690 if (IS_ERR(chip))
691 return PTR_ERR(chip);
692
693#ifdef CONFIG_ACPI
694 chip->acpi_dev_handle = acpi_dev_handle;
695#endif
696
697 /* Maximum timeouts */
698 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
699 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
700 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
701 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
702 priv->phy_ops = phy_ops;
703 dev_set_drvdata(&chip->dev, priv);
704
705 if (wait_startup(chip, 0) != 0) {
706 rc = -ENODEV;
707 goto out_err;
708 }
709
710 /* Take control of the TPM's interrupt hardware and shut it off */
711 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
712 if (rc < 0)
713 goto out_err;
714
715 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
716 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
717 intmask &= ~TPM_GLOBAL_INT_ENABLE;
718 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
719
720 if (request_locality(chip, 0) != 0) {
721 rc = -ENODEV;
722 goto out_err;
723 }
724
725 rc = tpm2_probe(chip);
726 if (rc)
727 goto out_err;
728
729 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
730 if (rc < 0)
731 goto out_err;
732
733 priv->manufacturer_id = vendor;
734
735 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
736 if (rc < 0)
737 goto out_err;
738
739 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
740 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
741 vendor >> 16, rid);
742
743 if (!(priv->flags & TPM_TIS_ITPM_WORKAROUND)) {
744 probe = probe_itpm(chip);
745 if (probe < 0) {
746 rc = -ENODEV;
747 goto out_err;
748 }
749
750 if (!!probe)
751 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
752 }
753
754 /* Figure out the capabilities */
755 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
756 if (rc < 0)
757 goto out_err;
758
759 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
760 intfcaps);
761 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
762 dev_dbg(dev, "\tBurst Count Static\n");
763 if (intfcaps & TPM_INTF_CMD_READY_INT)
764 dev_dbg(dev, "\tCommand Ready Int Support\n");
765 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
766 dev_dbg(dev, "\tInterrupt Edge Falling\n");
767 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
768 dev_dbg(dev, "\tInterrupt Edge Rising\n");
769 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
770 dev_dbg(dev, "\tInterrupt Level Low\n");
771 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
772 dev_dbg(dev, "\tInterrupt Level High\n");
773 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
774 dev_dbg(dev, "\tLocality Change Int Support\n");
775 if (intfcaps & TPM_INTF_STS_VALID_INT)
776 dev_dbg(dev, "\tSts Valid Int Support\n");
777 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
778 dev_dbg(dev, "\tData Avail Int Support\n");
779
780 /* INTERRUPT Setup */
781 init_waitqueue_head(&priv->read_queue);
782 init_waitqueue_head(&priv->int_queue);
783 if (irq != -1) {
784 /* Before doing irq testing issue a command to the TPM in polling mode
785 * to make sure it works. May as well use that command to set the
786 * proper timeouts for the driver.
787 */
788 if (tpm_get_timeouts(chip)) {
789 dev_err(dev, "Could not get TPM timeouts and durations\n");
790 rc = -ENODEV;
791 goto out_err;
792 }
793
794 if (irq) {
795 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
796 irq);
797 if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
798 dev_err(&chip->dev, FW_BUG
799 "TPM interrupt not working, polling instead\n");
800 } else {
801 tpm_tis_probe_irq(chip, intmask);
802 }
803 }
804
805 return tpm_chip_register(chip);
806out_err:
807 tpm_tis_remove(chip);
808 return rc;
809}
810EXPORT_SYMBOL_GPL(tpm_tis_core_init);
811
812#ifdef CONFIG_PM_SLEEP
813static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
814{
815 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
816 u32 intmask;
817 int rc;
818
819 /* reenable interrupts that device may have lost or
820 * BIOS/firmware may have disabled
821 */
822 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
823 if (rc < 0)
824 return;
825
826 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
827 if (rc < 0)
828 return;
829
830 intmask |= TPM_INTF_CMD_READY_INT
831 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
832 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
833
834 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
835}
836
837int tpm_tis_resume(struct device *dev)
838{
839 struct tpm_chip *chip = dev_get_drvdata(dev);
840 int ret;
841
842 if (chip->flags & TPM_CHIP_FLAG_IRQ)
843 tpm_tis_reenable_interrupts(chip);
844
845 ret = tpm_pm_resume(dev);
846 if (ret)
847 return ret;
848
849 /* TPM 1.2 requires self-test on resume. This function actually returns
850 * an error code but for unknown reason it isn't handled.
851 */
852 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
853 tpm_do_selftest(chip);
854
855 return 0;
856}
857EXPORT_SYMBOL_GPL(tpm_tis_resume);
858#endif
859
860MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
861MODULE_DESCRIPTION("TPM Driver");
862MODULE_VERSION("2.0");
863MODULE_LICENSE("GPL");