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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 2000 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
10 */
11#include <linux/bug.h>
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/signal.h>
15#include <linux/sched.h>
16#include <linux/smp.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/string.h>
20#include <linux/types.h>
21#include <linux/pagemap.h>
22#include <linux/ptrace.h>
23#include <linux/mman.h>
24#include <linux/mm.h>
25#include <linux/bootmem.h>
26#include <linux/highmem.h>
27#include <linux/swap.h>
28#include <linux/proc_fs.h>
29#include <linux/pfn.h>
30#include <linux/hardirq.h>
31#include <linux/gfp.h>
32
33#include <asm/asm-offsets.h>
34#include <asm/bootinfo.h>
35#include <asm/cachectl.h>
36#include <asm/cpu.h>
37#include <asm/dma.h>
38#include <asm/kmap_types.h>
39#include <asm/mmu_context.h>
40#include <asm/sections.h>
41#include <asm/pgtable.h>
42#include <asm/pgalloc.h>
43#include <asm/tlb.h>
44#include <asm/fixmap.h>
45
46/* Atomicity and interruptability */
47#ifdef CONFIG_MIPS_MT_SMTC
48
49#include <asm/mipsmtregs.h>
50
51#define ENTER_CRITICAL(flags) \
52 { \
53 unsigned int mvpflags; \
54 local_irq_save(flags);\
55 mvpflags = dvpe()
56#define EXIT_CRITICAL(flags) \
57 evpe(mvpflags); \
58 local_irq_restore(flags); \
59 }
60#else
61
62#define ENTER_CRITICAL(flags) local_irq_save(flags)
63#define EXIT_CRITICAL(flags) local_irq_restore(flags)
64
65#endif /* CONFIG_MIPS_MT_SMTC */
66
67/*
68 * We have up to 8 empty zeroed pages so we can map one of the right colour
69 * when needed. This is necessary only on R4000 / R4400 SC and MC versions
70 * where we have to avoid VCED / VECI exceptions for good performance at
71 * any price. Since page is never written to after the initialization we
72 * don't have to care about aliases on other CPUs.
73 */
74unsigned long empty_zero_page, zero_page_mask;
75EXPORT_SYMBOL_GPL(empty_zero_page);
76
77/*
78 * Not static inline because used by IP27 special magic initialization code
79 */
80unsigned long setup_zero_pages(void)
81{
82 unsigned int order;
83 unsigned long size;
84 struct page *page;
85
86 if (cpu_has_vce)
87 order = 3;
88 else
89 order = 0;
90
91 empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
92 if (!empty_zero_page)
93 panic("Oh boy, that early out of memory?");
94
95 page = virt_to_page((void *)empty_zero_page);
96 split_page(page, order);
97 while (page < virt_to_page((void *)(empty_zero_page + (PAGE_SIZE << order)))) {
98 SetPageReserved(page);
99 page++;
100 }
101
102 size = PAGE_SIZE << order;
103 zero_page_mask = (size - 1) & PAGE_MASK;
104
105 return 1UL << order;
106}
107
108#ifdef CONFIG_MIPS_MT_SMTC
109static pte_t *kmap_coherent_pte;
110static void __init kmap_coherent_init(void)
111{
112 unsigned long vaddr;
113
114 /* cache the first coherent kmap pte */
115 vaddr = __fix_to_virt(FIX_CMAP_BEGIN);
116 kmap_coherent_pte = kmap_get_fixmap_pte(vaddr);
117}
118#else
119static inline void kmap_coherent_init(void) {}
120#endif
121
122void *kmap_coherent(struct page *page, unsigned long addr)
123{
124 enum fixed_addresses idx;
125 unsigned long vaddr, flags, entrylo;
126 unsigned long old_ctx;
127 pte_t pte;
128 int tlbidx;
129
130 BUG_ON(Page_dcache_dirty(page));
131
132 inc_preempt_count();
133 idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
134#ifdef CONFIG_MIPS_MT_SMTC
135 idx += FIX_N_COLOURS * smp_processor_id() +
136 (in_interrupt() ? (FIX_N_COLOURS * NR_CPUS) : 0);
137#else
138 idx += in_interrupt() ? FIX_N_COLOURS : 0;
139#endif
140 vaddr = __fix_to_virt(FIX_CMAP_END - idx);
141 pte = mk_pte(page, PAGE_KERNEL);
142#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
143 entrylo = pte.pte_high;
144#else
145 entrylo = pte_to_entrylo(pte_val(pte));
146#endif
147
148 ENTER_CRITICAL(flags);
149 old_ctx = read_c0_entryhi();
150 write_c0_entryhi(vaddr & (PAGE_MASK << 1));
151 write_c0_entrylo0(entrylo);
152 write_c0_entrylo1(entrylo);
153#ifdef CONFIG_MIPS_MT_SMTC
154 set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte);
155 /* preload TLB instead of local_flush_tlb_one() */
156 mtc0_tlbw_hazard();
157 tlb_probe();
158 tlb_probe_hazard();
159 tlbidx = read_c0_index();
160 mtc0_tlbw_hazard();
161 if (tlbidx < 0)
162 tlb_write_random();
163 else
164 tlb_write_indexed();
165#else
166 tlbidx = read_c0_wired();
167 write_c0_wired(tlbidx + 1);
168 write_c0_index(tlbidx);
169 mtc0_tlbw_hazard();
170 tlb_write_indexed();
171#endif
172 tlbw_use_hazard();
173 write_c0_entryhi(old_ctx);
174 EXIT_CRITICAL(flags);
175
176 return (void*) vaddr;
177}
178
179#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
180
181void kunmap_coherent(void)
182{
183#ifndef CONFIG_MIPS_MT_SMTC
184 unsigned int wired;
185 unsigned long flags, old_ctx;
186
187 ENTER_CRITICAL(flags);
188 old_ctx = read_c0_entryhi();
189 wired = read_c0_wired() - 1;
190 write_c0_wired(wired);
191 write_c0_index(wired);
192 write_c0_entryhi(UNIQUE_ENTRYHI(wired));
193 write_c0_entrylo0(0);
194 write_c0_entrylo1(0);
195 mtc0_tlbw_hazard();
196 tlb_write_indexed();
197 tlbw_use_hazard();
198 write_c0_entryhi(old_ctx);
199 EXIT_CRITICAL(flags);
200#endif
201 dec_preempt_count();
202 preempt_check_resched();
203}
204
205void copy_user_highpage(struct page *to, struct page *from,
206 unsigned long vaddr, struct vm_area_struct *vma)
207{
208 void *vfrom, *vto;
209
210 vto = kmap_atomic(to, KM_USER1);
211 if (cpu_has_dc_aliases &&
212 page_mapped(from) && !Page_dcache_dirty(from)) {
213 vfrom = kmap_coherent(from, vaddr);
214 copy_page(vto, vfrom);
215 kunmap_coherent();
216 } else {
217 vfrom = kmap_atomic(from, KM_USER0);
218 copy_page(vto, vfrom);
219 kunmap_atomic(vfrom, KM_USER0);
220 }
221 if ((!cpu_has_ic_fills_f_dc) ||
222 pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
223 flush_data_cache_page((unsigned long)vto);
224 kunmap_atomic(vto, KM_USER1);
225 /* Make sure this page is cleared on other CPU's too before using it */
226 smp_wmb();
227}
228
229void copy_to_user_page(struct vm_area_struct *vma,
230 struct page *page, unsigned long vaddr, void *dst, const void *src,
231 unsigned long len)
232{
233 if (cpu_has_dc_aliases &&
234 page_mapped(page) && !Page_dcache_dirty(page)) {
235 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
236 memcpy(vto, src, len);
237 kunmap_coherent();
238 } else {
239 memcpy(dst, src, len);
240 if (cpu_has_dc_aliases)
241 SetPageDcacheDirty(page);
242 }
243 if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc)
244 flush_cache_page(vma, vaddr, page_to_pfn(page));
245}
246
247void copy_from_user_page(struct vm_area_struct *vma,
248 struct page *page, unsigned long vaddr, void *dst, const void *src,
249 unsigned long len)
250{
251 if (cpu_has_dc_aliases &&
252 page_mapped(page) && !Page_dcache_dirty(page)) {
253 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
254 memcpy(dst, vfrom, len);
255 kunmap_coherent();
256 } else {
257 memcpy(dst, src, len);
258 if (cpu_has_dc_aliases)
259 SetPageDcacheDirty(page);
260 }
261}
262
263void __init fixrange_init(unsigned long start, unsigned long end,
264 pgd_t *pgd_base)
265{
266#if defined(CONFIG_HIGHMEM) || defined(CONFIG_MIPS_MT_SMTC)
267 pgd_t *pgd;
268 pud_t *pud;
269 pmd_t *pmd;
270 pte_t *pte;
271 int i, j, k;
272 unsigned long vaddr;
273
274 vaddr = start;
275 i = __pgd_offset(vaddr);
276 j = __pud_offset(vaddr);
277 k = __pmd_offset(vaddr);
278 pgd = pgd_base + i;
279
280 for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
281 pud = (pud_t *)pgd;
282 for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
283 pmd = (pmd_t *)pud;
284 for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
285 if (pmd_none(*pmd)) {
286 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
287 set_pmd(pmd, __pmd((unsigned long)pte));
288 BUG_ON(pte != pte_offset_kernel(pmd, 0));
289 }
290 vaddr += PMD_SIZE;
291 }
292 k = 0;
293 }
294 j = 0;
295 }
296#endif
297}
298
299#ifndef CONFIG_NEED_MULTIPLE_NODES
300int page_is_ram(unsigned long pagenr)
301{
302 int i;
303
304 for (i = 0; i < boot_mem_map.nr_map; i++) {
305 unsigned long addr, end;
306
307 if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
308 /* not usable memory */
309 continue;
310
311 addr = PFN_UP(boot_mem_map.map[i].addr);
312 end = PFN_DOWN(boot_mem_map.map[i].addr +
313 boot_mem_map.map[i].size);
314
315 if (pagenr >= addr && pagenr < end)
316 return 1;
317 }
318
319 return 0;
320}
321
322void __init paging_init(void)
323{
324 unsigned long max_zone_pfns[MAX_NR_ZONES];
325 unsigned long lastpfn __maybe_unused;
326
327 pagetable_init();
328
329#ifdef CONFIG_HIGHMEM
330 kmap_init();
331#endif
332 kmap_coherent_init();
333
334#ifdef CONFIG_ZONE_DMA
335 max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
336#endif
337#ifdef CONFIG_ZONE_DMA32
338 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
339#endif
340 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
341 lastpfn = max_low_pfn;
342#ifdef CONFIG_HIGHMEM
343 max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
344 lastpfn = highend_pfn;
345
346 if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
347 printk(KERN_WARNING "This processor doesn't support highmem."
348 " %ldk highmem ignored\n",
349 (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
350 max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
351 lastpfn = max_low_pfn;
352 }
353#endif
354
355 free_area_init_nodes(max_zone_pfns);
356}
357
358#ifdef CONFIG_64BIT
359static struct kcore_list kcore_kseg0;
360#endif
361
362void __init mem_init(void)
363{
364 unsigned long codesize, reservedpages, datasize, initsize;
365 unsigned long tmp, ram;
366
367#ifdef CONFIG_HIGHMEM
368#ifdef CONFIG_DISCONTIGMEM
369#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
370#endif
371 max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
372#else
373 max_mapnr = max_low_pfn;
374#endif
375 high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
376
377 totalram_pages += free_all_bootmem();
378 totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
379
380 reservedpages = ram = 0;
381 for (tmp = 0; tmp < max_low_pfn; tmp++)
382 if (page_is_ram(tmp)) {
383 ram++;
384 if (PageReserved(pfn_to_page(tmp)))
385 reservedpages++;
386 }
387 num_physpages = ram;
388
389#ifdef CONFIG_HIGHMEM
390 for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
391 struct page *page = pfn_to_page(tmp);
392
393 if (!page_is_ram(tmp)) {
394 SetPageReserved(page);
395 continue;
396 }
397 ClearPageReserved(page);
398 init_page_count(page);
399 __free_page(page);
400 totalhigh_pages++;
401 }
402 totalram_pages += totalhigh_pages;
403 num_physpages += totalhigh_pages;
404#endif
405
406 codesize = (unsigned long) &_etext - (unsigned long) &_text;
407 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
408 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
409
410#ifdef CONFIG_64BIT
411 if ((unsigned long) &_text > (unsigned long) CKSEG0)
412 /* The -4 is a hack so that user tools don't have to handle
413 the overflow. */
414 kclist_add(&kcore_kseg0, (void *) CKSEG0,
415 0x80000000 - 4, KCORE_TEXT);
416#endif
417
418 printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
419 "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
420 nr_free_pages() << (PAGE_SHIFT-10),
421 ram << (PAGE_SHIFT-10),
422 codesize >> 10,
423 reservedpages << (PAGE_SHIFT-10),
424 datasize >> 10,
425 initsize >> 10,
426 totalhigh_pages << (PAGE_SHIFT-10));
427}
428#endif /* !CONFIG_NEED_MULTIPLE_NODES */
429
430void free_init_pages(const char *what, unsigned long begin, unsigned long end)
431{
432 unsigned long pfn;
433
434 for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
435 struct page *page = pfn_to_page(pfn);
436 void *addr = phys_to_virt(PFN_PHYS(pfn));
437
438 ClearPageReserved(page);
439 init_page_count(page);
440 memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
441 __free_page(page);
442 totalram_pages++;
443 }
444 printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
445}
446
447#ifdef CONFIG_BLK_DEV_INITRD
448void free_initrd_mem(unsigned long start, unsigned long end)
449{
450 free_init_pages("initrd memory",
451 virt_to_phys((void *)start),
452 virt_to_phys((void *)end));
453}
454#endif
455
456void __init_refok free_initmem(void)
457{
458 prom_free_prom_memory();
459 free_init_pages("unused kernel memory",
460 __pa_symbol(&__init_begin),
461 __pa_symbol(&__init_end));
462}
463
464#ifndef CONFIG_MIPS_PGD_C0_CONTEXT
465unsigned long pgd_current[NR_CPUS];
466#endif
467/*
468 * On 64-bit we've got three-level pagetables with a slightly
469 * different layout ...
470 */
471#define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order)))
472
473/*
474 * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
475 * are constants. So we use the variants from asm-offset.h until that gcc
476 * will officially be retired.
477 */
478pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER);
479#ifndef __PAGETABLE_PMD_FOLDED
480pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER);
481#endif
482pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER);
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 2000 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
10 */
11#include <linux/bug.h>
12#include <linux/init.h>
13#include <linux/export.h>
14#include <linux/signal.h>
15#include <linux/sched.h>
16#include <linux/smp.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/string.h>
20#include <linux/types.h>
21#include <linux/pagemap.h>
22#include <linux/ptrace.h>
23#include <linux/mman.h>
24#include <linux/mm.h>
25#include <linux/bootmem.h>
26#include <linux/highmem.h>
27#include <linux/swap.h>
28#include <linux/proc_fs.h>
29#include <linux/pfn.h>
30#include <linux/hardirq.h>
31#include <linux/gfp.h>
32#include <linux/kcore.h>
33
34#include <asm/asm-offsets.h>
35#include <asm/bootinfo.h>
36#include <asm/cachectl.h>
37#include <asm/cpu.h>
38#include <asm/dma.h>
39#include <asm/kmap_types.h>
40#include <asm/maar.h>
41#include <asm/mmu_context.h>
42#include <asm/sections.h>
43#include <asm/pgtable.h>
44#include <asm/pgalloc.h>
45#include <asm/tlb.h>
46#include <asm/fixmap.h>
47#include <asm/maar.h>
48
49/*
50 * We have up to 8 empty zeroed pages so we can map one of the right colour
51 * when needed. This is necessary only on R4000 / R4400 SC and MC versions
52 * where we have to avoid VCED / VECI exceptions for good performance at
53 * any price. Since page is never written to after the initialization we
54 * don't have to care about aliases on other CPUs.
55 */
56unsigned long empty_zero_page, zero_page_mask;
57EXPORT_SYMBOL_GPL(empty_zero_page);
58EXPORT_SYMBOL(zero_page_mask);
59
60/*
61 * Not static inline because used by IP27 special magic initialization code
62 */
63void setup_zero_pages(void)
64{
65 unsigned int order, i;
66 struct page *page;
67
68 if (cpu_has_vce)
69 order = 3;
70 else
71 order = 0;
72
73 empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
74 if (!empty_zero_page)
75 panic("Oh boy, that early out of memory?");
76
77 page = virt_to_page((void *)empty_zero_page);
78 split_page(page, order);
79 for (i = 0; i < (1 << order); i++, page++)
80 mark_page_reserved(page);
81
82 zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK;
83}
84
85static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
86{
87 enum fixed_addresses idx;
88 unsigned long vaddr, flags, entrylo;
89 unsigned long old_ctx;
90 pte_t pte;
91 int tlbidx;
92
93 BUG_ON(Page_dcache_dirty(page));
94
95 preempt_disable();
96 pagefault_disable();
97 idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
98 idx += in_interrupt() ? FIX_N_COLOURS : 0;
99 vaddr = __fix_to_virt(FIX_CMAP_END - idx);
100 pte = mk_pte(page, prot);
101#if defined(CONFIG_XPA)
102 entrylo = pte_to_entrylo(pte.pte_high);
103#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
104 entrylo = pte.pte_high;
105#else
106 entrylo = pte_to_entrylo(pte_val(pte));
107#endif
108
109 local_irq_save(flags);
110 old_ctx = read_c0_entryhi();
111 write_c0_entryhi(vaddr & (PAGE_MASK << 1));
112 write_c0_entrylo0(entrylo);
113 write_c0_entrylo1(entrylo);
114#ifdef CONFIG_XPA
115 if (cpu_has_xpa) {
116 entrylo = (pte.pte_low & _PFNX_MASK);
117 writex_c0_entrylo0(entrylo);
118 writex_c0_entrylo1(entrylo);
119 }
120#endif
121 tlbidx = num_wired_entries();
122 write_c0_wired(tlbidx + 1);
123 write_c0_index(tlbidx);
124 mtc0_tlbw_hazard();
125 tlb_write_indexed();
126 tlbw_use_hazard();
127 write_c0_entryhi(old_ctx);
128 local_irq_restore(flags);
129
130 return (void*) vaddr;
131}
132
133void *kmap_coherent(struct page *page, unsigned long addr)
134{
135 return __kmap_pgprot(page, addr, PAGE_KERNEL);
136}
137
138void *kmap_noncoherent(struct page *page, unsigned long addr)
139{
140 return __kmap_pgprot(page, addr, PAGE_KERNEL_NC);
141}
142
143void kunmap_coherent(void)
144{
145 unsigned int wired;
146 unsigned long flags, old_ctx;
147
148 local_irq_save(flags);
149 old_ctx = read_c0_entryhi();
150 wired = num_wired_entries() - 1;
151 write_c0_wired(wired);
152 write_c0_index(wired);
153 write_c0_entryhi(UNIQUE_ENTRYHI(wired));
154 write_c0_entrylo0(0);
155 write_c0_entrylo1(0);
156 mtc0_tlbw_hazard();
157 tlb_write_indexed();
158 tlbw_use_hazard();
159 write_c0_entryhi(old_ctx);
160 local_irq_restore(flags);
161 pagefault_enable();
162 preempt_enable();
163}
164
165void copy_user_highpage(struct page *to, struct page *from,
166 unsigned long vaddr, struct vm_area_struct *vma)
167{
168 void *vfrom, *vto;
169
170 vto = kmap_atomic(to);
171 if (cpu_has_dc_aliases &&
172 page_mapcount(from) && !Page_dcache_dirty(from)) {
173 vfrom = kmap_coherent(from, vaddr);
174 copy_page(vto, vfrom);
175 kunmap_coherent();
176 } else {
177 vfrom = kmap_atomic(from);
178 copy_page(vto, vfrom);
179 kunmap_atomic(vfrom);
180 }
181 if ((!cpu_has_ic_fills_f_dc) ||
182 pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
183 flush_data_cache_page((unsigned long)vto);
184 kunmap_atomic(vto);
185 /* Make sure this page is cleared on other CPU's too before using it */
186 smp_wmb();
187}
188
189void copy_to_user_page(struct vm_area_struct *vma,
190 struct page *page, unsigned long vaddr, void *dst, const void *src,
191 unsigned long len)
192{
193 if (cpu_has_dc_aliases &&
194 page_mapcount(page) && !Page_dcache_dirty(page)) {
195 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
196 memcpy(vto, src, len);
197 kunmap_coherent();
198 } else {
199 memcpy(dst, src, len);
200 if (cpu_has_dc_aliases)
201 SetPageDcacheDirty(page);
202 }
203 if (vma->vm_flags & VM_EXEC)
204 flush_cache_page(vma, vaddr, page_to_pfn(page));
205}
206
207void copy_from_user_page(struct vm_area_struct *vma,
208 struct page *page, unsigned long vaddr, void *dst, const void *src,
209 unsigned long len)
210{
211 if (cpu_has_dc_aliases &&
212 page_mapcount(page) && !Page_dcache_dirty(page)) {
213 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
214 memcpy(dst, vfrom, len);
215 kunmap_coherent();
216 } else {
217 memcpy(dst, src, len);
218 if (cpu_has_dc_aliases)
219 SetPageDcacheDirty(page);
220 }
221}
222EXPORT_SYMBOL_GPL(copy_from_user_page);
223
224void __init fixrange_init(unsigned long start, unsigned long end,
225 pgd_t *pgd_base)
226{
227#ifdef CONFIG_HIGHMEM
228 pgd_t *pgd;
229 pud_t *pud;
230 pmd_t *pmd;
231 pte_t *pte;
232 int i, j, k;
233 unsigned long vaddr;
234
235 vaddr = start;
236 i = __pgd_offset(vaddr);
237 j = __pud_offset(vaddr);
238 k = __pmd_offset(vaddr);
239 pgd = pgd_base + i;
240
241 for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
242 pud = (pud_t *)pgd;
243 for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
244 pmd = (pmd_t *)pud;
245 for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
246 if (pmd_none(*pmd)) {
247 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
248 set_pmd(pmd, __pmd((unsigned long)pte));
249 BUG_ON(pte != pte_offset_kernel(pmd, 0));
250 }
251 vaddr += PMD_SIZE;
252 }
253 k = 0;
254 }
255 j = 0;
256 }
257#endif
258}
259
260unsigned __weak platform_maar_init(unsigned num_pairs)
261{
262 struct maar_config cfg[BOOT_MEM_MAP_MAX];
263 unsigned i, num_configured, num_cfg = 0;
264
265 for (i = 0; i < boot_mem_map.nr_map; i++) {
266 switch (boot_mem_map.map[i].type) {
267 case BOOT_MEM_RAM:
268 case BOOT_MEM_INIT_RAM:
269 break;
270 default:
271 continue;
272 }
273
274 /* Round lower up */
275 cfg[num_cfg].lower = boot_mem_map.map[i].addr;
276 cfg[num_cfg].lower = (cfg[num_cfg].lower + 0xffff) & ~0xffff;
277
278 /* Round upper down */
279 cfg[num_cfg].upper = boot_mem_map.map[i].addr +
280 boot_mem_map.map[i].size;
281 cfg[num_cfg].upper = (cfg[num_cfg].upper & ~0xffff) - 1;
282
283 cfg[num_cfg].attrs = MIPS_MAAR_S;
284 num_cfg++;
285 }
286
287 num_configured = maar_config(cfg, num_cfg, num_pairs);
288 if (num_configured < num_cfg)
289 pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n",
290 num_pairs, num_cfg);
291
292 return num_configured;
293}
294
295void maar_init(void)
296{
297 unsigned num_maars, used, i;
298 phys_addr_t lower, upper, attr;
299 static struct {
300 struct maar_config cfgs[3];
301 unsigned used;
302 } recorded = { { { 0 } }, 0 };
303
304 if (!cpu_has_maar)
305 return;
306
307 /* Detect the number of MAARs */
308 write_c0_maari(~0);
309 back_to_back_c0_hazard();
310 num_maars = read_c0_maari() + 1;
311
312 /* MAARs should be in pairs */
313 WARN_ON(num_maars % 2);
314
315 /* Set MAARs using values we recorded already */
316 if (recorded.used) {
317 used = maar_config(recorded.cfgs, recorded.used, num_maars / 2);
318 BUG_ON(used != recorded.used);
319 } else {
320 /* Configure the required MAARs */
321 used = platform_maar_init(num_maars / 2);
322 }
323
324 /* Disable any further MAARs */
325 for (i = (used * 2); i < num_maars; i++) {
326 write_c0_maari(i);
327 back_to_back_c0_hazard();
328 write_c0_maar(0);
329 back_to_back_c0_hazard();
330 }
331
332 if (recorded.used)
333 return;
334
335 pr_info("MAAR configuration:\n");
336 for (i = 0; i < num_maars; i += 2) {
337 write_c0_maari(i);
338 back_to_back_c0_hazard();
339 upper = read_c0_maar();
340
341 write_c0_maari(i + 1);
342 back_to_back_c0_hazard();
343 lower = read_c0_maar();
344
345 attr = lower & upper;
346 lower = (lower & MIPS_MAAR_ADDR) << 4;
347 upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff;
348
349 pr_info(" [%d]: ", i / 2);
350 if (!(attr & MIPS_MAAR_V)) {
351 pr_cont("disabled\n");
352 continue;
353 }
354
355 pr_cont("%pa-%pa", &lower, &upper);
356
357 if (attr & MIPS_MAAR_S)
358 pr_cont(" speculate");
359
360 pr_cont("\n");
361
362 /* Record the setup for use on secondary CPUs */
363 if (used <= ARRAY_SIZE(recorded.cfgs)) {
364 recorded.cfgs[recorded.used].lower = lower;
365 recorded.cfgs[recorded.used].upper = upper;
366 recorded.cfgs[recorded.used].attrs = attr;
367 recorded.used++;
368 }
369 }
370}
371
372#ifndef CONFIG_NEED_MULTIPLE_NODES
373int page_is_ram(unsigned long pagenr)
374{
375 int i;
376
377 for (i = 0; i < boot_mem_map.nr_map; i++) {
378 unsigned long addr, end;
379
380 switch (boot_mem_map.map[i].type) {
381 case BOOT_MEM_RAM:
382 case BOOT_MEM_INIT_RAM:
383 break;
384 default:
385 /* not usable memory */
386 continue;
387 }
388
389 addr = PFN_UP(boot_mem_map.map[i].addr);
390 end = PFN_DOWN(boot_mem_map.map[i].addr +
391 boot_mem_map.map[i].size);
392
393 if (pagenr >= addr && pagenr < end)
394 return 1;
395 }
396
397 return 0;
398}
399
400void __init paging_init(void)
401{
402 unsigned long max_zone_pfns[MAX_NR_ZONES];
403 unsigned long lastpfn __maybe_unused;
404
405 pagetable_init();
406
407#ifdef CONFIG_HIGHMEM
408 kmap_init();
409#endif
410#ifdef CONFIG_ZONE_DMA
411 max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
412#endif
413#ifdef CONFIG_ZONE_DMA32
414 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
415#endif
416 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
417 lastpfn = max_low_pfn;
418#ifdef CONFIG_HIGHMEM
419 max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
420 lastpfn = highend_pfn;
421
422 if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
423 printk(KERN_WARNING "This processor doesn't support highmem."
424 " %ldk highmem ignored\n",
425 (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
426 max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
427 lastpfn = max_low_pfn;
428 }
429#endif
430
431 free_area_init_nodes(max_zone_pfns);
432}
433
434#ifdef CONFIG_64BIT
435static struct kcore_list kcore_kseg0;
436#endif
437
438static inline void mem_init_free_highmem(void)
439{
440#ifdef CONFIG_HIGHMEM
441 unsigned long tmp;
442
443 if (cpu_has_dc_aliases)
444 return;
445
446 for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
447 struct page *page = pfn_to_page(tmp);
448
449 if (!page_is_ram(tmp))
450 SetPageReserved(page);
451 else
452 free_highmem_page(page);
453 }
454#endif
455}
456
457void __init mem_init(void)
458{
459#ifdef CONFIG_HIGHMEM
460#ifdef CONFIG_DISCONTIGMEM
461#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
462#endif
463 max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
464#else
465 max_mapnr = max_low_pfn;
466#endif
467 high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
468
469 maar_init();
470 free_all_bootmem();
471 setup_zero_pages(); /* Setup zeroed pages. */
472 mem_init_free_highmem();
473 mem_init_print_info(NULL);
474
475#ifdef CONFIG_64BIT
476 if ((unsigned long) &_text > (unsigned long) CKSEG0)
477 /* The -4 is a hack so that user tools don't have to handle
478 the overflow. */
479 kclist_add(&kcore_kseg0, (void *) CKSEG0,
480 0x80000000 - 4, KCORE_TEXT);
481#endif
482}
483#endif /* !CONFIG_NEED_MULTIPLE_NODES */
484
485void free_init_pages(const char *what, unsigned long begin, unsigned long end)
486{
487 unsigned long pfn;
488
489 for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
490 struct page *page = pfn_to_page(pfn);
491 void *addr = phys_to_virt(PFN_PHYS(pfn));
492
493 memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
494 free_reserved_page(page);
495 }
496 printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
497}
498
499#ifdef CONFIG_BLK_DEV_INITRD
500void free_initrd_mem(unsigned long start, unsigned long end)
501{
502 free_reserved_area((void *)start, (void *)end, POISON_FREE_INITMEM,
503 "initrd");
504}
505#endif
506
507void (*free_init_pages_eva)(void *begin, void *end) = NULL;
508
509void __ref free_initmem(void)
510{
511 prom_free_prom_memory();
512 /*
513 * Let the platform define a specific function to free the
514 * init section since EVA may have used any possible mapping
515 * between virtual and physical addresses.
516 */
517 if (free_init_pages_eva)
518 free_init_pages_eva((void *)&__init_begin, (void *)&__init_end);
519 else
520 free_initmem_default(POISON_FREE_INITMEM);
521}
522
523#ifndef CONFIG_MIPS_PGD_C0_CONTEXT
524unsigned long pgd_current[NR_CPUS];
525#endif
526
527/*
528 * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
529 * are constants. So we use the variants from asm-offset.h until that gcc
530 * will officially be retired.
531 *
532 * Align swapper_pg_dir in to 64K, allows its address to be loaded
533 * with a single LUI instruction in the TLB handlers. If we used
534 * __aligned(64K), its size would get rounded up to the alignment
535 * size, and waste space. So we place it in its own section and align
536 * it in the linker script.
537 */
538pgd_t swapper_pg_dir[_PTRS_PER_PGD] __section(.bss..swapper_pg_dir);
539#ifndef __PAGETABLE_PMD_FOLDED
540pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
541#endif
542pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;