1/*
 2 * arch/m32r/boot/compressed/m32r_sio.c
 3 *
 4 * 2003-02-12:	Takeo Takahashi
 5 * 2006-11-30:	OPSPUT support by Kazuhiro Inaoka
 6 *
 7 */
 8
 9#include <asm/processor.h>
10
11static void putc(char c);
12
13static int puts(const char *s)
14{
15	char c;
16	while ((c = *s++)) putc(c);
 
17	return 0;
18}
19
20#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT)
21#include <asm/m32r.h>
22#include <asm/io.h>
23
24#define USE_FPGA_MAP	0
25
26#if USE_FPGA_MAP
27/*
28 * fpga configuration program uses MMU, and define map as same as
29 * M32104 uT-Engine board.
30 */
31#define BOOT_SIO0STS	(volatile unsigned short *)(0x02c00000 + 0x20006)
32#define BOOT_SIO0TXB	(volatile unsigned short *)(0x02c00000 + 0x2000c)
33#else
34#undef PLD_BASE
35#if defined(CONFIG_PLAT_OPSPUT)
36#define PLD_BASE	0x1cc00000
37#else
38#define PLD_BASE	0xa4c00000
39#endif
40#define BOOT_SIO0STS	PLD_ESIO0STS
41#define BOOT_SIO0TXB	PLD_ESIO0TXB
42#endif
43
44static void putc(char c)
45{
46	while ((*BOOT_SIO0STS & 0x3) != 0x3)
47		cpu_relax();
48	if (c == '\n') {
49		*BOOT_SIO0TXB = '\r';
50		while ((*BOOT_SIO0STS & 0x3) != 0x3)
51			cpu_relax();
52	}
53	*BOOT_SIO0TXB = c;
54}
55#else /* !(CONFIG_PLAT_M32700UT) */
56#if defined(CONFIG_PLAT_MAPPI2)
57#define SIO0STS	(volatile unsigned short *)(0xa0efd000 + 14)
58#define SIO0TXB	(volatile unsigned short *)(0xa0efd000 + 30)
59#else
60#define SIO0STS	(volatile unsigned short *)(0x00efd000 + 14)
61#define SIO0TXB	(volatile unsigned short *)(0x00efd000 + 30)
62#endif
63
64static void putc(char c)
65{
66	while ((*SIO0STS & 0x1) == 0)
67		cpu_relax();
68	if (c == '\n') {
69		*SIO0TXB = '\r';
70		while ((*SIO0STS & 0x1) == 0)
71			cpu_relax();
72	}
73	*SIO0TXB = c;
74}
75#endif

 1/*
 2 * arch/m32r/boot/compressed/m32r_sio.c
 3 *
 4 * 2003-02-12:	Takeo Takahashi
 5 * 2006-11-30:	OPSPUT support by Kazuhiro Inaoka
 6 *
 7 */
 8
 9#include <asm/processor.h>
10
11static void m32r_putc(char c);
12
13static int puts(const char *s)
14{
15	char c;
16	while ((c = *s++))
17		m32r_putc(c);
18	return 0;
19}
20
21#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT)
22#include <asm/m32r.h>
23#include <asm/io.h>
24
25#define USE_FPGA_MAP	0
26
27#if USE_FPGA_MAP
28/*
29 * fpga configuration program uses MMU, and define map as same as
30 * M32104 uT-Engine board.
31 */
32#define BOOT_SIO0STS	(volatile unsigned short *)(0x02c00000 + 0x20006)
33#define BOOT_SIO0TXB	(volatile unsigned short *)(0x02c00000 + 0x2000c)
34#else
35#undef PLD_BASE
36#if defined(CONFIG_PLAT_OPSPUT)
37#define PLD_BASE	0x1cc00000
38#else
39#define PLD_BASE	0xa4c00000
40#endif
41#define BOOT_SIO0STS	PLD_ESIO0STS
42#define BOOT_SIO0TXB	PLD_ESIO0TXB
43#endif
44
45static void m32r_putc(char c)
46{
47	while ((*BOOT_SIO0STS & 0x3) != 0x3)
48		cpu_relax();
49	if (c == '\n') {
50		*BOOT_SIO0TXB = '\r';
51		while ((*BOOT_SIO0STS & 0x3) != 0x3)
52			cpu_relax();
53	}
54	*BOOT_SIO0TXB = c;
55}
56#else /* !(CONFIG_PLAT_M32700UT) */
57#if defined(CONFIG_PLAT_MAPPI2)
58#define SIO0STS	(volatile unsigned short *)(0xa0efd000 + 14)
59#define SIO0TXB	(volatile unsigned short *)(0xa0efd000 + 30)
60#else
61#define SIO0STS	(volatile unsigned short *)(0x00efd000 + 14)
62#define SIO0TXB	(volatile unsigned short *)(0x00efd000 + 30)
63#endif
64
65static void m32r_putc(char c)
66{
67	while ((*SIO0STS & 0x1) == 0)
68		cpu_relax();
69	if (c == '\n') {
70		*SIO0TXB = '\r';
71		while ((*SIO0STS & 0x1) == 0)
72			cpu_relax();
73	}
74	*SIO0TXB = c;
75}
76#endif