1/*
  2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
  3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
  4 *
  5 * This program is free software; you can redistribute it and/or modify
  6 * it under the terms of the GNU General Public License, version 2, as
  7 * published by the Free Software Foundation.
  8 *
  9 * This program is distributed in the hope that it will be useful,
 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12 * GNU General Public License for more details.
 13 *
 14 * You should have received a copy of the GNU General Public License
 15 * along with this program; if not, write to the Free Software
 16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 17 */
 18
 19#include <linux/linkage.h>
 20#include <asm/assembler.h>
 21#include <asm/unified.h>
 22#include <asm/asm-offsets.h>
 23#include <asm/kvm_asm.h>
 24#include <asm/kvm_arm.h>
 25#include <asm/kvm_mmu.h>
 26
 27/********************************************************************
 28 * Hypervisor initialization
 29 *   - should be called with:
 30 *       r0 = top of Hyp stack (kernel VA)
 31 *       r1 = pointer to hyp vectors
 32 *       r2,r3 = Hypervisor pgd pointer
 33 *
 34 * The init scenario is:
 35 * - We jump in HYP with 3 parameters: runtime HYP pgd, runtime stack,
 36 *   runtime vectors
 37 * - Invalidate TLBs
 38 * - Set stack and vectors
 39 * - Setup the page tables
 40 * - Enable the MMU
 41 * - Profit! (or eret, if you only care about the code).
 42 */
 43
 44	.text
 45	.pushsection    .hyp.idmap.text,"ax"
 46	.align 5
 47__kvm_hyp_init:
 48	.globl __kvm_hyp_init
 49
 50	@ Hyp-mode exception vector
 51	W(b)	.
 52	W(b)	.
 53	W(b)	.
 54	W(b)	.
 55	W(b)	.
 56	W(b)	__do_hyp_init
 57	W(b)	.
 58	W(b)	.
 59
 60__do_hyp_init:
 61	@ Set stack pointer
 62	mov	sp, r0
 63
 64	@ Set HVBAR to point to the HYP vectors
 65	mcr	p15, 4, r1, c12, c0, 0	@ HVBAR
 66
 67	@ Set the HTTBR to point to the hypervisor PGD pointer passed
 68	mcrr	p15, 4, rr_lo_hi(r2, r3), c2
 69
 70	@ Set the HTCR and VTCR to the same shareability and cacheability
 71	@ settings as the non-secure TTBCR and with T0SZ == 0.
 72	mrc	p15, 4, r0, c2, c0, 2	@ HTCR
 73	ldr	r2, =HTCR_MASK
 74	bic	r0, r0, r2
 75	mrc	p15, 0, r1, c2, c0, 2	@ TTBCR
 76	and	r1, r1, #(HTCR_MASK & ~TTBCR_T0SZ)
 77	orr	r0, r0, r1
 78	mcr	p15, 4, r0, c2, c0, 2	@ HTCR
 79
 80	@ Use the same memory attributes for hyp. accesses as the kernel
 81	@ (copy MAIRx ro HMAIRx).
 82	mrc	p15, 0, r0, c10, c2, 0
 83	mcr	p15, 4, r0, c10, c2, 0
 84	mrc	p15, 0, r0, c10, c2, 1
 85	mcr	p15, 4, r0, c10, c2, 1
 86
 87	@ Invalidate the stale TLBs from Bootloader
 88	mcr	p15, 4, r0, c8, c7, 0	@ TLBIALLH
 89	dsb	ish
 90
 91	@ Set the HSCTLR to:
 92	@  - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel)
 93	@  - Endianness: Kernel config
 94	@  - Fast Interrupt Features: Kernel config
 95	@  - Write permission implies XN: disabled
 96	@  - Instruction cache: enabled
 97	@  - Data/Unified cache: enabled
 98	@  - Memory alignment checks: enabled
 99	@  - MMU: enabled (this code must be run from an identity mapping)
100	mrc	p15, 4, r0, c1, c0, 0	@ HSCR
101	ldr	r2, =HSCTLR_MASK
102	bic	r0, r0, r2
103	mrc	p15, 0, r1, c1, c0, 0	@ SCTLR
104	ldr	r2, =(HSCTLR_EE | HSCTLR_FI | HSCTLR_I | HSCTLR_C)
105	and	r1, r1, r2
106 ARM(	ldr	r2, =(HSCTLR_M | HSCTLR_A)			)
107 THUMB(	ldr	r2, =(HSCTLR_M | HSCTLR_A | HSCTLR_TE)		)
108	orr	r1, r1, r2
109	orr	r0, r0, r1
110	mcr	p15, 4, r0, c1, c0, 0	@ HSCR
111	isb
112
113	eret
114
115	@ r0 : stub vectors address
116ENTRY(__kvm_hyp_reset)
117	/* We're now in idmap, disable MMU */
118	mrc	p15, 4, r1, c1, c0, 0	@ HSCTLR
119	ldr	r2, =(HSCTLR_M | HSCTLR_A | HSCTLR_C | HSCTLR_I)
120	bic	r1, r1, r2
121	mcr	p15, 4, r1, c1, c0, 0	@ HSCTLR
122
123	/* Install stub vectors */
124	mcr	p15, 4, r0, c12, c0, 0	@ HVBAR
125	isb
126
127	eret
128ENDPROC(__kvm_hyp_reset)
129
130	.ltorg
131
132	.globl __kvm_hyp_init_end
133__kvm_hyp_init_end:
134
135	.popsection