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1/*
2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
3 *
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@petalogix.com>.
6 *
7 * 2007-2009 (c) Xilinx, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/module.h>
16#include <linux/uaccess.h>
17#include <linux/init.h>
18#include <linux/netdevice.h>
19#include <linux/etherdevice.h>
20#include <linux/skbuff.h>
21#include <linux/io.h>
22#include <linux/slab.h>
23#include <linux/of_address.h>
24#include <linux/of_device.h>
25#include <linux/of_platform.h>
26#include <linux/of_mdio.h>
27#include <linux/of_net.h>
28#include <linux/phy.h>
29#include <linux/interrupt.h>
30
31#define DRIVER_NAME "xilinx_emaclite"
32
33/* Register offsets for the EmacLite Core */
34#define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */
35#define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
36#define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */
37#define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */
38#define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */
39#define XEL_GIER_OFFSET 0x07F8 /* GIE Register */
40#define XEL_TSR_OFFSET 0x07FC /* Tx status */
41#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
42
43#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
44#define XEL_RPLR_OFFSET 0x100C /* Rx packet length */
45#define XEL_RSR_OFFSET 0x17FC /* Rx status */
46
47#define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */
48
49/* MDIO Address Register Bit Masks */
50#define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
51#define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
52#define XEL_MDIOADDR_PHYADR_SHIFT 5
53#define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */
54
55/* MDIO Write Data Register Bit Masks */
56#define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */
57
58/* MDIO Read Data Register Bit Masks */
59#define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */
60
61/* MDIO Control Register Bit Masks */
62#define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */
63#define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */
64
65/* Global Interrupt Enable Register (GIER) Bit Masks */
66#define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */
67
68/* Transmit Status Register (TSR) Bit Masks */
69#define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */
70#define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
71#define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */
72#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit
73 * only. This is not documented
74 * in the HW spec */
75
76/* Define for programming the MAC address into the EmacLite */
77#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
78
79/* Receive Status Register (RSR) */
80#define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */
81#define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */
82
83/* Transmit Packet Length Register (TPLR) */
84#define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */
85
86/* Receive Packet Length Register (RPLR) */
87#define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */
88
89#define XEL_HEADER_OFFSET 12 /* Offset to length field */
90#define XEL_HEADER_SHIFT 16 /* Shift value for length */
91
92/* General Ethernet Definitions */
93#define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */
94#define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */
95
96
97
98#define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */
99#define ALIGNMENT 4
100
101/* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
102#define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
103
104/**
105 * struct net_local - Our private per device data
106 * @ndev: instance of the network device
107 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW
108 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW
109 * @next_tx_buf_to_use: next Tx buffer to write to
110 * @next_rx_buf_to_use: next Rx buffer to read from
111 * @base_addr: base address of the Emaclite device
112 * @reset_lock: lock used for synchronization
113 * @deferred_skb: holds an skb (for transmission at a later time) when the
114 * Tx buffer is not free
115 * @phy_dev: pointer to the PHY device
116 * @phy_node: pointer to the PHY device node
117 * @mii_bus: pointer to the MII bus
118 * @mdio_irqs: IRQs table for MDIO bus
119 * @last_link: last link status
120 * @has_mdio: indicates whether MDIO is included in the HW
121 */
122struct net_local {
123
124 struct net_device *ndev;
125
126 bool tx_ping_pong;
127 bool rx_ping_pong;
128 u32 next_tx_buf_to_use;
129 u32 next_rx_buf_to_use;
130 void __iomem *base_addr;
131
132 spinlock_t reset_lock;
133 struct sk_buff *deferred_skb;
134
135 struct phy_device *phy_dev;
136 struct device_node *phy_node;
137
138 struct mii_bus *mii_bus;
139 int mdio_irqs[PHY_MAX_ADDR];
140
141 int last_link;
142 bool has_mdio;
143};
144
145
146/*************************/
147/* EmacLite driver calls */
148/*************************/
149
150/**
151 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
152 * @drvdata: Pointer to the Emaclite device private data
153 *
154 * This function enables the Tx and Rx interrupts for the Emaclite device along
155 * with the Global Interrupt Enable.
156 */
157static void xemaclite_enable_interrupts(struct net_local *drvdata)
158{
159 u32 reg_data;
160
161 /* Enable the Tx interrupts for the first Buffer */
162 reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
163 out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
164 reg_data | XEL_TSR_XMIT_IE_MASK);
165
166 /* Enable the Tx interrupts for the second Buffer if
167 * configured in HW */
168 if (drvdata->tx_ping_pong != 0) {
169 reg_data = in_be32(drvdata->base_addr +
170 XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
171 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
172 XEL_TSR_OFFSET,
173 reg_data | XEL_TSR_XMIT_IE_MASK);
174 }
175
176 /* Enable the Rx interrupts for the first buffer */
177 out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
178 XEL_RSR_RECV_IE_MASK);
179
180 /* Enable the Rx interrupts for the second Buffer if
181 * configured in HW */
182 if (drvdata->rx_ping_pong != 0) {
183 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
184 XEL_RSR_OFFSET,
185 XEL_RSR_RECV_IE_MASK);
186 }
187
188 /* Enable the Global Interrupt Enable */
189 out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
190}
191
192/**
193 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
194 * @drvdata: Pointer to the Emaclite device private data
195 *
196 * This function disables the Tx and Rx interrupts for the Emaclite device,
197 * along with the Global Interrupt Enable.
198 */
199static void xemaclite_disable_interrupts(struct net_local *drvdata)
200{
201 u32 reg_data;
202
203 /* Disable the Global Interrupt Enable */
204 out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
205
206 /* Disable the Tx interrupts for the first buffer */
207 reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
208 out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
209 reg_data & (~XEL_TSR_XMIT_IE_MASK));
210
211 /* Disable the Tx interrupts for the second Buffer
212 * if configured in HW */
213 if (drvdata->tx_ping_pong != 0) {
214 reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
215 XEL_TSR_OFFSET);
216 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
217 XEL_TSR_OFFSET,
218 reg_data & (~XEL_TSR_XMIT_IE_MASK));
219 }
220
221 /* Disable the Rx interrupts for the first buffer */
222 reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET);
223 out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
224 reg_data & (~XEL_RSR_RECV_IE_MASK));
225
226 /* Disable the Rx interrupts for the second buffer
227 * if configured in HW */
228 if (drvdata->rx_ping_pong != 0) {
229
230 reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
231 XEL_RSR_OFFSET);
232 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
233 XEL_RSR_OFFSET,
234 reg_data & (~XEL_RSR_RECV_IE_MASK));
235 }
236}
237
238/**
239 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
240 * @src_ptr: Void pointer to the 16-bit aligned source address
241 * @dest_ptr: Pointer to the 32-bit aligned destination address
242 * @length: Number bytes to write from source to destination
243 *
244 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
245 * address in the EmacLite device.
246 */
247static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
248 unsigned length)
249{
250 u32 align_buffer;
251 u32 *to_u32_ptr;
252 u16 *from_u16_ptr, *to_u16_ptr;
253
254 to_u32_ptr = dest_ptr;
255 from_u16_ptr = src_ptr;
256 align_buffer = 0;
257
258 for (; length > 3; length -= 4) {
259 to_u16_ptr = (u16 *)&align_buffer;
260 *to_u16_ptr++ = *from_u16_ptr++;
261 *to_u16_ptr++ = *from_u16_ptr++;
262
263 /* Output a word */
264 *to_u32_ptr++ = align_buffer;
265 }
266 if (length) {
267 u8 *from_u8_ptr, *to_u8_ptr;
268
269 /* Set up to output the remaining data */
270 align_buffer = 0;
271 to_u8_ptr = (u8 *) &align_buffer;
272 from_u8_ptr = (u8 *) from_u16_ptr;
273
274 /* Output the remaining data */
275 for (; length > 0; length--)
276 *to_u8_ptr++ = *from_u8_ptr++;
277
278 *to_u32_ptr = align_buffer;
279 }
280}
281
282/**
283 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
284 * @src_ptr: Pointer to the 32-bit aligned source address
285 * @dest_ptr: Pointer to the 16-bit aligned destination address
286 * @length: Number bytes to read from source to destination
287 *
288 * This function reads data from a 32-bit aligned address in the EmacLite device
289 * to a 16-bit aligned buffer.
290 */
291static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
292 unsigned length)
293{
294 u16 *to_u16_ptr, *from_u16_ptr;
295 u32 *from_u32_ptr;
296 u32 align_buffer;
297
298 from_u32_ptr = src_ptr;
299 to_u16_ptr = (u16 *) dest_ptr;
300
301 for (; length > 3; length -= 4) {
302 /* Copy each word into the temporary buffer */
303 align_buffer = *from_u32_ptr++;
304 from_u16_ptr = (u16 *)&align_buffer;
305
306 /* Read data from source */
307 *to_u16_ptr++ = *from_u16_ptr++;
308 *to_u16_ptr++ = *from_u16_ptr++;
309 }
310
311 if (length) {
312 u8 *to_u8_ptr, *from_u8_ptr;
313
314 /* Set up to read the remaining data */
315 to_u8_ptr = (u8 *) to_u16_ptr;
316 align_buffer = *from_u32_ptr++;
317 from_u8_ptr = (u8 *) &align_buffer;
318
319 /* Read the remaining data */
320 for (; length > 0; length--)
321 *to_u8_ptr = *from_u8_ptr;
322 }
323}
324
325/**
326 * xemaclite_send_data - Send an Ethernet frame
327 * @drvdata: Pointer to the Emaclite device private data
328 * @data: Pointer to the data to be sent
329 * @byte_count: Total frame size, including header
330 *
331 * This function checks if the Tx buffer of the Emaclite device is free to send
332 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
333 * returns an error.
334 *
335 * Return: 0 upon success or -1 if the buffer(s) are full.
336 *
337 * Note: The maximum Tx packet size can not be more than Ethernet header
338 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
339 */
340static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
341 unsigned int byte_count)
342{
343 u32 reg_data;
344 void __iomem *addr;
345
346 /* Determine the expected Tx buffer address */
347 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
348
349 /* If the length is too large, truncate it */
350 if (byte_count > ETH_FRAME_LEN)
351 byte_count = ETH_FRAME_LEN;
352
353 /* Check if the expected buffer is available */
354 reg_data = in_be32(addr + XEL_TSR_OFFSET);
355 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
356 XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
357
358 /* Switch to next buffer if configured */
359 if (drvdata->tx_ping_pong != 0)
360 drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
361 } else if (drvdata->tx_ping_pong != 0) {
362 /* If the expected buffer is full, try the other buffer,
363 * if it is configured in HW */
364
365 addr = (void __iomem __force *)((u32 __force)addr ^
366 XEL_BUFFER_OFFSET);
367 reg_data = in_be32(addr + XEL_TSR_OFFSET);
368
369 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
370 XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
371 return -1; /* Buffers were full, return failure */
372 } else
373 return -1; /* Buffer was full, return failure */
374
375 /* Write the frame to the buffer */
376 xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
377
378 out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK));
379
380 /* Update the Tx Status Register to indicate that there is a
381 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
382 * is used by the interrupt handler to check whether a frame
383 * has been transmitted */
384 reg_data = in_be32(addr + XEL_TSR_OFFSET);
385 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
386 out_be32(addr + XEL_TSR_OFFSET, reg_data);
387
388 return 0;
389}
390
391/**
392 * xemaclite_recv_data - Receive a frame
393 * @drvdata: Pointer to the Emaclite device private data
394 * @data: Address where the data is to be received
395 *
396 * This function is intended to be called from the interrupt context or
397 * with a wrapper which waits for the receive frame to be available.
398 *
399 * Return: Total number of bytes received
400 */
401static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
402{
403 void __iomem *addr;
404 u16 length, proto_type;
405 u32 reg_data;
406
407 /* Determine the expected buffer address */
408 addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
409
410 /* Verify which buffer has valid data */
411 reg_data = in_be32(addr + XEL_RSR_OFFSET);
412
413 if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
414 if (drvdata->rx_ping_pong != 0)
415 drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
416 } else {
417 /* The instance is out of sync, try other buffer if other
418 * buffer is configured, return 0 otherwise. If the instance is
419 * out of sync, do not update the 'next_rx_buf_to_use' since it
420 * will correct on subsequent calls */
421 if (drvdata->rx_ping_pong != 0)
422 addr = (void __iomem __force *)((u32 __force)addr ^
423 XEL_BUFFER_OFFSET);
424 else
425 return 0; /* No data was available */
426
427 /* Verify that buffer has valid data */
428 reg_data = in_be32(addr + XEL_RSR_OFFSET);
429 if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
430 XEL_RSR_RECV_DONE_MASK)
431 return 0; /* No data was available */
432 }
433
434 /* Get the protocol type of the ethernet frame that arrived */
435 proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET +
436 XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
437 XEL_RPLR_LENGTH_MASK);
438
439 /* Check if received ethernet frame is a raw ethernet frame
440 * or an IP packet or an ARP packet */
441 if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
442
443 if (proto_type == ETH_P_IP) {
444 length = ((ntohl(in_be32(addr +
445 XEL_HEADER_IP_LENGTH_OFFSET +
446 XEL_RXBUFF_OFFSET)) >>
447 XEL_HEADER_SHIFT) &
448 XEL_RPLR_LENGTH_MASK);
449 length += ETH_HLEN + ETH_FCS_LEN;
450
451 } else if (proto_type == ETH_P_ARP)
452 length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
453 else
454 /* Field contains type other than IP or ARP, use max
455 * frame size and let user parse it */
456 length = ETH_FRAME_LEN + ETH_FCS_LEN;
457 } else
458 /* Use the length in the frame, plus the header and trailer */
459 length = proto_type + ETH_HLEN + ETH_FCS_LEN;
460
461 /* Read from the EmacLite device */
462 xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET),
463 data, length);
464
465 /* Acknowledge the frame */
466 reg_data = in_be32(addr + XEL_RSR_OFFSET);
467 reg_data &= ~XEL_RSR_RECV_DONE_MASK;
468 out_be32(addr + XEL_RSR_OFFSET, reg_data);
469
470 return length;
471}
472
473/**
474 * xemaclite_update_address - Update the MAC address in the device
475 * @drvdata: Pointer to the Emaclite device private data
476 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
477 *
478 * Tx must be idle and Rx should be idle for deterministic results.
479 * It is recommended that this function should be called after the
480 * initialization and before transmission of any packets from the device.
481 * The MAC address can be programmed using any of the two transmit
482 * buffers (if configured).
483 */
484static void xemaclite_update_address(struct net_local *drvdata,
485 u8 *address_ptr)
486{
487 void __iomem *addr;
488 u32 reg_data;
489
490 /* Determine the expected Tx buffer address */
491 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
492
493 xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
494
495 out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN);
496
497 /* Update the MAC address in the EmacLite */
498 reg_data = in_be32(addr + XEL_TSR_OFFSET);
499 out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR);
500
501 /* Wait for EmacLite to finish with the MAC address update */
502 while ((in_be32(addr + XEL_TSR_OFFSET) &
503 XEL_TSR_PROG_MAC_ADDR) != 0)
504 ;
505}
506
507/**
508 * xemaclite_set_mac_address - Set the MAC address for this device
509 * @dev: Pointer to the network device instance
510 * @addr: Void pointer to the sockaddr structure
511 *
512 * This function copies the HW address from the sockaddr strucutre to the
513 * net_device structure and updates the address in HW.
514 *
515 * Return: Error if the net device is busy or 0 if the addr is set
516 * successfully
517 */
518static int xemaclite_set_mac_address(struct net_device *dev, void *address)
519{
520 struct net_local *lp = netdev_priv(dev);
521 struct sockaddr *addr = address;
522
523 if (netif_running(dev))
524 return -EBUSY;
525
526 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
527 xemaclite_update_address(lp, dev->dev_addr);
528 return 0;
529}
530
531/**
532 * xemaclite_tx_timeout - Callback for Tx Timeout
533 * @dev: Pointer to the network device
534 *
535 * This function is called when Tx time out occurs for Emaclite device.
536 */
537static void xemaclite_tx_timeout(struct net_device *dev)
538{
539 struct net_local *lp = netdev_priv(dev);
540 unsigned long flags;
541
542 dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
543 TX_TIMEOUT * 1000UL / HZ);
544
545 dev->stats.tx_errors++;
546
547 /* Reset the device */
548 spin_lock_irqsave(&lp->reset_lock, flags);
549
550 /* Shouldn't really be necessary, but shouldn't hurt */
551 netif_stop_queue(dev);
552
553 xemaclite_disable_interrupts(lp);
554 xemaclite_enable_interrupts(lp);
555
556 if (lp->deferred_skb) {
557 dev_kfree_skb(lp->deferred_skb);
558 lp->deferred_skb = NULL;
559 dev->stats.tx_errors++;
560 }
561
562 /* To exclude tx timeout */
563 dev->trans_start = jiffies; /* prevent tx timeout */
564
565 /* We're all ready to go. Start the queue */
566 netif_wake_queue(dev);
567 spin_unlock_irqrestore(&lp->reset_lock, flags);
568}
569
570/**********************/
571/* Interrupt Handlers */
572/**********************/
573
574/**
575 * xemaclite_tx_handler - Interrupt handler for frames sent
576 * @dev: Pointer to the network device
577 *
578 * This function updates the number of packets transmitted and handles the
579 * deferred skb, if there is one.
580 */
581static void xemaclite_tx_handler(struct net_device *dev)
582{
583 struct net_local *lp = netdev_priv(dev);
584
585 dev->stats.tx_packets++;
586 if (lp->deferred_skb) {
587 if (xemaclite_send_data(lp,
588 (u8 *) lp->deferred_skb->data,
589 lp->deferred_skb->len) != 0)
590 return;
591 else {
592 dev->stats.tx_bytes += lp->deferred_skb->len;
593 dev_kfree_skb_irq(lp->deferred_skb);
594 lp->deferred_skb = NULL;
595 dev->trans_start = jiffies; /* prevent tx timeout */
596 netif_wake_queue(dev);
597 }
598 }
599}
600
601/**
602 * xemaclite_rx_handler- Interrupt handler for frames received
603 * @dev: Pointer to the network device
604 *
605 * This function allocates memory for a socket buffer, fills it with data
606 * received and hands it over to the TCP/IP stack.
607 */
608static void xemaclite_rx_handler(struct net_device *dev)
609{
610 struct net_local *lp = netdev_priv(dev);
611 struct sk_buff *skb;
612 unsigned int align;
613 u32 len;
614
615 len = ETH_FRAME_LEN + ETH_FCS_LEN;
616 skb = dev_alloc_skb(len + ALIGNMENT);
617 if (!skb) {
618 /* Couldn't get memory. */
619 dev->stats.rx_dropped++;
620 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
621 return;
622 }
623
624 /*
625 * A new skb should have the data halfword aligned, but this code is
626 * here just in case that isn't true. Calculate how many
627 * bytes we should reserve to get the data to start on a word
628 * boundary */
629 align = BUFFER_ALIGN(skb->data);
630 if (align)
631 skb_reserve(skb, align);
632
633 skb_reserve(skb, 2);
634
635 len = xemaclite_recv_data(lp, (u8 *) skb->data);
636
637 if (!len) {
638 dev->stats.rx_errors++;
639 dev_kfree_skb_irq(skb);
640 return;
641 }
642
643 skb_put(skb, len); /* Tell the skb how much data we got */
644
645 skb->protocol = eth_type_trans(skb, dev);
646 skb_checksum_none_assert(skb);
647
648 dev->stats.rx_packets++;
649 dev->stats.rx_bytes += len;
650
651 if (!skb_defer_rx_timestamp(skb))
652 netif_rx(skb); /* Send the packet upstream */
653}
654
655/**
656 * xemaclite_interrupt - Interrupt handler for this driver
657 * @irq: Irq of the Emaclite device
658 * @dev_id: Void pointer to the network device instance used as callback
659 * reference
660 *
661 * This function handles the Tx and Rx interrupts of the EmacLite device.
662 */
663static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
664{
665 bool tx_complete = 0;
666 struct net_device *dev = dev_id;
667 struct net_local *lp = netdev_priv(dev);
668 void __iomem *base_addr = lp->base_addr;
669 u32 tx_status;
670
671 /* Check if there is Rx Data available */
672 if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) ||
673 (in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
674 & XEL_RSR_RECV_DONE_MASK))
675
676 xemaclite_rx_handler(dev);
677
678 /* Check if the Transmission for the first buffer is completed */
679 tx_status = in_be32(base_addr + XEL_TSR_OFFSET);
680 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
681 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
682
683 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
684 out_be32(base_addr + XEL_TSR_OFFSET, tx_status);
685
686 tx_complete = 1;
687 }
688
689 /* Check if the Transmission for the second buffer is completed */
690 tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
691 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
692 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
693
694 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
695 out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET,
696 tx_status);
697
698 tx_complete = 1;
699 }
700
701 /* If there was a Tx interrupt, call the Tx Handler */
702 if (tx_complete != 0)
703 xemaclite_tx_handler(dev);
704
705 return IRQ_HANDLED;
706}
707
708/**********************/
709/* MDIO Bus functions */
710/**********************/
711
712/**
713 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
714 * @lp: Pointer to the Emaclite device private data
715 *
716 * This function waits till the device is ready to accept a new MDIO
717 * request.
718 *
719 * Return: 0 for success or ETIMEDOUT for a timeout
720 */
721
722static int xemaclite_mdio_wait(struct net_local *lp)
723{
724 long end = jiffies + 2;
725
726 /* wait for the MDIO interface to not be busy or timeout
727 after some time.
728 */
729 while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
730 XEL_MDIOCTRL_MDIOSTS_MASK) {
731 if (end - jiffies <= 0) {
732 WARN_ON(1);
733 return -ETIMEDOUT;
734 }
735 msleep(1);
736 }
737 return 0;
738}
739
740/**
741 * xemaclite_mdio_read - Read from a given MII management register
742 * @bus: the mii_bus struct
743 * @phy_id: the phy address
744 * @reg: register number to read from
745 *
746 * This function waits till the device is ready to accept a new MDIO
747 * request and then writes the phy address to the MDIO Address register
748 * and reads data from MDIO Read Data register, when its available.
749 *
750 * Return: Value read from the MII management register
751 */
752static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
753{
754 struct net_local *lp = bus->priv;
755 u32 ctrl_reg;
756 u32 rc;
757
758 if (xemaclite_mdio_wait(lp))
759 return -ETIMEDOUT;
760
761 /* Write the PHY address, register number and set the OP bit in the
762 * MDIO Address register. Set the Status bit in the MDIO Control
763 * register to start a MDIO read transaction.
764 */
765 ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
766 out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
767 XEL_MDIOADDR_OP_MASK |
768 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
769 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
770 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
771
772 if (xemaclite_mdio_wait(lp))
773 return -ETIMEDOUT;
774
775 rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET);
776
777 dev_dbg(&lp->ndev->dev,
778 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
779 phy_id, reg, rc);
780
781 return rc;
782}
783
784/**
785 * xemaclite_mdio_write - Write to a given MII management register
786 * @bus: the mii_bus struct
787 * @phy_id: the phy address
788 * @reg: register number to write to
789 * @val: value to write to the register number specified by reg
790 *
791 * This function waits till the device is ready to accept a new MDIO
792 * request and then writes the val to the MDIO Write Data register.
793 */
794static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
795 u16 val)
796{
797 struct net_local *lp = bus->priv;
798 u32 ctrl_reg;
799
800 dev_dbg(&lp->ndev->dev,
801 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
802 phy_id, reg, val);
803
804 if (xemaclite_mdio_wait(lp))
805 return -ETIMEDOUT;
806
807 /* Write the PHY address, register number and clear the OP bit in the
808 * MDIO Address register and then write the value into the MDIO Write
809 * Data register. Finally, set the Status bit in the MDIO Control
810 * register to start a MDIO write transaction.
811 */
812 ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
813 out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
814 ~XEL_MDIOADDR_OP_MASK &
815 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
816 out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val);
817 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
818 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
819
820 return 0;
821}
822
823/**
824 * xemaclite_mdio_reset - Reset the mdio bus.
825 * @bus: Pointer to the MII bus
826 *
827 * This function is required(?) as per Documentation/networking/phy.txt.
828 * There is no reset in this device; this function always returns 0.
829 */
830static int xemaclite_mdio_reset(struct mii_bus *bus)
831{
832 return 0;
833}
834
835/**
836 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
837 * @lp: Pointer to the Emaclite device private data
838 * @ofdev: Pointer to OF device structure
839 *
840 * This function enables MDIO bus in the Emaclite device and registers a
841 * mii_bus.
842 *
843 * Return: 0 upon success or a negative error upon failure
844 */
845static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
846{
847 struct mii_bus *bus;
848 int rc;
849 struct resource res;
850 struct device_node *np = of_get_parent(lp->phy_node);
851
852 /* Don't register the MDIO bus if the phy_node or its parent node
853 * can't be found.
854 */
855 if (!np)
856 return -ENODEV;
857
858 /* Enable the MDIO bus by asserting the enable bit in MDIO Control
859 * register.
860 */
861 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
862 XEL_MDIOCTRL_MDIOEN_MASK);
863
864 bus = mdiobus_alloc();
865 if (!bus)
866 return -ENOMEM;
867
868 of_address_to_resource(np, 0, &res);
869 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
870 (unsigned long long)res.start);
871 bus->priv = lp;
872 bus->name = "Xilinx Emaclite MDIO";
873 bus->read = xemaclite_mdio_read;
874 bus->write = xemaclite_mdio_write;
875 bus->reset = xemaclite_mdio_reset;
876 bus->parent = dev;
877 bus->irq = lp->mdio_irqs; /* preallocated IRQ table */
878
879 lp->mii_bus = bus;
880
881 rc = of_mdiobus_register(bus, np);
882 if (rc)
883 goto err_register;
884
885 return 0;
886
887err_register:
888 mdiobus_free(bus);
889 return rc;
890}
891
892/**
893 * xemaclite_adjust_link - Link state callback for the Emaclite device
894 * @ndev: pointer to net_device struct
895 *
896 * There's nothing in the Emaclite device to be configured when the link
897 * state changes. We just print the status.
898 */
899void xemaclite_adjust_link(struct net_device *ndev)
900{
901 struct net_local *lp = netdev_priv(ndev);
902 struct phy_device *phy = lp->phy_dev;
903 int link_state;
904
905 /* hash together the state values to decide if something has changed */
906 link_state = phy->speed | (phy->duplex << 1) | phy->link;
907
908 if (lp->last_link != link_state) {
909 lp->last_link = link_state;
910 phy_print_status(phy);
911 }
912}
913
914/**
915 * xemaclite_open - Open the network device
916 * @dev: Pointer to the network device
917 *
918 * This function sets the MAC address, requests an IRQ and enables interrupts
919 * for the Emaclite device and starts the Tx queue.
920 * It also connects to the phy device, if MDIO is included in Emaclite device.
921 */
922static int xemaclite_open(struct net_device *dev)
923{
924 struct net_local *lp = netdev_priv(dev);
925 int retval;
926
927 /* Just to be safe, stop the device first */
928 xemaclite_disable_interrupts(lp);
929
930 if (lp->phy_node) {
931 u32 bmcr;
932
933 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
934 xemaclite_adjust_link, 0,
935 PHY_INTERFACE_MODE_MII);
936 if (!lp->phy_dev) {
937 dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
938 return -ENODEV;
939 }
940
941 /* EmacLite doesn't support giga-bit speeds */
942 lp->phy_dev->supported &= (PHY_BASIC_FEATURES);
943 lp->phy_dev->advertising = lp->phy_dev->supported;
944
945 /* Don't advertise 1000BASE-T Full/Half duplex speeds */
946 phy_write(lp->phy_dev, MII_CTRL1000, 0);
947
948 /* Advertise only 10 and 100mbps full/half duplex speeds */
949 phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL);
950
951 /* Restart auto negotiation */
952 bmcr = phy_read(lp->phy_dev, MII_BMCR);
953 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
954 phy_write(lp->phy_dev, MII_BMCR, bmcr);
955
956 phy_start(lp->phy_dev);
957 }
958
959 /* Set the MAC address each time opened */
960 xemaclite_update_address(lp, dev->dev_addr);
961
962 /* Grab the IRQ */
963 retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
964 if (retval) {
965 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
966 dev->irq);
967 if (lp->phy_dev)
968 phy_disconnect(lp->phy_dev);
969 lp->phy_dev = NULL;
970
971 return retval;
972 }
973
974 /* Enable Interrupts */
975 xemaclite_enable_interrupts(lp);
976
977 /* We're ready to go */
978 netif_start_queue(dev);
979
980 return 0;
981}
982
983/**
984 * xemaclite_close - Close the network device
985 * @dev: Pointer to the network device
986 *
987 * This function stops the Tx queue, disables interrupts and frees the IRQ for
988 * the Emaclite device.
989 * It also disconnects the phy device associated with the Emaclite device.
990 */
991static int xemaclite_close(struct net_device *dev)
992{
993 struct net_local *lp = netdev_priv(dev);
994
995 netif_stop_queue(dev);
996 xemaclite_disable_interrupts(lp);
997 free_irq(dev->irq, dev);
998
999 if (lp->phy_dev)
1000 phy_disconnect(lp->phy_dev);
1001 lp->phy_dev = NULL;
1002
1003 return 0;
1004}
1005
1006/**
1007 * xemaclite_send - Transmit a frame
1008 * @orig_skb: Pointer to the socket buffer to be transmitted
1009 * @dev: Pointer to the network device
1010 *
1011 * This function checks if the Tx buffer of the Emaclite device is free to send
1012 * data. If so, it fills the Tx buffer with data from socket buffer data,
1013 * updates the stats and frees the socket buffer. The Tx completion is signaled
1014 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
1015 * deferred and the Tx queue is stopped so that the deferred socket buffer can
1016 * be transmitted when the Emaclite device is free to transmit data.
1017 *
1018 * Return: 0, always.
1019 */
1020static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
1021{
1022 struct net_local *lp = netdev_priv(dev);
1023 struct sk_buff *new_skb;
1024 unsigned int len;
1025 unsigned long flags;
1026
1027 len = orig_skb->len;
1028
1029 new_skb = orig_skb;
1030
1031 spin_lock_irqsave(&lp->reset_lock, flags);
1032 if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) {
1033 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1034 * defer the skb for transmission during the ISR, after the
1035 * current transmission is complete */
1036 netif_stop_queue(dev);
1037 lp->deferred_skb = new_skb;
1038 /* Take the time stamp now, since we can't do this in an ISR. */
1039 skb_tx_timestamp(new_skb);
1040 spin_unlock_irqrestore(&lp->reset_lock, flags);
1041 return 0;
1042 }
1043 spin_unlock_irqrestore(&lp->reset_lock, flags);
1044
1045 skb_tx_timestamp(new_skb);
1046
1047 dev->stats.tx_bytes += len;
1048 dev_kfree_skb(new_skb);
1049
1050 return 0;
1051}
1052
1053/**
1054 * xemaclite_remove_ndev - Free the network device
1055 * @ndev: Pointer to the network device to be freed
1056 *
1057 * This function un maps the IO region of the Emaclite device and frees the net
1058 * device.
1059 */
1060static void xemaclite_remove_ndev(struct net_device *ndev)
1061{
1062 if (ndev) {
1063 struct net_local *lp = netdev_priv(ndev);
1064
1065 if (lp->base_addr)
1066 iounmap((void __iomem __force *) (lp->base_addr));
1067 free_netdev(ndev);
1068 }
1069}
1070
1071/**
1072 * get_bool - Get a parameter from the OF device
1073 * @ofdev: Pointer to OF device structure
1074 * @s: Property to be retrieved
1075 *
1076 * This function looks for a property in the device node and returns the value
1077 * of the property if its found or 0 if the property is not found.
1078 *
1079 * Return: Value of the parameter if the parameter is found, or 0 otherwise
1080 */
1081static bool get_bool(struct platform_device *ofdev, const char *s)
1082{
1083 u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1084
1085 if (p) {
1086 return (bool)*p;
1087 } else {
1088 dev_warn(&ofdev->dev, "Parameter %s not found,"
1089 "defaulting to false\n", s);
1090 return 0;
1091 }
1092}
1093
1094static struct net_device_ops xemaclite_netdev_ops;
1095
1096/**
1097 * xemaclite_of_probe - Probe method for the Emaclite device.
1098 * @ofdev: Pointer to OF device structure
1099 * @match: Pointer to the structure used for matching a device
1100 *
1101 * This function probes for the Emaclite device in the device tree.
1102 * It initializes the driver data structure and the hardware, sets the MAC
1103 * address and registers the network device.
1104 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1105 * in the device.
1106 *
1107 * Return: 0, if the driver is bound to the Emaclite device, or
1108 * a negative error if there is failure.
1109 */
1110static int __devinit xemaclite_of_probe(struct platform_device *ofdev)
1111{
1112 struct resource r_irq; /* Interrupt resources */
1113 struct resource r_mem; /* IO mem resources */
1114 struct net_device *ndev = NULL;
1115 struct net_local *lp = NULL;
1116 struct device *dev = &ofdev->dev;
1117 const void *mac_address;
1118
1119 int rc = 0;
1120
1121 dev_info(dev, "Device Tree Probing\n");
1122
1123 /* Get iospace for the device */
1124 rc = of_address_to_resource(ofdev->dev.of_node, 0, &r_mem);
1125 if (rc) {
1126 dev_err(dev, "invalid address\n");
1127 return rc;
1128 }
1129
1130 /* Get IRQ for the device */
1131 rc = of_irq_to_resource(ofdev->dev.of_node, 0, &r_irq);
1132 if (rc == NO_IRQ) {
1133 dev_err(dev, "no IRQ found\n");
1134 return rc;
1135 }
1136
1137 /* Create an ethernet device instance */
1138 ndev = alloc_etherdev(sizeof(struct net_local));
1139 if (!ndev) {
1140 dev_err(dev, "Could not allocate network device\n");
1141 return -ENOMEM;
1142 }
1143
1144 dev_set_drvdata(dev, ndev);
1145 SET_NETDEV_DEV(ndev, &ofdev->dev);
1146
1147 ndev->irq = r_irq.start;
1148 ndev->mem_start = r_mem.start;
1149 ndev->mem_end = r_mem.end;
1150
1151 lp = netdev_priv(ndev);
1152 lp->ndev = ndev;
1153
1154 if (!request_mem_region(ndev->mem_start,
1155 ndev->mem_end - ndev->mem_start + 1,
1156 DRIVER_NAME)) {
1157 dev_err(dev, "Couldn't lock memory region at %p\n",
1158 (void *)ndev->mem_start);
1159 rc = -EBUSY;
1160 goto error2;
1161 }
1162
1163 /* Get the virtual base address for the device */
1164 lp->base_addr = ioremap(r_mem.start, resource_size(&r_mem));
1165 if (NULL == lp->base_addr) {
1166 dev_err(dev, "EmacLite: Could not allocate iomem\n");
1167 rc = -EIO;
1168 goto error1;
1169 }
1170
1171 spin_lock_init(&lp->reset_lock);
1172 lp->next_tx_buf_to_use = 0x0;
1173 lp->next_rx_buf_to_use = 0x0;
1174 lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1175 lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1176 mac_address = of_get_mac_address(ofdev->dev.of_node);
1177
1178 if (mac_address)
1179 /* Set the MAC address. */
1180 memcpy(ndev->dev_addr, mac_address, 6);
1181 else
1182 dev_warn(dev, "No MAC address found\n");
1183
1184 /* Clear the Tx CSR's in case this is a restart */
1185 out_be32(lp->base_addr + XEL_TSR_OFFSET, 0);
1186 out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0);
1187
1188 /* Set the MAC address in the EmacLite device */
1189 xemaclite_update_address(lp, ndev->dev_addr);
1190
1191 lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1192 rc = xemaclite_mdio_setup(lp, &ofdev->dev);
1193 if (rc)
1194 dev_warn(&ofdev->dev, "error registering MDIO bus\n");
1195
1196 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1197
1198 ndev->netdev_ops = &xemaclite_netdev_ops;
1199 ndev->flags &= ~IFF_MULTICAST;
1200 ndev->watchdog_timeo = TX_TIMEOUT;
1201
1202 /* Finally, register the device */
1203 rc = register_netdev(ndev);
1204 if (rc) {
1205 dev_err(dev,
1206 "Cannot register network device, aborting\n");
1207 goto error1;
1208 }
1209
1210 dev_info(dev,
1211 "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n",
1212 (unsigned int __force)ndev->mem_start,
1213 (unsigned int __force)lp->base_addr, ndev->irq);
1214 return 0;
1215
1216error1:
1217 release_mem_region(ndev->mem_start, resource_size(&r_mem));
1218
1219error2:
1220 xemaclite_remove_ndev(ndev);
1221 return rc;
1222}
1223
1224/**
1225 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1226 * @of_dev: Pointer to OF device structure
1227 *
1228 * This function is called if a device is physically removed from the system or
1229 * if the driver module is being unloaded. It frees any resources allocated to
1230 * the device.
1231 *
1232 * Return: 0, always.
1233 */
1234static int __devexit xemaclite_of_remove(struct platform_device *of_dev)
1235{
1236 struct device *dev = &of_dev->dev;
1237 struct net_device *ndev = dev_get_drvdata(dev);
1238
1239 struct net_local *lp = netdev_priv(ndev);
1240
1241 /* Un-register the mii_bus, if configured */
1242 if (lp->has_mdio) {
1243 mdiobus_unregister(lp->mii_bus);
1244 kfree(lp->mii_bus->irq);
1245 mdiobus_free(lp->mii_bus);
1246 lp->mii_bus = NULL;
1247 }
1248
1249 unregister_netdev(ndev);
1250
1251 if (lp->phy_node)
1252 of_node_put(lp->phy_node);
1253 lp->phy_node = NULL;
1254
1255 release_mem_region(ndev->mem_start, ndev->mem_end-ndev->mem_start + 1);
1256
1257 xemaclite_remove_ndev(ndev);
1258 dev_set_drvdata(dev, NULL);
1259
1260 return 0;
1261}
1262
1263#ifdef CONFIG_NET_POLL_CONTROLLER
1264static void
1265xemaclite_poll_controller(struct net_device *ndev)
1266{
1267 disable_irq(ndev->irq);
1268 xemaclite_interrupt(ndev->irq, ndev);
1269 enable_irq(ndev->irq);
1270}
1271#endif
1272
1273static struct net_device_ops xemaclite_netdev_ops = {
1274 .ndo_open = xemaclite_open,
1275 .ndo_stop = xemaclite_close,
1276 .ndo_start_xmit = xemaclite_send,
1277 .ndo_set_mac_address = xemaclite_set_mac_address,
1278 .ndo_tx_timeout = xemaclite_tx_timeout,
1279#ifdef CONFIG_NET_POLL_CONTROLLER
1280 .ndo_poll_controller = xemaclite_poll_controller,
1281#endif
1282};
1283
1284/* Match table for OF platform binding */
1285static struct of_device_id xemaclite_of_match[] __devinitdata = {
1286 { .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1287 { .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1288 { .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1289 { .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1290 { .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1291 { .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1292 { /* end of list */ },
1293};
1294MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1295
1296static struct platform_driver xemaclite_of_driver = {
1297 .driver = {
1298 .name = DRIVER_NAME,
1299 .owner = THIS_MODULE,
1300 .of_match_table = xemaclite_of_match,
1301 },
1302 .probe = xemaclite_of_probe,
1303 .remove = __devexit_p(xemaclite_of_remove),
1304};
1305
1306/**
1307 * xgpiopss_init - Initial driver registration call
1308 *
1309 * Return: 0 upon success, or a negative error upon failure.
1310 */
1311static int __init xemaclite_init(void)
1312{
1313 /* No kernel boot options used, we just need to register the driver */
1314 return platform_driver_register(&xemaclite_of_driver);
1315}
1316
1317/**
1318 * xemaclite_cleanup - Driver un-registration call
1319 */
1320static void __exit xemaclite_cleanup(void)
1321{
1322 platform_driver_unregister(&xemaclite_of_driver);
1323}
1324
1325module_init(xemaclite_init);
1326module_exit(xemaclite_cleanup);
1327
1328MODULE_AUTHOR("Xilinx, Inc.");
1329MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1330MODULE_LICENSE("GPL");