1/*******************************************************************************
  2
  3  Intel 82599 Virtual Function driver
  4  Copyright(c) 1999 - 2012 Intel Corporation.
  5
  6  This program is free software; you can redistribute it and/or modify it
  7  under the terms and conditions of the GNU General Public License,
  8  version 2, as published by the Free Software Foundation.
  9
 10  This program is distributed in the hope it will be useful, but WITHOUT
 11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 13  more details.
 14
 15  You should have received a copy of the GNU General Public License along with
 16  this program; if not, write to the Free Software Foundation, Inc.,
 17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 18
 19  The full GNU General Public License is included in this distribution in
 20  the file called "COPYING".
 21
 22  Contact Information:
 23  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 24  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 25
 26*******************************************************************************/
 27
 28#include "vf.h"
 29#include "ixgbevf.h"
 30
 31/**
 32 *  ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx
 33 *  @hw: pointer to hardware structure
 34 *
 35 *  Starts the hardware by filling the bus info structure and media type, clears
 36 *  all on chip counters, initializes receive address registers, multicast
 37 *  table, VLAN filter table, calls routine to set up link and flow control
 38 *  settings, and leaves transmit and receive units disabled and uninitialized
 39 **/
 40static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)
 41{
 42	/* Clear adapter stopped flag */
 43	hw->adapter_stopped = false;
 44
 45	return 0;
 46}
 47
 48/**
 49 *  ixgbevf_init_hw_vf - virtual function hardware initialization
 50 *  @hw: pointer to hardware structure
 51 *
 52 *  Initialize the hardware by resetting the hardware and then starting
 53 *  the hardware
 54 **/
 55static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)
 56{
 57	s32 status = hw->mac.ops.start_hw(hw);
 58
 59	hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
 60
 61	return status;
 62}
 63
 64/**
 65 *  ixgbevf_reset_hw_vf - Performs hardware reset
 66 *  @hw: pointer to hardware structure
 67 *
 68 *  Resets the hardware by reseting the transmit and receive units, masks and
 69 *  clears all interrupts.
 70 **/
 71static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)
 72{
 73	struct ixgbe_mbx_info *mbx = &hw->mbx;
 74	u32 timeout = IXGBE_VF_INIT_TIMEOUT;
 75	s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
 76	u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
 77	u8 *addr = (u8 *)(&msgbuf[1]);
 78
 79	/* Call adapter stop to disable tx/rx and clear interrupts */
 80	hw->mac.ops.stop_adapter(hw);
 81
 82	IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
 83	IXGBE_WRITE_FLUSH(hw);
 84
 85	/* we cannot reset while the RSTI / RSTD bits are asserted */
 86	while (!mbx->ops.check_for_rst(hw) && timeout) {
 87		timeout--;
 88		udelay(5);
 89	}
 90
 91	if (!timeout)
 92		return IXGBE_ERR_RESET_FAILED;
 93
 94	/* mailbox timeout can now become active */
 95	mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
 96
 97	msgbuf[0] = IXGBE_VF_RESET;
 98	mbx->ops.write_posted(hw, msgbuf, 1);
 99
100	msleep(10);
101
102	/* set our "perm_addr" based on info provided by PF */
103	/* also set up the mc_filter_type which is piggy backed
104	 * on the mac address in word 3 */
105	ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);
106	if (ret_val)
107		return ret_val;
108
109	if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
110		return IXGBE_ERR_INVALID_MAC_ADDR;
111
112	memcpy(hw->mac.perm_addr, addr, ETH_ALEN);
113	hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
114
115	return 0;
116}
117
118/**
119 *  ixgbevf_stop_hw_vf - Generic stop Tx/Rx units
120 *  @hw: pointer to hardware structure
121 *
122 *  Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
123 *  disables transmit and receive units. The adapter_stopped flag is used by
124 *  the shared code and drivers to determine if the adapter is in a stopped
125 *  state and should not touch the hardware.
126 **/
127static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)
128{
129	u32 number_of_queues;
130	u32 reg_val;
131	u16 i;
132
133	/*
134	 * Set the adapter_stopped flag so other driver functions stop touching
135	 * the hardware
136	 */
137	hw->adapter_stopped = true;
138
139	/* Disable the receive unit by stopped each queue */
140	number_of_queues = hw->mac.max_rx_queues;
141	for (i = 0; i < number_of_queues; i++) {
142		reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
143		if (reg_val & IXGBE_RXDCTL_ENABLE) {
144			reg_val &= ~IXGBE_RXDCTL_ENABLE;
145			IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
146		}
147	}
148
149	IXGBE_WRITE_FLUSH(hw);
150
151	/* Clear interrupt mask to stop from interrupts being generated */
152	IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
153
154	/* Clear any pending interrupts */
155	IXGBE_READ_REG(hw, IXGBE_VTEICR);
156
157	/* Disable the transmit unit.  Each queue must be disabled. */
158	number_of_queues = hw->mac.max_tx_queues;
159	for (i = 0; i < number_of_queues; i++) {
160		reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
161		if (reg_val & IXGBE_TXDCTL_ENABLE) {
162			reg_val &= ~IXGBE_TXDCTL_ENABLE;
163			IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
164		}
165	}
166
167	return 0;
168}
169
170/**
171 *  ixgbevf_mta_vector - Determines bit-vector in multicast table to set
172 *  @hw: pointer to hardware structure
173 *  @mc_addr: the multicast address
174 *
175 *  Extracts the 12 bits, from a multicast address, to determine which
176 *  bit-vector to set in the multicast table. The hardware uses 12 bits, from
177 *  incoming rx multicast addresses, to determine the bit-vector to check in
178 *  the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
179 *  by the MO field of the MCSTCTRL. The MO field is set during initialization
180 *  to mc_filter_type.
181 **/
182static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
183{
184	u32 vector = 0;
185
186	switch (hw->mac.mc_filter_type) {
187	case 0:   /* use bits [47:36] of the address */
188		vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
189		break;
190	case 1:   /* use bits [46:35] of the address */
191		vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
192		break;
193	case 2:   /* use bits [45:34] of the address */
194		vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
195		break;
196	case 3:   /* use bits [43:32] of the address */
197		vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
198		break;
199	default:  /* Invalid mc_filter_type */
200		break;
201	}
202
203	/* vector can only be 12-bits or boundary will be exceeded */
204	vector &= 0xFFF;
205	return vector;
206}
207
208/**
209 *  ixgbevf_get_mac_addr_vf - Read device MAC address
210 *  @hw: pointer to the HW structure
211 *  @mac_addr: pointer to storage for retrieved MAC address
212 **/
213static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
214{
215	memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
216
217	return 0;
218}
219
220static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
221{
222	struct ixgbe_mbx_info *mbx = &hw->mbx;
223	u32 msgbuf[3];
224	u8 *msg_addr = (u8 *)(&msgbuf[1]);
225	s32 ret_val;
226
227	memset(msgbuf, 0, sizeof(msgbuf));
228	/*
229	 * If index is one then this is the start of a new list and needs
230	 * indication to the PF so it can do it's own list management.
231	 * If it is zero then that tells the PF to just clear all of
232	 * this VF's macvlans and there is no new list.
233	 */
234	msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
235	msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
236	if (addr)
237		memcpy(msg_addr, addr, 6);
238	ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
239
240	if (!ret_val)
241		ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
242
243	msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
244
245	if (!ret_val)
246		if (msgbuf[0] ==
247		    (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
248			ret_val = -ENOMEM;
249
250	return ret_val;
251}
252
253/**
254 *  ixgbevf_set_rar_vf - set device MAC address
255 *  @hw: pointer to hardware structure
256 *  @index: Receive address register to write
257 *  @addr: Address to put into receive address register
258 *  @vmdq: Unused in this implementation
259 **/
260static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
261			      u32 vmdq)
262{
263	struct ixgbe_mbx_info *mbx = &hw->mbx;
264	u32 msgbuf[3];
265	u8 *msg_addr = (u8 *)(&msgbuf[1]);
266	s32 ret_val;
267
268	memset(msgbuf, 0, sizeof(msgbuf));
269	msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
270	memcpy(msg_addr, addr, 6);
271	ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
272
273	if (!ret_val)
274		ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
275
276	msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
277
278	/* if nacked the address was rejected, use "perm_addr" */
279	if (!ret_val &&
280	    (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
281		ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);
282
283	return ret_val;
284}
285
286static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
287					u32 *msg, u16 size)
288{
289	struct ixgbe_mbx_info *mbx = &hw->mbx;
290	u32 retmsg[IXGBE_VFMAILBOX_SIZE];
291	s32 retval = mbx->ops.write_posted(hw, msg, size);
292
293	if (!retval)
294		mbx->ops.read_posted(hw, retmsg, size);
295}
296
297/**
298 *  ixgbevf_update_mc_addr_list_vf - Update Multicast addresses
299 *  @hw: pointer to the HW structure
300 *  @netdev: pointer to net device structure
301 *
302 *  Updates the Multicast Table Array.
303 **/
304static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw,
305					  struct net_device *netdev)
306{
307	struct netdev_hw_addr *ha;
308	u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
309	u16 *vector_list = (u16 *)&msgbuf[1];
310	u32 cnt, i;
311
312	/* Each entry in the list uses 1 16 bit word.  We have 30
313	 * 16 bit words available in our HW msg buffer (minus 1 for the
314	 * msg type).  That's 30 hash values if we pack 'em right.  If
315	 * there are more than 30 MC addresses to add then punt the
316	 * extras for now and then add code to handle more than 30 later.
317	 * It would be unusual for a server to request that many multi-cast
318	 * addresses except for in large enterprise network environments.
319	 */
320
321	cnt = netdev_mc_count(netdev);
322	if (cnt > 30)
323		cnt = 30;
324	msgbuf[0] = IXGBE_VF_SET_MULTICAST;
325	msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
326
327	i = 0;
328	netdev_for_each_mc_addr(ha, netdev) {
329		if (i == cnt)
330			break;
331		vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr);
332	}
333
334	ixgbevf_write_msg_read_ack(hw, msgbuf, IXGBE_VFMAILBOX_SIZE);
335
336	return 0;
337}
338
339/**
340 *  ixgbevf_set_vfta_vf - Set/Unset vlan filter table address
341 *  @hw: pointer to the HW structure
342 *  @vlan: 12 bit VLAN ID
343 *  @vind: unused by VF drivers
344 *  @vlan_on: if true then set bit, else clear bit
345 **/
346static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
347			       bool vlan_on)
348{
349	u32 msgbuf[2];
350
351	msgbuf[0] = IXGBE_VF_SET_VLAN;
352	msgbuf[1] = vlan;
353	/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
354	msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
355
356	ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
357
358	return 0;
359}
360
361/**
362 *  ixgbevf_setup_mac_link_vf - Setup MAC link settings
363 *  @hw: pointer to hardware structure
364 *  @speed: Unused in this implementation
365 *  @autoneg: Unused in this implementation
366 *  @autoneg_wait_to_complete: Unused in this implementation
367 *
368 *  Do nothing and return success.  VF drivers are not allowed to change
369 *  global settings.  Maintained for driver compatibility.
370 **/
371static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,
372				     ixgbe_link_speed speed, bool autoneg,
373				     bool autoneg_wait_to_complete)
374{
375	return 0;
376}
377
378/**
379 *  ixgbevf_check_mac_link_vf - Get link/speed status
380 *  @hw: pointer to hardware structure
381 *  @speed: pointer to link speed
382 *  @link_up: true is link is up, false otherwise
383 *  @autoneg_wait_to_complete: true when waiting for completion is needed
384 *
385 *  Reads the links register to determine if link is up and the current speed
386 **/
387static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,
388				     ixgbe_link_speed *speed,
389				     bool *link_up,
390				     bool autoneg_wait_to_complete)
391{
392	u32 links_reg;
393
394	if (!(hw->mbx.ops.check_for_rst(hw))) {
395		*link_up = false;
396		*speed = 0;
397		return -1;
398	}
399
400	links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
401
402	if (links_reg & IXGBE_LINKS_UP)
403		*link_up = true;
404	else
405		*link_up = false;
406
407	switch (links_reg & IXGBE_LINKS_SPEED_82599) {
408	case IXGBE_LINKS_SPEED_10G_82599:
409		*speed = IXGBE_LINK_SPEED_10GB_FULL;
410		break;
411	case IXGBE_LINKS_SPEED_1G_82599:
412		*speed = IXGBE_LINK_SPEED_1GB_FULL;
413		break;
414	case IXGBE_LINKS_SPEED_100_82599:
415		*speed = IXGBE_LINK_SPEED_100_FULL;
416		break;
417	}
418
419	return 0;
420}
421
422static const struct ixgbe_mac_operations ixgbevf_mac_ops = {
423	.init_hw             = ixgbevf_init_hw_vf,
424	.reset_hw            = ixgbevf_reset_hw_vf,
425	.start_hw            = ixgbevf_start_hw_vf,
426	.get_mac_addr        = ixgbevf_get_mac_addr_vf,
427	.stop_adapter        = ixgbevf_stop_hw_vf,
428	.setup_link          = ixgbevf_setup_mac_link_vf,
429	.check_link          = ixgbevf_check_mac_link_vf,
430	.set_rar             = ixgbevf_set_rar_vf,
431	.update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,
432	.set_uc_addr         = ixgbevf_set_uc_addr_vf,
433	.set_vfta            = ixgbevf_set_vfta_vf,
434};
435
436const struct ixgbevf_info ixgbevf_82599_vf_info = {
437	.mac = ixgbe_mac_82599_vf,
438	.mac_ops = &ixgbevf_mac_ops,
439};
440
441const struct ixgbevf_info ixgbevf_X540_vf_info = {
442	.mac = ixgbe_mac_X540_vf,
443	.mac_ops = &ixgbevf_mac_ops,
444};