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1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
30/* Might need a hrtimer here? */
31#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
32
33static int vmw_surface_dmabuf_pin(struct vmw_framebuffer *vfb);
34static int vmw_surface_dmabuf_unpin(struct vmw_framebuffer *vfb);
35
36void vmw_display_unit_cleanup(struct vmw_display_unit *du)
37{
38 if (du->cursor_surface)
39 vmw_surface_unreference(&du->cursor_surface);
40 if (du->cursor_dmabuf)
41 vmw_dmabuf_unreference(&du->cursor_dmabuf);
42 drm_crtc_cleanup(&du->crtc);
43 drm_encoder_cleanup(&du->encoder);
44 drm_connector_cleanup(&du->connector);
45}
46
47/*
48 * Display Unit Cursor functions
49 */
50
51int vmw_cursor_update_image(struct vmw_private *dev_priv,
52 u32 *image, u32 width, u32 height,
53 u32 hotspotX, u32 hotspotY)
54{
55 struct {
56 u32 cmd;
57 SVGAFifoCmdDefineAlphaCursor cursor;
58 } *cmd;
59 u32 image_size = width * height * 4;
60 u32 cmd_size = sizeof(*cmd) + image_size;
61
62 if (!image)
63 return -EINVAL;
64
65 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
66 if (unlikely(cmd == NULL)) {
67 DRM_ERROR("Fifo reserve failed.\n");
68 return -ENOMEM;
69 }
70
71 memset(cmd, 0, sizeof(*cmd));
72
73 memcpy(&cmd[1], image, image_size);
74
75 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
76 cmd->cursor.id = cpu_to_le32(0);
77 cmd->cursor.width = cpu_to_le32(width);
78 cmd->cursor.height = cpu_to_le32(height);
79 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
80 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
81
82 vmw_fifo_commit(dev_priv, cmd_size);
83
84 return 0;
85}
86
87void vmw_cursor_update_position(struct vmw_private *dev_priv,
88 bool show, int x, int y)
89{
90 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
91 uint32_t count;
92
93 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
94 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
95 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
96 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
97 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
98}
99
100int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
101 uint32_t handle, uint32_t width, uint32_t height)
102{
103 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
104 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
105 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
106 struct vmw_surface *surface = NULL;
107 struct vmw_dma_buffer *dmabuf = NULL;
108 int ret;
109
110 if (handle) {
111 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
112 handle, &surface);
113 if (!ret) {
114 if (!surface->snooper.image) {
115 DRM_ERROR("surface not suitable for cursor\n");
116 return -EINVAL;
117 }
118 } else {
119 ret = vmw_user_dmabuf_lookup(tfile,
120 handle, &dmabuf);
121 if (ret) {
122 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
123 return -EINVAL;
124 }
125 }
126 }
127
128 /* takedown old cursor */
129 if (du->cursor_surface) {
130 du->cursor_surface->snooper.crtc = NULL;
131 vmw_surface_unreference(&du->cursor_surface);
132 }
133 if (du->cursor_dmabuf)
134 vmw_dmabuf_unreference(&du->cursor_dmabuf);
135
136 /* setup new image */
137 if (surface) {
138 /* vmw_user_surface_lookup takes one reference */
139 du->cursor_surface = surface;
140
141 du->cursor_surface->snooper.crtc = crtc;
142 du->cursor_age = du->cursor_surface->snooper.age;
143 vmw_cursor_update_image(dev_priv, surface->snooper.image,
144 64, 64, du->hotspot_x, du->hotspot_y);
145 } else if (dmabuf) {
146 struct ttm_bo_kmap_obj map;
147 unsigned long kmap_offset;
148 unsigned long kmap_num;
149 void *virtual;
150 bool dummy;
151
152 /* vmw_user_surface_lookup takes one reference */
153 du->cursor_dmabuf = dmabuf;
154
155 kmap_offset = 0;
156 kmap_num = (64*64*4) >> PAGE_SHIFT;
157
158 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
159 if (unlikely(ret != 0)) {
160 DRM_ERROR("reserve failed\n");
161 return -EINVAL;
162 }
163
164 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
165 if (unlikely(ret != 0))
166 goto err_unreserve;
167
168 virtual = ttm_kmap_obj_virtual(&map, &dummy);
169 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
170 du->hotspot_x, du->hotspot_y);
171
172 ttm_bo_kunmap(&map);
173err_unreserve:
174 ttm_bo_unreserve(&dmabuf->base);
175
176 } else {
177 vmw_cursor_update_position(dev_priv, false, 0, 0);
178 return 0;
179 }
180
181 vmw_cursor_update_position(dev_priv, true, du->cursor_x, du->cursor_y);
182
183 return 0;
184}
185
186int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
187{
188 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
189 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
190 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
191
192 du->cursor_x = x + crtc->x;
193 du->cursor_y = y + crtc->y;
194
195 vmw_cursor_update_position(dev_priv, shown,
196 du->cursor_x, du->cursor_y);
197
198 return 0;
199}
200
201void vmw_kms_cursor_snoop(struct vmw_surface *srf,
202 struct ttm_object_file *tfile,
203 struct ttm_buffer_object *bo,
204 SVGA3dCmdHeader *header)
205{
206 struct ttm_bo_kmap_obj map;
207 unsigned long kmap_offset;
208 unsigned long kmap_num;
209 SVGA3dCopyBox *box;
210 unsigned box_count;
211 void *virtual;
212 bool dummy;
213 struct vmw_dma_cmd {
214 SVGA3dCmdHeader header;
215 SVGA3dCmdSurfaceDMA dma;
216 } *cmd;
217 int ret;
218
219 cmd = container_of(header, struct vmw_dma_cmd, header);
220
221 /* No snooper installed */
222 if (!srf->snooper.image)
223 return;
224
225 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
226 DRM_ERROR("face and mipmap for cursors should never != 0\n");
227 return;
228 }
229
230 if (cmd->header.size < 64) {
231 DRM_ERROR("at least one full copy box must be given\n");
232 return;
233 }
234
235 box = (SVGA3dCopyBox *)&cmd[1];
236 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
237 sizeof(SVGA3dCopyBox);
238
239 if (cmd->dma.guest.pitch != (64 * 4) ||
240 cmd->dma.guest.ptr.offset % PAGE_SIZE ||
241 box->x != 0 || box->y != 0 || box->z != 0 ||
242 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
243 box->w != 64 || box->h != 64 || box->d != 1 ||
244 box_count != 1) {
245 /* TODO handle none page aligned offsets */
246 /* TODO handle partial uploads and pitch != 256 */
247 /* TODO handle more then one copy (size != 64) */
248 DRM_ERROR("lazy programmer, can't handle weird stuff\n");
249 return;
250 }
251
252 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
253 kmap_num = (64*64*4) >> PAGE_SHIFT;
254
255 ret = ttm_bo_reserve(bo, true, false, false, 0);
256 if (unlikely(ret != 0)) {
257 DRM_ERROR("reserve failed\n");
258 return;
259 }
260
261 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
262 if (unlikely(ret != 0))
263 goto err_unreserve;
264
265 virtual = ttm_kmap_obj_virtual(&map, &dummy);
266
267 memcpy(srf->snooper.image, virtual, 64*64*4);
268 srf->snooper.age++;
269
270 /* we can't call this function from this function since execbuf has
271 * reserved fifo space.
272 *
273 * if (srf->snooper.crtc)
274 * vmw_ldu_crtc_cursor_update_image(dev_priv,
275 * srf->snooper.image, 64, 64,
276 * du->hotspot_x, du->hotspot_y);
277 */
278
279 ttm_bo_kunmap(&map);
280err_unreserve:
281 ttm_bo_unreserve(bo);
282}
283
284void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
285{
286 struct drm_device *dev = dev_priv->dev;
287 struct vmw_display_unit *du;
288 struct drm_crtc *crtc;
289
290 mutex_lock(&dev->mode_config.mutex);
291
292 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
293 du = vmw_crtc_to_du(crtc);
294 if (!du->cursor_surface ||
295 du->cursor_age == du->cursor_surface->snooper.age)
296 continue;
297
298 du->cursor_age = du->cursor_surface->snooper.age;
299 vmw_cursor_update_image(dev_priv,
300 du->cursor_surface->snooper.image,
301 64, 64, du->hotspot_x, du->hotspot_y);
302 }
303
304 mutex_unlock(&dev->mode_config.mutex);
305}
306
307/*
308 * Generic framebuffer code
309 */
310
311int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
312 struct drm_file *file_priv,
313 unsigned int *handle)
314{
315 if (handle)
316 handle = 0;
317
318 return 0;
319}
320
321/*
322 * Surface framebuffer code
323 */
324
325#define vmw_framebuffer_to_vfbs(x) \
326 container_of(x, struct vmw_framebuffer_surface, base.base)
327
328struct vmw_framebuffer_surface {
329 struct vmw_framebuffer base;
330 struct vmw_surface *surface;
331 struct vmw_dma_buffer *buffer;
332 struct delayed_work d_work;
333 struct mutex work_lock;
334 bool present_fs;
335 struct list_head head;
336 struct drm_master *master;
337};
338
339/**
340 * vmw_kms_idle_workqueues - Flush workqueues on this master
341 *
342 * @vmaster - Pointer identifying the master, for the surfaces of which
343 * we idle the dirty work queues.
344 *
345 * This function should be called with the ttm lock held in exclusive mode
346 * to idle all dirty work queues before the fifo is taken down.
347 *
348 * The work task may actually requeue itself, but after the flush returns we're
349 * sure that there's nothing to present, since the ttm lock is held in
350 * exclusive mode, so the fifo will never get used.
351 */
352
353void vmw_kms_idle_workqueues(struct vmw_master *vmaster)
354{
355 struct vmw_framebuffer_surface *entry;
356
357 mutex_lock(&vmaster->fb_surf_mutex);
358 list_for_each_entry(entry, &vmaster->fb_surf, head) {
359 if (cancel_delayed_work_sync(&entry->d_work))
360 (void) entry->d_work.work.func(&entry->d_work.work);
361
362 (void) cancel_delayed_work_sync(&entry->d_work);
363 }
364 mutex_unlock(&vmaster->fb_surf_mutex);
365}
366
367void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
368{
369 struct vmw_framebuffer_surface *vfbs =
370 vmw_framebuffer_to_vfbs(framebuffer);
371 struct vmw_master *vmaster = vmw_master(vfbs->master);
372
373
374 mutex_lock(&vmaster->fb_surf_mutex);
375 list_del(&vfbs->head);
376 mutex_unlock(&vmaster->fb_surf_mutex);
377
378 cancel_delayed_work_sync(&vfbs->d_work);
379 drm_master_put(&vfbs->master);
380 drm_framebuffer_cleanup(framebuffer);
381 vmw_surface_unreference(&vfbs->surface);
382
383 kfree(vfbs);
384}
385
386static void vmw_framebuffer_present_fs_callback(struct work_struct *work)
387{
388 struct delayed_work *d_work =
389 container_of(work, struct delayed_work, work);
390 struct vmw_framebuffer_surface *vfbs =
391 container_of(d_work, struct vmw_framebuffer_surface, d_work);
392 struct vmw_surface *surf = vfbs->surface;
393 struct drm_framebuffer *framebuffer = &vfbs->base.base;
394 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
395
396 struct {
397 SVGA3dCmdHeader header;
398 SVGA3dCmdPresent body;
399 SVGA3dCopyRect cr;
400 } *cmd;
401
402 /**
403 * Strictly we should take the ttm_lock in read mode before accessing
404 * the fifo, to make sure the fifo is present and up. However,
405 * instead we flush all workqueues under the ttm lock in exclusive mode
406 * before taking down the fifo.
407 */
408 mutex_lock(&vfbs->work_lock);
409 if (!vfbs->present_fs)
410 goto out_unlock;
411
412 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
413 if (unlikely(cmd == NULL))
414 goto out_resched;
415
416 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
417 cmd->header.size = cpu_to_le32(sizeof(cmd->body) + sizeof(cmd->cr));
418 cmd->body.sid = cpu_to_le32(surf->res.id);
419 cmd->cr.x = cpu_to_le32(0);
420 cmd->cr.y = cpu_to_le32(0);
421 cmd->cr.srcx = cmd->cr.x;
422 cmd->cr.srcy = cmd->cr.y;
423 cmd->cr.w = cpu_to_le32(framebuffer->width);
424 cmd->cr.h = cpu_to_le32(framebuffer->height);
425 vfbs->present_fs = false;
426 vmw_fifo_commit(dev_priv, sizeof(*cmd));
427out_resched:
428 /**
429 * Will not re-add if already pending.
430 */
431 schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
432out_unlock:
433 mutex_unlock(&vfbs->work_lock);
434}
435
436
437int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
438 struct drm_file *file_priv,
439 unsigned flags, unsigned color,
440 struct drm_clip_rect *clips,
441 unsigned num_clips)
442{
443 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
444 struct vmw_master *vmaster = vmw_master(file_priv->master);
445 struct vmw_framebuffer_surface *vfbs =
446 vmw_framebuffer_to_vfbs(framebuffer);
447 struct vmw_surface *surf = vfbs->surface;
448 struct drm_clip_rect norect;
449 SVGA3dCopyRect *cr;
450 int i, inc = 1;
451 int ret;
452
453 struct {
454 SVGA3dCmdHeader header;
455 SVGA3dCmdPresent body;
456 SVGA3dCopyRect cr;
457 } *cmd;
458
459 if (unlikely(vfbs->master != file_priv->master))
460 return -EINVAL;
461
462 ret = ttm_read_lock(&vmaster->lock, true);
463 if (unlikely(ret != 0))
464 return ret;
465
466 if (!num_clips ||
467 !(dev_priv->fifo.capabilities &
468 SVGA_FIFO_CAP_SCREEN_OBJECT)) {
469 int ret;
470
471 mutex_lock(&vfbs->work_lock);
472 vfbs->present_fs = true;
473 ret = schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
474 mutex_unlock(&vfbs->work_lock);
475 if (ret) {
476 /**
477 * No work pending, Force immediate present.
478 */
479 vmw_framebuffer_present_fs_callback(&vfbs->d_work.work);
480 }
481 ttm_read_unlock(&vmaster->lock);
482 return 0;
483 }
484
485 if (!num_clips) {
486 num_clips = 1;
487 clips = &norect;
488 norect.x1 = norect.y1 = 0;
489 norect.x2 = framebuffer->width;
490 norect.y2 = framebuffer->height;
491 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
492 num_clips /= 2;
493 inc = 2; /* skip source rects */
494 }
495
496 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
497 if (unlikely(cmd == NULL)) {
498 DRM_ERROR("Fifo reserve failed.\n");
499 ttm_read_unlock(&vmaster->lock);
500 return -ENOMEM;
501 }
502
503 memset(cmd, 0, sizeof(*cmd));
504
505 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
506 cmd->header.size = cpu_to_le32(sizeof(cmd->body) + num_clips * sizeof(cmd->cr));
507 cmd->body.sid = cpu_to_le32(surf->res.id);
508
509 for (i = 0, cr = &cmd->cr; i < num_clips; i++, cr++, clips += inc) {
510 cr->x = cpu_to_le16(clips->x1);
511 cr->y = cpu_to_le16(clips->y1);
512 cr->srcx = cr->x;
513 cr->srcy = cr->y;
514 cr->w = cpu_to_le16(clips->x2 - clips->x1);
515 cr->h = cpu_to_le16(clips->y2 - clips->y1);
516 }
517
518 vmw_fifo_commit(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
519 ttm_read_unlock(&vmaster->lock);
520 return 0;
521}
522
523static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
524 .destroy = vmw_framebuffer_surface_destroy,
525 .dirty = vmw_framebuffer_surface_dirty,
526 .create_handle = vmw_framebuffer_create_handle,
527};
528
529static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
530 struct drm_file *file_priv,
531 struct vmw_surface *surface,
532 struct vmw_framebuffer **out,
533 const struct drm_mode_fb_cmd
534 *mode_cmd)
535
536{
537 struct drm_device *dev = dev_priv->dev;
538 struct vmw_framebuffer_surface *vfbs;
539 enum SVGA3dSurfaceFormat format;
540 struct vmw_master *vmaster = vmw_master(file_priv->master);
541 int ret;
542
543 /*
544 * Sanity checks.
545 */
546
547 if (unlikely(surface->mip_levels[0] != 1 ||
548 surface->num_sizes != 1 ||
549 surface->sizes[0].width < mode_cmd->width ||
550 surface->sizes[0].height < mode_cmd->height ||
551 surface->sizes[0].depth != 1)) {
552 DRM_ERROR("Incompatible surface dimensions "
553 "for requested mode.\n");
554 return -EINVAL;
555 }
556
557 switch (mode_cmd->depth) {
558 case 32:
559 format = SVGA3D_A8R8G8B8;
560 break;
561 case 24:
562 format = SVGA3D_X8R8G8B8;
563 break;
564 case 16:
565 format = SVGA3D_R5G6B5;
566 break;
567 case 15:
568 format = SVGA3D_A1R5G5B5;
569 break;
570 default:
571 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
572 return -EINVAL;
573 }
574
575 if (unlikely(format != surface->format)) {
576 DRM_ERROR("Invalid surface format for requested mode.\n");
577 return -EINVAL;
578 }
579
580 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
581 if (!vfbs) {
582 ret = -ENOMEM;
583 goto out_err1;
584 }
585
586 ret = drm_framebuffer_init(dev, &vfbs->base.base,
587 &vmw_framebuffer_surface_funcs);
588 if (ret)
589 goto out_err2;
590
591 if (!vmw_surface_reference(surface)) {
592 DRM_ERROR("failed to reference surface %p\n", surface);
593 goto out_err3;
594 }
595
596 /* XXX get the first 3 from the surface info */
597 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
598 vfbs->base.base.pitch = mode_cmd->pitch;
599 vfbs->base.base.depth = mode_cmd->depth;
600 vfbs->base.base.width = mode_cmd->width;
601 vfbs->base.base.height = mode_cmd->height;
602 vfbs->base.pin = &vmw_surface_dmabuf_pin;
603 vfbs->base.unpin = &vmw_surface_dmabuf_unpin;
604 vfbs->surface = surface;
605 vfbs->master = drm_master_get(file_priv->master);
606 mutex_init(&vfbs->work_lock);
607
608 mutex_lock(&vmaster->fb_surf_mutex);
609 INIT_DELAYED_WORK(&vfbs->d_work, &vmw_framebuffer_present_fs_callback);
610 list_add_tail(&vfbs->head, &vmaster->fb_surf);
611 mutex_unlock(&vmaster->fb_surf_mutex);
612
613 *out = &vfbs->base;
614
615 return 0;
616
617out_err3:
618 drm_framebuffer_cleanup(&vfbs->base.base);
619out_err2:
620 kfree(vfbs);
621out_err1:
622 return ret;
623}
624
625/*
626 * Dmabuf framebuffer code
627 */
628
629#define vmw_framebuffer_to_vfbd(x) \
630 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
631
632struct vmw_framebuffer_dmabuf {
633 struct vmw_framebuffer base;
634 struct vmw_dma_buffer *buffer;
635};
636
637void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
638{
639 struct vmw_framebuffer_dmabuf *vfbd =
640 vmw_framebuffer_to_vfbd(framebuffer);
641
642 drm_framebuffer_cleanup(framebuffer);
643 vmw_dmabuf_unreference(&vfbd->buffer);
644
645 kfree(vfbd);
646}
647
648int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
649 struct drm_file *file_priv,
650 unsigned flags, unsigned color,
651 struct drm_clip_rect *clips,
652 unsigned num_clips)
653{
654 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
655 struct vmw_master *vmaster = vmw_master(file_priv->master);
656 struct drm_clip_rect norect;
657 int ret;
658 struct {
659 uint32_t header;
660 SVGAFifoCmdUpdate body;
661 } *cmd;
662 int i, increment = 1;
663
664 ret = ttm_read_lock(&vmaster->lock, true);
665 if (unlikely(ret != 0))
666 return ret;
667
668 if (!num_clips) {
669 num_clips = 1;
670 clips = &norect;
671 norect.x1 = norect.y1 = 0;
672 norect.x2 = framebuffer->width;
673 norect.y2 = framebuffer->height;
674 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
675 num_clips /= 2;
676 increment = 2;
677 }
678
679 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
680 if (unlikely(cmd == NULL)) {
681 DRM_ERROR("Fifo reserve failed.\n");
682 ttm_read_unlock(&vmaster->lock);
683 return -ENOMEM;
684 }
685
686 for (i = 0; i < num_clips; i++, clips += increment) {
687 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
688 cmd[i].body.x = cpu_to_le32(clips->x1);
689 cmd[i].body.y = cpu_to_le32(clips->y1);
690 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
691 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
692 }
693
694 vmw_fifo_commit(dev_priv, sizeof(*cmd) * num_clips);
695 ttm_read_unlock(&vmaster->lock);
696
697 return 0;
698}
699
700static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
701 .destroy = vmw_framebuffer_dmabuf_destroy,
702 .dirty = vmw_framebuffer_dmabuf_dirty,
703 .create_handle = vmw_framebuffer_create_handle,
704};
705
706static int vmw_surface_dmabuf_pin(struct vmw_framebuffer *vfb)
707{
708 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
709 struct vmw_framebuffer_surface *vfbs =
710 vmw_framebuffer_to_vfbs(&vfb->base);
711 unsigned long size = vfbs->base.base.pitch * vfbs->base.base.height;
712 int ret;
713
714 vfbs->buffer = kzalloc(sizeof(*vfbs->buffer), GFP_KERNEL);
715 if (unlikely(vfbs->buffer == NULL))
716 return -ENOMEM;
717
718 vmw_overlay_pause_all(dev_priv);
719 ret = vmw_dmabuf_init(dev_priv, vfbs->buffer, size,
720 &vmw_vram_ne_placement,
721 false, &vmw_dmabuf_bo_free);
722 vmw_overlay_resume_all(dev_priv);
723 if (unlikely(ret != 0))
724 vfbs->buffer = NULL;
725
726 return ret;
727}
728
729static int vmw_surface_dmabuf_unpin(struct vmw_framebuffer *vfb)
730{
731 struct ttm_buffer_object *bo;
732 struct vmw_framebuffer_surface *vfbs =
733 vmw_framebuffer_to_vfbs(&vfb->base);
734
735 if (unlikely(vfbs->buffer == NULL))
736 return 0;
737
738 bo = &vfbs->buffer->base;
739 ttm_bo_unref(&bo);
740 vfbs->buffer = NULL;
741
742 return 0;
743}
744
745static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
746{
747 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
748 struct vmw_framebuffer_dmabuf *vfbd =
749 vmw_framebuffer_to_vfbd(&vfb->base);
750 int ret;
751
752
753 vmw_overlay_pause_all(dev_priv);
754
755 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer);
756
757 vmw_overlay_resume_all(dev_priv);
758
759 WARN_ON(ret != 0);
760
761 return 0;
762}
763
764static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
765{
766 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
767 struct vmw_framebuffer_dmabuf *vfbd =
768 vmw_framebuffer_to_vfbd(&vfb->base);
769
770 if (!vfbd->buffer) {
771 WARN_ON(!vfbd->buffer);
772 return 0;
773 }
774
775 return vmw_dmabuf_from_vram(dev_priv, vfbd->buffer);
776}
777
778static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
779 struct vmw_dma_buffer *dmabuf,
780 struct vmw_framebuffer **out,
781 const struct drm_mode_fb_cmd
782 *mode_cmd)
783
784{
785 struct drm_device *dev = dev_priv->dev;
786 struct vmw_framebuffer_dmabuf *vfbd;
787 unsigned int requested_size;
788 int ret;
789
790 requested_size = mode_cmd->height * mode_cmd->pitch;
791 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
792 DRM_ERROR("Screen buffer object size is too small "
793 "for requested mode.\n");
794 return -EINVAL;
795 }
796
797 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
798 if (!vfbd) {
799 ret = -ENOMEM;
800 goto out_err1;
801 }
802
803 ret = drm_framebuffer_init(dev, &vfbd->base.base,
804 &vmw_framebuffer_dmabuf_funcs);
805 if (ret)
806 goto out_err2;
807
808 if (!vmw_dmabuf_reference(dmabuf)) {
809 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
810 goto out_err3;
811 }
812
813 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
814 vfbd->base.base.pitch = mode_cmd->pitch;
815 vfbd->base.base.depth = mode_cmd->depth;
816 vfbd->base.base.width = mode_cmd->width;
817 vfbd->base.base.height = mode_cmd->height;
818 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
819 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
820 vfbd->buffer = dmabuf;
821 *out = &vfbd->base;
822
823 return 0;
824
825out_err3:
826 drm_framebuffer_cleanup(&vfbd->base.base);
827out_err2:
828 kfree(vfbd);
829out_err1:
830 return ret;
831}
832
833/*
834 * Generic Kernel modesetting functions
835 */
836
837static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
838 struct drm_file *file_priv,
839 struct drm_mode_fb_cmd *mode_cmd)
840{
841 struct vmw_private *dev_priv = vmw_priv(dev);
842 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
843 struct vmw_framebuffer *vfb = NULL;
844 struct vmw_surface *surface = NULL;
845 struct vmw_dma_buffer *bo = NULL;
846 u64 required_size;
847 int ret;
848
849 /**
850 * This code should be conditioned on Screen Objects not being used.
851 * If screen objects are used, we can allocate a GMR to hold the
852 * requested framebuffer.
853 */
854
855 required_size = mode_cmd->pitch * mode_cmd->height;
856 if (unlikely(required_size > (u64) dev_priv->vram_size)) {
857 DRM_ERROR("VRAM size is too small for requested mode.\n");
858 return NULL;
859 }
860
861 /**
862 * End conditioned code.
863 */
864
865 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
866 mode_cmd->handle, &surface);
867 if (ret)
868 goto try_dmabuf;
869
870 if (!surface->scanout)
871 goto err_not_scanout;
872
873 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface,
874 &vfb, mode_cmd);
875
876 /* vmw_user_surface_lookup takes one ref so does new_fb */
877 vmw_surface_unreference(&surface);
878
879 if (ret) {
880 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
881 return ERR_PTR(ret);
882 }
883 return &vfb->base;
884
885try_dmabuf:
886 DRM_INFO("%s: trying buffer\n", __func__);
887
888 ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
889 if (ret) {
890 DRM_ERROR("failed to find buffer: %i\n", ret);
891 return ERR_PTR(-ENOENT);
892 }
893
894 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
895 mode_cmd);
896
897 /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
898 vmw_dmabuf_unreference(&bo);
899
900 if (ret) {
901 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
902 return ERR_PTR(ret);
903 }
904
905 return &vfb->base;
906
907err_not_scanout:
908 DRM_ERROR("surface not marked as scanout\n");
909 /* vmw_user_surface_lookup takes one ref */
910 vmw_surface_unreference(&surface);
911
912 return ERR_PTR(-EINVAL);
913}
914
915static struct drm_mode_config_funcs vmw_kms_funcs = {
916 .fb_create = vmw_kms_fb_create,
917};
918
919int vmw_kms_init(struct vmw_private *dev_priv)
920{
921 struct drm_device *dev = dev_priv->dev;
922 int ret;
923
924 drm_mode_config_init(dev);
925 dev->mode_config.funcs = &vmw_kms_funcs;
926 dev->mode_config.min_width = 1;
927 dev->mode_config.min_height = 1;
928 /* assumed largest fb size */
929 dev->mode_config.max_width = 8192;
930 dev->mode_config.max_height = 8192;
931
932 ret = vmw_kms_init_legacy_display_system(dev_priv);
933
934 return 0;
935}
936
937int vmw_kms_close(struct vmw_private *dev_priv)
938{
939 /*
940 * Docs says we should take the lock before calling this function
941 * but since it destroys encoders and our destructor calls
942 * drm_encoder_cleanup which takes the lock we deadlock.
943 */
944 drm_mode_config_cleanup(dev_priv->dev);
945 vmw_kms_close_legacy_display_system(dev_priv);
946 return 0;
947}
948
949int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
950 struct drm_file *file_priv)
951{
952 struct drm_vmw_cursor_bypass_arg *arg = data;
953 struct vmw_display_unit *du;
954 struct drm_mode_object *obj;
955 struct drm_crtc *crtc;
956 int ret = 0;
957
958
959 mutex_lock(&dev->mode_config.mutex);
960 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
961
962 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
963 du = vmw_crtc_to_du(crtc);
964 du->hotspot_x = arg->xhot;
965 du->hotspot_y = arg->yhot;
966 }
967
968 mutex_unlock(&dev->mode_config.mutex);
969 return 0;
970 }
971
972 obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
973 if (!obj) {
974 ret = -EINVAL;
975 goto out;
976 }
977
978 crtc = obj_to_crtc(obj);
979 du = vmw_crtc_to_du(crtc);
980
981 du->hotspot_x = arg->xhot;
982 du->hotspot_y = arg->yhot;
983
984out:
985 mutex_unlock(&dev->mode_config.mutex);
986
987 return ret;
988}
989
990void vmw_kms_write_svga(struct vmw_private *vmw_priv,
991 unsigned width, unsigned height, unsigned pitch,
992 unsigned bbp, unsigned depth)
993{
994 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
995 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
996 else if (vmw_fifo_have_pitchlock(vmw_priv))
997 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
998 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
999 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1000 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bbp);
1001 vmw_write(vmw_priv, SVGA_REG_DEPTH, depth);
1002 vmw_write(vmw_priv, SVGA_REG_RED_MASK, 0x00ff0000);
1003 vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
1004 vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
1005}
1006
1007int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1008{
1009 struct vmw_vga_topology_state *save;
1010 uint32_t i;
1011
1012 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1013 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1014 vmw_priv->vga_depth = vmw_read(vmw_priv, SVGA_REG_DEPTH);
1015 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1016 vmw_priv->vga_pseudo = vmw_read(vmw_priv, SVGA_REG_PSEUDOCOLOR);
1017 vmw_priv->vga_red_mask = vmw_read(vmw_priv, SVGA_REG_RED_MASK);
1018 vmw_priv->vga_blue_mask = vmw_read(vmw_priv, SVGA_REG_BLUE_MASK);
1019 vmw_priv->vga_green_mask = vmw_read(vmw_priv, SVGA_REG_GREEN_MASK);
1020 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1021 vmw_priv->vga_pitchlock =
1022 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1023 else if (vmw_fifo_have_pitchlock(vmw_priv))
1024 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1025 SVGA_FIFO_PITCHLOCK);
1026
1027 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1028 return 0;
1029
1030 vmw_priv->num_displays = vmw_read(vmw_priv,
1031 SVGA_REG_NUM_GUEST_DISPLAYS);
1032
1033 if (vmw_priv->num_displays == 0)
1034 vmw_priv->num_displays = 1;
1035
1036 for (i = 0; i < vmw_priv->num_displays; ++i) {
1037 save = &vmw_priv->vga_save[i];
1038 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1039 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1040 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1041 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1042 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1043 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1044 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1045 if (i == 0 && vmw_priv->num_displays == 1 &&
1046 save->width == 0 && save->height == 0) {
1047
1048 /*
1049 * It should be fairly safe to assume that these
1050 * values are uninitialized.
1051 */
1052
1053 save->width = vmw_priv->vga_width - save->pos_x;
1054 save->height = vmw_priv->vga_height - save->pos_y;
1055 }
1056 }
1057
1058 return 0;
1059}
1060
1061int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1062{
1063 struct vmw_vga_topology_state *save;
1064 uint32_t i;
1065
1066 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1067 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1068 vmw_write(vmw_priv, SVGA_REG_DEPTH, vmw_priv->vga_depth);
1069 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1070 vmw_write(vmw_priv, SVGA_REG_PSEUDOCOLOR, vmw_priv->vga_pseudo);
1071 vmw_write(vmw_priv, SVGA_REG_RED_MASK, vmw_priv->vga_red_mask);
1072 vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, vmw_priv->vga_green_mask);
1073 vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, vmw_priv->vga_blue_mask);
1074 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1075 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1076 vmw_priv->vga_pitchlock);
1077 else if (vmw_fifo_have_pitchlock(vmw_priv))
1078 iowrite32(vmw_priv->vga_pitchlock,
1079 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1080
1081 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1082 return 0;
1083
1084 for (i = 0; i < vmw_priv->num_displays; ++i) {
1085 save = &vmw_priv->vga_save[i];
1086 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1087 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1088 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1089 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1090 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1091 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1092 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1093 }
1094
1095 return 0;
1096}
1097
1098int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1099 struct drm_file *file_priv)
1100{
1101 struct vmw_private *dev_priv = vmw_priv(dev);
1102 struct drm_vmw_update_layout_arg *arg =
1103 (struct drm_vmw_update_layout_arg *)data;
1104 struct vmw_master *vmaster = vmw_master(file_priv->master);
1105 void __user *user_rects;
1106 struct drm_vmw_rect *rects;
1107 unsigned rects_size;
1108 int ret;
1109
1110 ret = ttm_read_lock(&vmaster->lock, true);
1111 if (unlikely(ret != 0))
1112 return ret;
1113
1114 if (!arg->num_outputs) {
1115 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1116 vmw_kms_ldu_update_layout(dev_priv, 1, &def_rect);
1117 goto out_unlock;
1118 }
1119
1120 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
1121 rects = kzalloc(rects_size, GFP_KERNEL);
1122 if (unlikely(!rects)) {
1123 ret = -ENOMEM;
1124 goto out_unlock;
1125 }
1126
1127 user_rects = (void __user *)(unsigned long)arg->rects;
1128 ret = copy_from_user(rects, user_rects, rects_size);
1129 if (unlikely(ret != 0)) {
1130 DRM_ERROR("Failed to get rects.\n");
1131 ret = -EFAULT;
1132 goto out_free;
1133 }
1134
1135 vmw_kms_ldu_update_layout(dev_priv, arg->num_outputs, rects);
1136
1137out_free:
1138 kfree(rects);
1139out_unlock:
1140 ttm_read_unlock(&vmaster->lock);
1141 return ret;
1142}
1143
1144bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1145 uint32_t pitch,
1146 uint32_t height)
1147{
1148 return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1149}
1150
1151u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1152{
1153 return 0;
1154}
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
30
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
34
35struct vmw_clip_rect {
36 int x1, x2, y1, y2;
37};
38
39/**
40 * Clip @num_rects number of @rects against @clip storing the
41 * results in @out_rects and the number of passed rects in @out_num.
42 */
43void vmw_clip_cliprects(struct drm_clip_rect *rects,
44 int num_rects,
45 struct vmw_clip_rect clip,
46 SVGASignedRect *out_rects,
47 int *out_num)
48{
49 int i, k;
50
51 for (i = 0, k = 0; i < num_rects; i++) {
52 int x1 = max_t(int, clip.x1, rects[i].x1);
53 int y1 = max_t(int, clip.y1, rects[i].y1);
54 int x2 = min_t(int, clip.x2, rects[i].x2);
55 int y2 = min_t(int, clip.y2, rects[i].y2);
56
57 if (x1 >= x2)
58 continue;
59 if (y1 >= y2)
60 continue;
61
62 out_rects[k].left = x1;
63 out_rects[k].top = y1;
64 out_rects[k].right = x2;
65 out_rects[k].bottom = y2;
66 k++;
67 }
68
69 *out_num = k;
70}
71
72void vmw_display_unit_cleanup(struct vmw_display_unit *du)
73{
74 if (du->cursor_surface)
75 vmw_surface_unreference(&du->cursor_surface);
76 if (du->cursor_dmabuf)
77 vmw_dmabuf_unreference(&du->cursor_dmabuf);
78 drm_crtc_cleanup(&du->crtc);
79 drm_encoder_cleanup(&du->encoder);
80 drm_connector_cleanup(&du->connector);
81}
82
83/*
84 * Display Unit Cursor functions
85 */
86
87int vmw_cursor_update_image(struct vmw_private *dev_priv,
88 u32 *image, u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct {
92 u32 cmd;
93 SVGAFifoCmdDefineAlphaCursor cursor;
94 } *cmd;
95 u32 image_size = width * height * 4;
96 u32 cmd_size = sizeof(*cmd) + image_size;
97
98 if (!image)
99 return -EINVAL;
100
101 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
102 if (unlikely(cmd == NULL)) {
103 DRM_ERROR("Fifo reserve failed.\n");
104 return -ENOMEM;
105 }
106
107 memset(cmd, 0, sizeof(*cmd));
108
109 memcpy(&cmd[1], image, image_size);
110
111 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
112 cmd->cursor.id = cpu_to_le32(0);
113 cmd->cursor.width = cpu_to_le32(width);
114 cmd->cursor.height = cpu_to_le32(height);
115 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
116 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
117
118 vmw_fifo_commit(dev_priv, cmd_size);
119
120 return 0;
121}
122
123int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
124 struct vmw_dma_buffer *dmabuf,
125 u32 width, u32 height,
126 u32 hotspotX, u32 hotspotY)
127{
128 struct ttm_bo_kmap_obj map;
129 unsigned long kmap_offset;
130 unsigned long kmap_num;
131 void *virtual;
132 bool dummy;
133 int ret;
134
135 kmap_offset = 0;
136 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
137
138 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
139 if (unlikely(ret != 0)) {
140 DRM_ERROR("reserve failed\n");
141 return -EINVAL;
142 }
143
144 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
145 if (unlikely(ret != 0))
146 goto err_unreserve;
147
148 virtual = ttm_kmap_obj_virtual(&map, &dummy);
149 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
150 hotspotX, hotspotY);
151
152 ttm_bo_kunmap(&map);
153err_unreserve:
154 ttm_bo_unreserve(&dmabuf->base);
155
156 return ret;
157}
158
159
160void vmw_cursor_update_position(struct vmw_private *dev_priv,
161 bool show, int x, int y)
162{
163 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
164 uint32_t count;
165
166 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
167 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
168 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
169 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
170 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
171}
172
173int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
174 uint32_t handle, uint32_t width, uint32_t height)
175{
176 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
177 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
178 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
179 struct vmw_surface *surface = NULL;
180 struct vmw_dma_buffer *dmabuf = NULL;
181 int ret;
182
183 /* A lot of the code assumes this */
184 if (handle && (width != 64 || height != 64))
185 return -EINVAL;
186
187 if (handle) {
188 ret = vmw_user_lookup_handle(dev_priv, tfile,
189 handle, &surface, &dmabuf);
190 if (ret) {
191 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
192 return -EINVAL;
193 }
194 }
195
196 /* need to do this before taking down old image */
197 if (surface && !surface->snooper.image) {
198 DRM_ERROR("surface not suitable for cursor\n");
199 vmw_surface_unreference(&surface);
200 return -EINVAL;
201 }
202
203 /* takedown old cursor */
204 if (du->cursor_surface) {
205 du->cursor_surface->snooper.crtc = NULL;
206 vmw_surface_unreference(&du->cursor_surface);
207 }
208 if (du->cursor_dmabuf)
209 vmw_dmabuf_unreference(&du->cursor_dmabuf);
210
211 /* setup new image */
212 if (surface) {
213 /* vmw_user_surface_lookup takes one reference */
214 du->cursor_surface = surface;
215
216 du->cursor_surface->snooper.crtc = crtc;
217 du->cursor_age = du->cursor_surface->snooper.age;
218 vmw_cursor_update_image(dev_priv, surface->snooper.image,
219 64, 64, du->hotspot_x, du->hotspot_y);
220 } else if (dmabuf) {
221 /* vmw_user_surface_lookup takes one reference */
222 du->cursor_dmabuf = dmabuf;
223
224 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
225 du->hotspot_x, du->hotspot_y);
226 } else {
227 vmw_cursor_update_position(dev_priv, false, 0, 0);
228 return 0;
229 }
230
231 vmw_cursor_update_position(dev_priv, true,
232 du->cursor_x + du->hotspot_x,
233 du->cursor_y + du->hotspot_y);
234
235 return 0;
236}
237
238int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
239{
240 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
241 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
242 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
243
244 du->cursor_x = x + crtc->x;
245 du->cursor_y = y + crtc->y;
246
247 vmw_cursor_update_position(dev_priv, shown,
248 du->cursor_x + du->hotspot_x,
249 du->cursor_y + du->hotspot_y);
250
251 return 0;
252}
253
254void vmw_kms_cursor_snoop(struct vmw_surface *srf,
255 struct ttm_object_file *tfile,
256 struct ttm_buffer_object *bo,
257 SVGA3dCmdHeader *header)
258{
259 struct ttm_bo_kmap_obj map;
260 unsigned long kmap_offset;
261 unsigned long kmap_num;
262 SVGA3dCopyBox *box;
263 unsigned box_count;
264 void *virtual;
265 bool dummy;
266 struct vmw_dma_cmd {
267 SVGA3dCmdHeader header;
268 SVGA3dCmdSurfaceDMA dma;
269 } *cmd;
270 int i, ret;
271
272 cmd = container_of(header, struct vmw_dma_cmd, header);
273
274 /* No snooper installed */
275 if (!srf->snooper.image)
276 return;
277
278 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
279 DRM_ERROR("face and mipmap for cursors should never != 0\n");
280 return;
281 }
282
283 if (cmd->header.size < 64) {
284 DRM_ERROR("at least one full copy box must be given\n");
285 return;
286 }
287
288 box = (SVGA3dCopyBox *)&cmd[1];
289 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
290 sizeof(SVGA3dCopyBox);
291
292 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
293 box->x != 0 || box->y != 0 || box->z != 0 ||
294 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
295 box->d != 1 || box_count != 1) {
296 /* TODO handle none page aligned offsets */
297 /* TODO handle more dst & src != 0 */
298 /* TODO handle more then one copy */
299 DRM_ERROR("Cant snoop dma request for cursor!\n");
300 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
301 box->srcx, box->srcy, box->srcz,
302 box->x, box->y, box->z,
303 box->w, box->h, box->d, box_count,
304 cmd->dma.guest.ptr.offset);
305 return;
306 }
307
308 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
309 kmap_num = (64*64*4) >> PAGE_SHIFT;
310
311 ret = ttm_bo_reserve(bo, true, false, false, 0);
312 if (unlikely(ret != 0)) {
313 DRM_ERROR("reserve failed\n");
314 return;
315 }
316
317 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
318 if (unlikely(ret != 0))
319 goto err_unreserve;
320
321 virtual = ttm_kmap_obj_virtual(&map, &dummy);
322
323 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
324 memcpy(srf->snooper.image, virtual, 64*64*4);
325 } else {
326 /* Image is unsigned pointer. */
327 for (i = 0; i < box->h; i++)
328 memcpy(srf->snooper.image + i * 64,
329 virtual + i * cmd->dma.guest.pitch,
330 box->w * 4);
331 }
332
333 srf->snooper.age++;
334
335 /* we can't call this function from this function since execbuf has
336 * reserved fifo space.
337 *
338 * if (srf->snooper.crtc)
339 * vmw_ldu_crtc_cursor_update_image(dev_priv,
340 * srf->snooper.image, 64, 64,
341 * du->hotspot_x, du->hotspot_y);
342 */
343
344 ttm_bo_kunmap(&map);
345err_unreserve:
346 ttm_bo_unreserve(bo);
347}
348
349void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
350{
351 struct drm_device *dev = dev_priv->dev;
352 struct vmw_display_unit *du;
353 struct drm_crtc *crtc;
354
355 mutex_lock(&dev->mode_config.mutex);
356
357 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
358 du = vmw_crtc_to_du(crtc);
359 if (!du->cursor_surface ||
360 du->cursor_age == du->cursor_surface->snooper.age)
361 continue;
362
363 du->cursor_age = du->cursor_surface->snooper.age;
364 vmw_cursor_update_image(dev_priv,
365 du->cursor_surface->snooper.image,
366 64, 64, du->hotspot_x, du->hotspot_y);
367 }
368
369 mutex_unlock(&dev->mode_config.mutex);
370}
371
372/*
373 * Generic framebuffer code
374 */
375
376int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
377 struct drm_file *file_priv,
378 unsigned int *handle)
379{
380 if (handle)
381 *handle = 0;
382
383 return 0;
384}
385
386/*
387 * Surface framebuffer code
388 */
389
390#define vmw_framebuffer_to_vfbs(x) \
391 container_of(x, struct vmw_framebuffer_surface, base.base)
392
393struct vmw_framebuffer_surface {
394 struct vmw_framebuffer base;
395 struct vmw_surface *surface;
396 struct vmw_dma_buffer *buffer;
397 struct list_head head;
398 struct drm_master *master;
399};
400
401void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
402{
403 struct vmw_framebuffer_surface *vfbs =
404 vmw_framebuffer_to_vfbs(framebuffer);
405 struct vmw_master *vmaster = vmw_master(vfbs->master);
406
407
408 mutex_lock(&vmaster->fb_surf_mutex);
409 list_del(&vfbs->head);
410 mutex_unlock(&vmaster->fb_surf_mutex);
411
412 drm_master_put(&vfbs->master);
413 drm_framebuffer_cleanup(framebuffer);
414 vmw_surface_unreference(&vfbs->surface);
415 ttm_base_object_unref(&vfbs->base.user_obj);
416
417 kfree(vfbs);
418}
419
420static int do_surface_dirty_sou(struct vmw_private *dev_priv,
421 struct drm_file *file_priv,
422 struct vmw_framebuffer *framebuffer,
423 unsigned flags, unsigned color,
424 struct drm_clip_rect *clips,
425 unsigned num_clips, int inc,
426 struct vmw_fence_obj **out_fence)
427{
428 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
429 struct drm_clip_rect *clips_ptr;
430 struct drm_clip_rect *tmp;
431 struct drm_crtc *crtc;
432 size_t fifo_size;
433 int i, num_units;
434 int ret = 0; /* silence warning */
435 int left, right, top, bottom;
436
437 struct {
438 SVGA3dCmdHeader header;
439 SVGA3dCmdBlitSurfaceToScreen body;
440 } *cmd;
441 SVGASignedRect *blits;
442
443 num_units = 0;
444 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
445 head) {
446 if (crtc->fb != &framebuffer->base)
447 continue;
448 units[num_units++] = vmw_crtc_to_du(crtc);
449 }
450
451 BUG_ON(!clips || !num_clips);
452
453 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
454 if (unlikely(tmp == NULL)) {
455 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
456 return -ENOMEM;
457 }
458
459 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
460 cmd = kzalloc(fifo_size, GFP_KERNEL);
461 if (unlikely(cmd == NULL)) {
462 DRM_ERROR("Temporary fifo memory alloc failed.\n");
463 ret = -ENOMEM;
464 goto out_free_tmp;
465 }
466
467 /* setup blits pointer */
468 blits = (SVGASignedRect *)&cmd[1];
469
470 /* initial clip region */
471 left = clips->x1;
472 right = clips->x2;
473 top = clips->y1;
474 bottom = clips->y2;
475
476 /* skip the first clip rect */
477 for (i = 1, clips_ptr = clips + inc;
478 i < num_clips; i++, clips_ptr += inc) {
479 left = min_t(int, left, (int)clips_ptr->x1);
480 right = max_t(int, right, (int)clips_ptr->x2);
481 top = min_t(int, top, (int)clips_ptr->y1);
482 bottom = max_t(int, bottom, (int)clips_ptr->y2);
483 }
484
485 /* only need to do this once */
486 memset(cmd, 0, fifo_size);
487 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
488 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
489
490 cmd->body.srcRect.left = left;
491 cmd->body.srcRect.right = right;
492 cmd->body.srcRect.top = top;
493 cmd->body.srcRect.bottom = bottom;
494
495 clips_ptr = clips;
496 for (i = 0; i < num_clips; i++, clips_ptr += inc) {
497 tmp[i].x1 = clips_ptr->x1 - left;
498 tmp[i].x2 = clips_ptr->x2 - left;
499 tmp[i].y1 = clips_ptr->y1 - top;
500 tmp[i].y2 = clips_ptr->y2 - top;
501 }
502
503 /* do per unit writing, reuse fifo for each */
504 for (i = 0; i < num_units; i++) {
505 struct vmw_display_unit *unit = units[i];
506 struct vmw_clip_rect clip;
507 int num;
508
509 clip.x1 = left - unit->crtc.x;
510 clip.y1 = top - unit->crtc.y;
511 clip.x2 = right - unit->crtc.x;
512 clip.y2 = bottom - unit->crtc.y;
513
514 /* skip any crtcs that misses the clip region */
515 if (clip.x1 >= unit->crtc.mode.hdisplay ||
516 clip.y1 >= unit->crtc.mode.vdisplay ||
517 clip.x2 <= 0 || clip.y2 <= 0)
518 continue;
519
520 /*
521 * In order for the clip rects to be correctly scaled
522 * the src and dest rects needs to be the same size.
523 */
524 cmd->body.destRect.left = clip.x1;
525 cmd->body.destRect.right = clip.x2;
526 cmd->body.destRect.top = clip.y1;
527 cmd->body.destRect.bottom = clip.y2;
528
529 /* create a clip rect of the crtc in dest coords */
530 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
531 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
532 clip.x1 = 0 - clip.x1;
533 clip.y1 = 0 - clip.y1;
534
535 /* need to reset sid as it is changed by execbuf */
536 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
537 cmd->body.destScreenId = unit->unit;
538
539 /* clip and write blits to cmd stream */
540 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
541
542 /* if no cliprects hit skip this */
543 if (num == 0)
544 continue;
545
546 /* only return the last fence */
547 if (out_fence && *out_fence)
548 vmw_fence_obj_unreference(out_fence);
549
550 /* recalculate package length */
551 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
552 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
553 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
554 fifo_size, 0, NULL, out_fence);
555
556 if (unlikely(ret != 0))
557 break;
558 }
559
560
561 kfree(cmd);
562out_free_tmp:
563 kfree(tmp);
564
565 return ret;
566}
567
568int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
569 struct drm_file *file_priv,
570 unsigned flags, unsigned color,
571 struct drm_clip_rect *clips,
572 unsigned num_clips)
573{
574 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
575 struct vmw_master *vmaster = vmw_master(file_priv->master);
576 struct vmw_framebuffer_surface *vfbs =
577 vmw_framebuffer_to_vfbs(framebuffer);
578 struct drm_clip_rect norect;
579 int ret, inc = 1;
580
581 if (unlikely(vfbs->master != file_priv->master))
582 return -EINVAL;
583
584 /* Require ScreenObject support for 3D */
585 if (!dev_priv->sou_priv)
586 return -EINVAL;
587
588 ret = ttm_read_lock(&vmaster->lock, true);
589 if (unlikely(ret != 0))
590 return ret;
591
592 if (!num_clips) {
593 num_clips = 1;
594 clips = &norect;
595 norect.x1 = norect.y1 = 0;
596 norect.x2 = framebuffer->width;
597 norect.y2 = framebuffer->height;
598 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
599 num_clips /= 2;
600 inc = 2; /* skip source rects */
601 }
602
603 ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
604 flags, color,
605 clips, num_clips, inc, NULL);
606
607 ttm_read_unlock(&vmaster->lock);
608 return 0;
609}
610
611static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
612 .destroy = vmw_framebuffer_surface_destroy,
613 .dirty = vmw_framebuffer_surface_dirty,
614 .create_handle = vmw_framebuffer_create_handle,
615};
616
617static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
618 struct drm_file *file_priv,
619 struct vmw_surface *surface,
620 struct vmw_framebuffer **out,
621 const struct drm_mode_fb_cmd
622 *mode_cmd)
623
624{
625 struct drm_device *dev = dev_priv->dev;
626 struct vmw_framebuffer_surface *vfbs;
627 enum SVGA3dSurfaceFormat format;
628 struct vmw_master *vmaster = vmw_master(file_priv->master);
629 int ret;
630
631 /* 3D is only supported on HWv8 hosts which supports screen objects */
632 if (!dev_priv->sou_priv)
633 return -ENOSYS;
634
635 /*
636 * Sanity checks.
637 */
638
639 /* Surface must be marked as a scanout. */
640 if (unlikely(!surface->scanout))
641 return -EINVAL;
642
643 if (unlikely(surface->mip_levels[0] != 1 ||
644 surface->num_sizes != 1 ||
645 surface->sizes[0].width < mode_cmd->width ||
646 surface->sizes[0].height < mode_cmd->height ||
647 surface->sizes[0].depth != 1)) {
648 DRM_ERROR("Incompatible surface dimensions "
649 "for requested mode.\n");
650 return -EINVAL;
651 }
652
653 switch (mode_cmd->depth) {
654 case 32:
655 format = SVGA3D_A8R8G8B8;
656 break;
657 case 24:
658 format = SVGA3D_X8R8G8B8;
659 break;
660 case 16:
661 format = SVGA3D_R5G6B5;
662 break;
663 case 15:
664 format = SVGA3D_A1R5G5B5;
665 break;
666 case 8:
667 format = SVGA3D_LUMINANCE8;
668 break;
669 default:
670 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
671 return -EINVAL;
672 }
673
674 if (unlikely(format != surface->format)) {
675 DRM_ERROR("Invalid surface format for requested mode.\n");
676 return -EINVAL;
677 }
678
679 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
680 if (!vfbs) {
681 ret = -ENOMEM;
682 goto out_err1;
683 }
684
685 ret = drm_framebuffer_init(dev, &vfbs->base.base,
686 &vmw_framebuffer_surface_funcs);
687 if (ret)
688 goto out_err2;
689
690 if (!vmw_surface_reference(surface)) {
691 DRM_ERROR("failed to reference surface %p\n", surface);
692 goto out_err3;
693 }
694
695 /* XXX get the first 3 from the surface info */
696 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
697 vfbs->base.base.pitches[0] = mode_cmd->pitch;
698 vfbs->base.base.depth = mode_cmd->depth;
699 vfbs->base.base.width = mode_cmd->width;
700 vfbs->base.base.height = mode_cmd->height;
701 vfbs->surface = surface;
702 vfbs->base.user_handle = mode_cmd->handle;
703 vfbs->master = drm_master_get(file_priv->master);
704
705 mutex_lock(&vmaster->fb_surf_mutex);
706 list_add_tail(&vfbs->head, &vmaster->fb_surf);
707 mutex_unlock(&vmaster->fb_surf_mutex);
708
709 *out = &vfbs->base;
710
711 return 0;
712
713out_err3:
714 drm_framebuffer_cleanup(&vfbs->base.base);
715out_err2:
716 kfree(vfbs);
717out_err1:
718 return ret;
719}
720
721/*
722 * Dmabuf framebuffer code
723 */
724
725#define vmw_framebuffer_to_vfbd(x) \
726 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
727
728struct vmw_framebuffer_dmabuf {
729 struct vmw_framebuffer base;
730 struct vmw_dma_buffer *buffer;
731};
732
733void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
734{
735 struct vmw_framebuffer_dmabuf *vfbd =
736 vmw_framebuffer_to_vfbd(framebuffer);
737
738 drm_framebuffer_cleanup(framebuffer);
739 vmw_dmabuf_unreference(&vfbd->buffer);
740 ttm_base_object_unref(&vfbd->base.user_obj);
741
742 kfree(vfbd);
743}
744
745static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
746 struct vmw_framebuffer *framebuffer,
747 unsigned flags, unsigned color,
748 struct drm_clip_rect *clips,
749 unsigned num_clips, int increment)
750{
751 size_t fifo_size;
752 int i;
753
754 struct {
755 uint32_t header;
756 SVGAFifoCmdUpdate body;
757 } *cmd;
758
759 fifo_size = sizeof(*cmd) * num_clips;
760 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
761 if (unlikely(cmd == NULL)) {
762 DRM_ERROR("Fifo reserve failed.\n");
763 return -ENOMEM;
764 }
765
766 memset(cmd, 0, fifo_size);
767 for (i = 0; i < num_clips; i++, clips += increment) {
768 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
769 cmd[i].body.x = cpu_to_le32(clips->x1);
770 cmd[i].body.y = cpu_to_le32(clips->y1);
771 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
772 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
773 }
774
775 vmw_fifo_commit(dev_priv, fifo_size);
776 return 0;
777}
778
779static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
780 struct vmw_private *dev_priv,
781 struct vmw_framebuffer *framebuffer)
782{
783 int depth = framebuffer->base.depth;
784 size_t fifo_size;
785 int ret;
786
787 struct {
788 uint32_t header;
789 SVGAFifoCmdDefineGMRFB body;
790 } *cmd;
791
792 /* Emulate RGBA support, contrary to svga_reg.h this is not
793 * supported by hosts. This is only a problem if we are reading
794 * this value later and expecting what we uploaded back.
795 */
796 if (depth == 32)
797 depth = 24;
798
799 fifo_size = sizeof(*cmd);
800 cmd = kmalloc(fifo_size, GFP_KERNEL);
801 if (unlikely(cmd == NULL)) {
802 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
803 return -ENOMEM;
804 }
805
806 memset(cmd, 0, fifo_size);
807 cmd->header = SVGA_CMD_DEFINE_GMRFB;
808 cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
809 cmd->body.format.colorDepth = depth;
810 cmd->body.format.reserved = 0;
811 cmd->body.bytesPerLine = framebuffer->base.pitches[0];
812 cmd->body.ptr.gmrId = framebuffer->user_handle;
813 cmd->body.ptr.offset = 0;
814
815 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
816 fifo_size, 0, NULL, NULL);
817
818 kfree(cmd);
819
820 return ret;
821}
822
823static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
824 struct vmw_private *dev_priv,
825 struct vmw_framebuffer *framebuffer,
826 unsigned flags, unsigned color,
827 struct drm_clip_rect *clips,
828 unsigned num_clips, int increment,
829 struct vmw_fence_obj **out_fence)
830{
831 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
832 struct drm_clip_rect *clips_ptr;
833 int i, k, num_units, ret;
834 struct drm_crtc *crtc;
835 size_t fifo_size;
836
837 struct {
838 uint32_t header;
839 SVGAFifoCmdBlitGMRFBToScreen body;
840 } *blits;
841
842 ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
843 if (unlikely(ret != 0))
844 return ret; /* define_gmrfb prints warnings */
845
846 fifo_size = sizeof(*blits) * num_clips;
847 blits = kmalloc(fifo_size, GFP_KERNEL);
848 if (unlikely(blits == NULL)) {
849 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
850 return -ENOMEM;
851 }
852
853 num_units = 0;
854 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
855 if (crtc->fb != &framebuffer->base)
856 continue;
857 units[num_units++] = vmw_crtc_to_du(crtc);
858 }
859
860 for (k = 0; k < num_units; k++) {
861 struct vmw_display_unit *unit = units[k];
862 int hit_num = 0;
863
864 clips_ptr = clips;
865 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
866 int clip_x1 = clips_ptr->x1 - unit->crtc.x;
867 int clip_y1 = clips_ptr->y1 - unit->crtc.y;
868 int clip_x2 = clips_ptr->x2 - unit->crtc.x;
869 int clip_y2 = clips_ptr->y2 - unit->crtc.y;
870 int move_x, move_y;
871
872 /* skip any crtcs that misses the clip region */
873 if (clip_x1 >= unit->crtc.mode.hdisplay ||
874 clip_y1 >= unit->crtc.mode.vdisplay ||
875 clip_x2 <= 0 || clip_y2 <= 0)
876 continue;
877
878 /* clip size to crtc size */
879 clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
880 clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
881
882 /* translate both src and dest to bring clip into screen */
883 move_x = min_t(int, clip_x1, 0);
884 move_y = min_t(int, clip_y1, 0);
885
886 /* actual translate done here */
887 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
888 blits[hit_num].body.destScreenId = unit->unit;
889 blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
890 blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
891 blits[hit_num].body.destRect.left = clip_x1 - move_x;
892 blits[hit_num].body.destRect.top = clip_y1 - move_y;
893 blits[hit_num].body.destRect.right = clip_x2;
894 blits[hit_num].body.destRect.bottom = clip_y2;
895 hit_num++;
896 }
897
898 /* no clips hit the crtc */
899 if (hit_num == 0)
900 continue;
901
902 /* only return the last fence */
903 if (out_fence && *out_fence)
904 vmw_fence_obj_unreference(out_fence);
905
906 fifo_size = sizeof(*blits) * hit_num;
907 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
908 fifo_size, 0, NULL, out_fence);
909
910 if (unlikely(ret != 0))
911 break;
912 }
913
914 kfree(blits);
915
916 return ret;
917}
918
919int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
920 struct drm_file *file_priv,
921 unsigned flags, unsigned color,
922 struct drm_clip_rect *clips,
923 unsigned num_clips)
924{
925 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
926 struct vmw_master *vmaster = vmw_master(file_priv->master);
927 struct vmw_framebuffer_dmabuf *vfbd =
928 vmw_framebuffer_to_vfbd(framebuffer);
929 struct drm_clip_rect norect;
930 int ret, increment = 1;
931
932 ret = ttm_read_lock(&vmaster->lock, true);
933 if (unlikely(ret != 0))
934 return ret;
935
936 if (!num_clips) {
937 num_clips = 1;
938 clips = &norect;
939 norect.x1 = norect.y1 = 0;
940 norect.x2 = framebuffer->width;
941 norect.y2 = framebuffer->height;
942 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
943 num_clips /= 2;
944 increment = 2;
945 }
946
947 if (dev_priv->ldu_priv) {
948 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
949 flags, color,
950 clips, num_clips, increment);
951 } else {
952 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
953 flags, color,
954 clips, num_clips, increment, NULL);
955 }
956
957 ttm_read_unlock(&vmaster->lock);
958 return ret;
959}
960
961static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
962 .destroy = vmw_framebuffer_dmabuf_destroy,
963 .dirty = vmw_framebuffer_dmabuf_dirty,
964 .create_handle = vmw_framebuffer_create_handle,
965};
966
967/**
968 * Pin the dmabuffer to the start of vram.
969 */
970static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
971{
972 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
973 struct vmw_framebuffer_dmabuf *vfbd =
974 vmw_framebuffer_to_vfbd(&vfb->base);
975 int ret;
976
977 /* This code should not be used with screen objects */
978 BUG_ON(dev_priv->sou_priv);
979
980 vmw_overlay_pause_all(dev_priv);
981
982 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
983
984 vmw_overlay_resume_all(dev_priv);
985
986 WARN_ON(ret != 0);
987
988 return 0;
989}
990
991static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
992{
993 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
994 struct vmw_framebuffer_dmabuf *vfbd =
995 vmw_framebuffer_to_vfbd(&vfb->base);
996
997 if (!vfbd->buffer) {
998 WARN_ON(!vfbd->buffer);
999 return 0;
1000 }
1001
1002 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
1003}
1004
1005static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
1006 struct vmw_dma_buffer *dmabuf,
1007 struct vmw_framebuffer **out,
1008 const struct drm_mode_fb_cmd
1009 *mode_cmd)
1010
1011{
1012 struct drm_device *dev = dev_priv->dev;
1013 struct vmw_framebuffer_dmabuf *vfbd;
1014 unsigned int requested_size;
1015 int ret;
1016
1017 requested_size = mode_cmd->height * mode_cmd->pitch;
1018 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
1019 DRM_ERROR("Screen buffer object size is too small "
1020 "for requested mode.\n");
1021 return -EINVAL;
1022 }
1023
1024 /* Limited framebuffer color depth support for screen objects */
1025 if (dev_priv->sou_priv) {
1026 switch (mode_cmd->depth) {
1027 case 32:
1028 case 24:
1029 /* Only support 32 bpp for 32 and 24 depth fbs */
1030 if (mode_cmd->bpp == 32)
1031 break;
1032
1033 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1034 mode_cmd->depth, mode_cmd->bpp);
1035 return -EINVAL;
1036 case 16:
1037 case 15:
1038 /* Only support 16 bpp for 16 and 15 depth fbs */
1039 if (mode_cmd->bpp == 16)
1040 break;
1041
1042 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1043 mode_cmd->depth, mode_cmd->bpp);
1044 return -EINVAL;
1045 default:
1046 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
1047 return -EINVAL;
1048 }
1049 }
1050
1051 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
1052 if (!vfbd) {
1053 ret = -ENOMEM;
1054 goto out_err1;
1055 }
1056
1057 ret = drm_framebuffer_init(dev, &vfbd->base.base,
1058 &vmw_framebuffer_dmabuf_funcs);
1059 if (ret)
1060 goto out_err2;
1061
1062 if (!vmw_dmabuf_reference(dmabuf)) {
1063 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
1064 goto out_err3;
1065 }
1066
1067 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
1068 vfbd->base.base.pitches[0] = mode_cmd->pitch;
1069 vfbd->base.base.depth = mode_cmd->depth;
1070 vfbd->base.base.width = mode_cmd->width;
1071 vfbd->base.base.height = mode_cmd->height;
1072 if (!dev_priv->sou_priv) {
1073 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
1074 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
1075 }
1076 vfbd->base.dmabuf = true;
1077 vfbd->buffer = dmabuf;
1078 vfbd->base.user_handle = mode_cmd->handle;
1079 *out = &vfbd->base;
1080
1081 return 0;
1082
1083out_err3:
1084 drm_framebuffer_cleanup(&vfbd->base.base);
1085out_err2:
1086 kfree(vfbd);
1087out_err1:
1088 return ret;
1089}
1090
1091/*
1092 * Generic Kernel modesetting functions
1093 */
1094
1095static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1096 struct drm_file *file_priv,
1097 struct drm_mode_fb_cmd2 *mode_cmd2)
1098{
1099 struct vmw_private *dev_priv = vmw_priv(dev);
1100 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1101 struct vmw_framebuffer *vfb = NULL;
1102 struct vmw_surface *surface = NULL;
1103 struct vmw_dma_buffer *bo = NULL;
1104 struct ttm_base_object *user_obj;
1105 struct drm_mode_fb_cmd mode_cmd;
1106 int ret;
1107
1108 mode_cmd.width = mode_cmd2->width;
1109 mode_cmd.height = mode_cmd2->height;
1110 mode_cmd.pitch = mode_cmd2->pitches[0];
1111 mode_cmd.handle = mode_cmd2->handles[0];
1112 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
1113 &mode_cmd.bpp);
1114
1115 /**
1116 * This code should be conditioned on Screen Objects not being used.
1117 * If screen objects are used, we can allocate a GMR to hold the
1118 * requested framebuffer.
1119 */
1120
1121 if (!vmw_kms_validate_mode_vram(dev_priv,
1122 mode_cmd.pitch,
1123 mode_cmd.height)) {
1124 DRM_ERROR("VRAM size is too small for requested mode.\n");
1125 return ERR_PTR(-ENOMEM);
1126 }
1127
1128 /*
1129 * Take a reference on the user object of the resource
1130 * backing the kms fb. This ensures that user-space handle
1131 * lookups on that resource will always work as long as
1132 * it's registered with a kms framebuffer. This is important,
1133 * since vmw_execbuf_process identifies resources in the
1134 * command stream using user-space handles.
1135 */
1136
1137 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
1138 if (unlikely(user_obj == NULL)) {
1139 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1140 return ERR_PTR(-ENOENT);
1141 }
1142
1143 /**
1144 * End conditioned code.
1145 */
1146
1147 /* returns either a dmabuf or surface */
1148 ret = vmw_user_lookup_handle(dev_priv, tfile,
1149 mode_cmd.handle,
1150 &surface, &bo);
1151 if (ret)
1152 goto err_out;
1153
1154 /* Create the new framebuffer depending one what we got back */
1155 if (bo)
1156 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1157 &mode_cmd);
1158 else if (surface)
1159 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
1160 surface, &vfb, &mode_cmd);
1161 else
1162 BUG();
1163
1164err_out:
1165 /* vmw_user_lookup_handle takes one ref so does new_fb */
1166 if (bo)
1167 vmw_dmabuf_unreference(&bo);
1168 if (surface)
1169 vmw_surface_unreference(&surface);
1170
1171 if (ret) {
1172 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1173 ttm_base_object_unref(&user_obj);
1174 return ERR_PTR(ret);
1175 } else
1176 vfb->user_obj = user_obj;
1177
1178 return &vfb->base;
1179}
1180
1181static const struct drm_mode_config_funcs vmw_kms_funcs = {
1182 .fb_create = vmw_kms_fb_create,
1183};
1184
1185int vmw_kms_present(struct vmw_private *dev_priv,
1186 struct drm_file *file_priv,
1187 struct vmw_framebuffer *vfb,
1188 struct vmw_surface *surface,
1189 uint32_t sid,
1190 int32_t destX, int32_t destY,
1191 struct drm_vmw_rect *clips,
1192 uint32_t num_clips)
1193{
1194 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1195 struct drm_clip_rect *tmp;
1196 struct drm_crtc *crtc;
1197 size_t fifo_size;
1198 int i, k, num_units;
1199 int ret = 0; /* silence warning */
1200 int left, right, top, bottom;
1201
1202 struct {
1203 SVGA3dCmdHeader header;
1204 SVGA3dCmdBlitSurfaceToScreen body;
1205 } *cmd;
1206 SVGASignedRect *blits;
1207
1208 num_units = 0;
1209 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1210 if (crtc->fb != &vfb->base)
1211 continue;
1212 units[num_units++] = vmw_crtc_to_du(crtc);
1213 }
1214
1215 BUG_ON(surface == NULL);
1216 BUG_ON(!clips || !num_clips);
1217
1218 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
1219 if (unlikely(tmp == NULL)) {
1220 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
1221 return -ENOMEM;
1222 }
1223
1224 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1225 cmd = kmalloc(fifo_size, GFP_KERNEL);
1226 if (unlikely(cmd == NULL)) {
1227 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1228 ret = -ENOMEM;
1229 goto out_free_tmp;
1230 }
1231
1232 left = clips->x;
1233 right = clips->x + clips->w;
1234 top = clips->y;
1235 bottom = clips->y + clips->h;
1236
1237 for (i = 1; i < num_clips; i++) {
1238 left = min_t(int, left, (int)clips[i].x);
1239 right = max_t(int, right, (int)clips[i].x + clips[i].w);
1240 top = min_t(int, top, (int)clips[i].y);
1241 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
1242 }
1243
1244 /* only need to do this once */
1245 memset(cmd, 0, fifo_size);
1246 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1247
1248 blits = (SVGASignedRect *)&cmd[1];
1249
1250 cmd->body.srcRect.left = left;
1251 cmd->body.srcRect.right = right;
1252 cmd->body.srcRect.top = top;
1253 cmd->body.srcRect.bottom = bottom;
1254
1255 for (i = 0; i < num_clips; i++) {
1256 tmp[i].x1 = clips[i].x - left;
1257 tmp[i].x2 = clips[i].x + clips[i].w - left;
1258 tmp[i].y1 = clips[i].y - top;
1259 tmp[i].y2 = clips[i].y + clips[i].h - top;
1260 }
1261
1262 for (k = 0; k < num_units; k++) {
1263 struct vmw_display_unit *unit = units[k];
1264 struct vmw_clip_rect clip;
1265 int num;
1266
1267 clip.x1 = left + destX - unit->crtc.x;
1268 clip.y1 = top + destY - unit->crtc.y;
1269 clip.x2 = right + destX - unit->crtc.x;
1270 clip.y2 = bottom + destY - unit->crtc.y;
1271
1272 /* skip any crtcs that misses the clip region */
1273 if (clip.x1 >= unit->crtc.mode.hdisplay ||
1274 clip.y1 >= unit->crtc.mode.vdisplay ||
1275 clip.x2 <= 0 || clip.y2 <= 0)
1276 continue;
1277
1278 /*
1279 * In order for the clip rects to be correctly scaled
1280 * the src and dest rects needs to be the same size.
1281 */
1282 cmd->body.destRect.left = clip.x1;
1283 cmd->body.destRect.right = clip.x2;
1284 cmd->body.destRect.top = clip.y1;
1285 cmd->body.destRect.bottom = clip.y2;
1286
1287 /* create a clip rect of the crtc in dest coords */
1288 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
1289 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
1290 clip.x1 = 0 - clip.x1;
1291 clip.y1 = 0 - clip.y1;
1292
1293 /* need to reset sid as it is changed by execbuf */
1294 cmd->body.srcImage.sid = sid;
1295 cmd->body.destScreenId = unit->unit;
1296
1297 /* clip and write blits to cmd stream */
1298 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
1299
1300 /* if no cliprects hit skip this */
1301 if (num == 0)
1302 continue;
1303
1304 /* recalculate package length */
1305 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1306 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1307 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1308 fifo_size, 0, NULL, NULL);
1309
1310 if (unlikely(ret != 0))
1311 break;
1312 }
1313
1314 kfree(cmd);
1315out_free_tmp:
1316 kfree(tmp);
1317
1318 return ret;
1319}
1320
1321int vmw_kms_readback(struct vmw_private *dev_priv,
1322 struct drm_file *file_priv,
1323 struct vmw_framebuffer *vfb,
1324 struct drm_vmw_fence_rep __user *user_fence_rep,
1325 struct drm_vmw_rect *clips,
1326 uint32_t num_clips)
1327{
1328 struct vmw_framebuffer_dmabuf *vfbd =
1329 vmw_framebuffer_to_vfbd(&vfb->base);
1330 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1331 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1332 struct drm_crtc *crtc;
1333 size_t fifo_size;
1334 int i, k, ret, num_units, blits_pos;
1335
1336 struct {
1337 uint32_t header;
1338 SVGAFifoCmdDefineGMRFB body;
1339 } *cmd;
1340 struct {
1341 uint32_t header;
1342 SVGAFifoCmdBlitScreenToGMRFB body;
1343 } *blits;
1344
1345 num_units = 0;
1346 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1347 if (crtc->fb != &vfb->base)
1348 continue;
1349 units[num_units++] = vmw_crtc_to_du(crtc);
1350 }
1351
1352 BUG_ON(dmabuf == NULL);
1353 BUG_ON(!clips || !num_clips);
1354
1355 /* take a safe guess at fifo size */
1356 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1357 cmd = kmalloc(fifo_size, GFP_KERNEL);
1358 if (unlikely(cmd == NULL)) {
1359 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1360 return -ENOMEM;
1361 }
1362
1363 memset(cmd, 0, fifo_size);
1364 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1365 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1366 cmd->body.format.colorDepth = vfb->base.depth;
1367 cmd->body.format.reserved = 0;
1368 cmd->body.bytesPerLine = vfb->base.pitches[0];
1369 cmd->body.ptr.gmrId = vfb->user_handle;
1370 cmd->body.ptr.offset = 0;
1371
1372 blits = (void *)&cmd[1];
1373 blits_pos = 0;
1374 for (i = 0; i < num_units; i++) {
1375 struct drm_vmw_rect *c = clips;
1376 for (k = 0; k < num_clips; k++, c++) {
1377 /* transform clip coords to crtc origin based coords */
1378 int clip_x1 = c->x - units[i]->crtc.x;
1379 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1380 int clip_y1 = c->y - units[i]->crtc.y;
1381 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1382 int dest_x = c->x;
1383 int dest_y = c->y;
1384
1385 /* compensate for clipping, we negate
1386 * a negative number and add that.
1387 */
1388 if (clip_x1 < 0)
1389 dest_x += -clip_x1;
1390 if (clip_y1 < 0)
1391 dest_y += -clip_y1;
1392
1393 /* clip */
1394 clip_x1 = max(clip_x1, 0);
1395 clip_y1 = max(clip_y1, 0);
1396 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1397 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1398
1399 /* and cull any rects that misses the crtc */
1400 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1401 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1402 clip_x2 <= 0 || clip_y2 <= 0)
1403 continue;
1404
1405 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1406 blits[blits_pos].body.srcScreenId = units[i]->unit;
1407 blits[blits_pos].body.destOrigin.x = dest_x;
1408 blits[blits_pos].body.destOrigin.y = dest_y;
1409
1410 blits[blits_pos].body.srcRect.left = clip_x1;
1411 blits[blits_pos].body.srcRect.top = clip_y1;
1412 blits[blits_pos].body.srcRect.right = clip_x2;
1413 blits[blits_pos].body.srcRect.bottom = clip_y2;
1414 blits_pos++;
1415 }
1416 }
1417 /* reset size here and use calculated exact size from loops */
1418 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1419
1420 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1421 0, user_fence_rep, NULL);
1422
1423 kfree(cmd);
1424
1425 return ret;
1426}
1427
1428int vmw_kms_init(struct vmw_private *dev_priv)
1429{
1430 struct drm_device *dev = dev_priv->dev;
1431 int ret;
1432
1433 drm_mode_config_init(dev);
1434 dev->mode_config.funcs = &vmw_kms_funcs;
1435 dev->mode_config.min_width = 1;
1436 dev->mode_config.min_height = 1;
1437 /* assumed largest fb size */
1438 dev->mode_config.max_width = 8192;
1439 dev->mode_config.max_height = 8192;
1440
1441 ret = vmw_kms_init_screen_object_display(dev_priv);
1442 if (ret) /* Fallback */
1443 (void)vmw_kms_init_legacy_display_system(dev_priv);
1444
1445 return 0;
1446}
1447
1448int vmw_kms_close(struct vmw_private *dev_priv)
1449{
1450 /*
1451 * Docs says we should take the lock before calling this function
1452 * but since it destroys encoders and our destructor calls
1453 * drm_encoder_cleanup which takes the lock we deadlock.
1454 */
1455 drm_mode_config_cleanup(dev_priv->dev);
1456 if (dev_priv->sou_priv)
1457 vmw_kms_close_screen_object_display(dev_priv);
1458 else
1459 vmw_kms_close_legacy_display_system(dev_priv);
1460 return 0;
1461}
1462
1463int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1464 struct drm_file *file_priv)
1465{
1466 struct drm_vmw_cursor_bypass_arg *arg = data;
1467 struct vmw_display_unit *du;
1468 struct drm_mode_object *obj;
1469 struct drm_crtc *crtc;
1470 int ret = 0;
1471
1472
1473 mutex_lock(&dev->mode_config.mutex);
1474 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1475
1476 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1477 du = vmw_crtc_to_du(crtc);
1478 du->hotspot_x = arg->xhot;
1479 du->hotspot_y = arg->yhot;
1480 }
1481
1482 mutex_unlock(&dev->mode_config.mutex);
1483 return 0;
1484 }
1485
1486 obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1487 if (!obj) {
1488 ret = -EINVAL;
1489 goto out;
1490 }
1491
1492 crtc = obj_to_crtc(obj);
1493 du = vmw_crtc_to_du(crtc);
1494
1495 du->hotspot_x = arg->xhot;
1496 du->hotspot_y = arg->yhot;
1497
1498out:
1499 mutex_unlock(&dev->mode_config.mutex);
1500
1501 return ret;
1502}
1503
1504int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1505 unsigned width, unsigned height, unsigned pitch,
1506 unsigned bpp, unsigned depth)
1507{
1508 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1509 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1510 else if (vmw_fifo_have_pitchlock(vmw_priv))
1511 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1512 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1513 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1514 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1515
1516 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1517 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1518 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1519 return -EINVAL;
1520 }
1521
1522 return 0;
1523}
1524
1525int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1526{
1527 struct vmw_vga_topology_state *save;
1528 uint32_t i;
1529
1530 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1531 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1532 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1533 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1534 vmw_priv->vga_pitchlock =
1535 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1536 else if (vmw_fifo_have_pitchlock(vmw_priv))
1537 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1538 SVGA_FIFO_PITCHLOCK);
1539
1540 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1541 return 0;
1542
1543 vmw_priv->num_displays = vmw_read(vmw_priv,
1544 SVGA_REG_NUM_GUEST_DISPLAYS);
1545
1546 if (vmw_priv->num_displays == 0)
1547 vmw_priv->num_displays = 1;
1548
1549 for (i = 0; i < vmw_priv->num_displays; ++i) {
1550 save = &vmw_priv->vga_save[i];
1551 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1552 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1553 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1554 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1555 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1556 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1557 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1558 if (i == 0 && vmw_priv->num_displays == 1 &&
1559 save->width == 0 && save->height == 0) {
1560
1561 /*
1562 * It should be fairly safe to assume that these
1563 * values are uninitialized.
1564 */
1565
1566 save->width = vmw_priv->vga_width - save->pos_x;
1567 save->height = vmw_priv->vga_height - save->pos_y;
1568 }
1569 }
1570
1571 return 0;
1572}
1573
1574int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1575{
1576 struct vmw_vga_topology_state *save;
1577 uint32_t i;
1578
1579 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1580 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1581 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1582 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1583 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1584 vmw_priv->vga_pitchlock);
1585 else if (vmw_fifo_have_pitchlock(vmw_priv))
1586 iowrite32(vmw_priv->vga_pitchlock,
1587 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1588
1589 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1590 return 0;
1591
1592 for (i = 0; i < vmw_priv->num_displays; ++i) {
1593 save = &vmw_priv->vga_save[i];
1594 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1595 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1596 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1597 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1598 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1599 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1600 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1601 }
1602
1603 return 0;
1604}
1605
1606bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1607 uint32_t pitch,
1608 uint32_t height)
1609{
1610 return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1611}
1612
1613
1614/**
1615 * Function called by DRM code called with vbl_lock held.
1616 */
1617u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1618{
1619 return 0;
1620}
1621
1622/**
1623 * Function called by DRM code called with vbl_lock held.
1624 */
1625int vmw_enable_vblank(struct drm_device *dev, int crtc)
1626{
1627 return -ENOSYS;
1628}
1629
1630/**
1631 * Function called by DRM code called with vbl_lock held.
1632 */
1633void vmw_disable_vblank(struct drm_device *dev, int crtc)
1634{
1635}
1636
1637
1638/*
1639 * Small shared kms functions.
1640 */
1641
1642int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1643 struct drm_vmw_rect *rects)
1644{
1645 struct drm_device *dev = dev_priv->dev;
1646 struct vmw_display_unit *du;
1647 struct drm_connector *con;
1648
1649 mutex_lock(&dev->mode_config.mutex);
1650
1651#if 0
1652 {
1653 unsigned int i;
1654
1655 DRM_INFO("%s: new layout ", __func__);
1656 for (i = 0; i < num; i++)
1657 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1658 rects[i].w, rects[i].h);
1659 DRM_INFO("\n");
1660 }
1661#endif
1662
1663 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1664 du = vmw_connector_to_du(con);
1665 if (num > du->unit) {
1666 du->pref_width = rects[du->unit].w;
1667 du->pref_height = rects[du->unit].h;
1668 du->pref_active = true;
1669 du->gui_x = rects[du->unit].x;
1670 du->gui_y = rects[du->unit].y;
1671 } else {
1672 du->pref_width = 800;
1673 du->pref_height = 600;
1674 du->pref_active = false;
1675 }
1676 con->status = vmw_du_connector_detect(con, true);
1677 }
1678
1679 mutex_unlock(&dev->mode_config.mutex);
1680
1681 return 0;
1682}
1683
1684int vmw_du_page_flip(struct drm_crtc *crtc,
1685 struct drm_framebuffer *fb,
1686 struct drm_pending_vblank_event *event)
1687{
1688 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1689 struct drm_framebuffer *old_fb = crtc->fb;
1690 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
1691 struct drm_file *file_priv ;
1692 struct vmw_fence_obj *fence = NULL;
1693 struct drm_clip_rect clips;
1694 int ret;
1695
1696 if (event == NULL)
1697 return -EINVAL;
1698
1699 /* require ScreenObject support for page flipping */
1700 if (!dev_priv->sou_priv)
1701 return -ENOSYS;
1702
1703 file_priv = event->base.file_priv;
1704 if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
1705 return -EINVAL;
1706
1707 crtc->fb = fb;
1708
1709 /* do a full screen dirty update */
1710 clips.x1 = clips.y1 = 0;
1711 clips.x2 = fb->width;
1712 clips.y2 = fb->height;
1713
1714 if (vfb->dmabuf)
1715 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
1716 0, 0, &clips, 1, 1, &fence);
1717 else
1718 ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
1719 0, 0, &clips, 1, 1, &fence);
1720
1721
1722 if (ret != 0)
1723 goto out_no_fence;
1724 if (!fence) {
1725 ret = -EINVAL;
1726 goto out_no_fence;
1727 }
1728
1729 ret = vmw_event_fence_action_queue(file_priv, fence,
1730 &event->base,
1731 &event->event.tv_sec,
1732 &event->event.tv_usec,
1733 true);
1734
1735 /*
1736 * No need to hold on to this now. The only cleanup
1737 * we need to do if we fail is unref the fence.
1738 */
1739 vmw_fence_obj_unreference(&fence);
1740
1741 if (vmw_crtc_to_du(crtc)->is_implicit)
1742 vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
1743
1744 return ret;
1745
1746out_no_fence:
1747 crtc->fb = old_fb;
1748 return ret;
1749}
1750
1751
1752void vmw_du_crtc_save(struct drm_crtc *crtc)
1753{
1754}
1755
1756void vmw_du_crtc_restore(struct drm_crtc *crtc)
1757{
1758}
1759
1760void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1761 u16 *r, u16 *g, u16 *b,
1762 uint32_t start, uint32_t size)
1763{
1764 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1765 int i;
1766
1767 for (i = 0; i < size; i++) {
1768 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1769 r[i], g[i], b[i]);
1770 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1771 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1772 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1773 }
1774}
1775
1776void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1777{
1778}
1779
1780void vmw_du_connector_save(struct drm_connector *connector)
1781{
1782}
1783
1784void vmw_du_connector_restore(struct drm_connector *connector)
1785{
1786}
1787
1788enum drm_connector_status
1789vmw_du_connector_detect(struct drm_connector *connector, bool force)
1790{
1791 uint32_t num_displays;
1792 struct drm_device *dev = connector->dev;
1793 struct vmw_private *dev_priv = vmw_priv(dev);
1794 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1795
1796 mutex_lock(&dev_priv->hw_mutex);
1797 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1798 mutex_unlock(&dev_priv->hw_mutex);
1799
1800 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1801 du->pref_active) ?
1802 connector_status_connected : connector_status_disconnected);
1803}
1804
1805static struct drm_display_mode vmw_kms_connector_builtin[] = {
1806 /* 640x480@60Hz */
1807 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1808 752, 800, 0, 480, 489, 492, 525, 0,
1809 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1810 /* 800x600@60Hz */
1811 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1812 968, 1056, 0, 600, 601, 605, 628, 0,
1813 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1814 /* 1024x768@60Hz */
1815 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1816 1184, 1344, 0, 768, 771, 777, 806, 0,
1817 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1818 /* 1152x864@75Hz */
1819 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1820 1344, 1600, 0, 864, 865, 868, 900, 0,
1821 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1822 /* 1280x768@60Hz */
1823 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1824 1472, 1664, 0, 768, 771, 778, 798, 0,
1825 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1826 /* 1280x800@60Hz */
1827 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1828 1480, 1680, 0, 800, 803, 809, 831, 0,
1829 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1830 /* 1280x960@60Hz */
1831 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1832 1488, 1800, 0, 960, 961, 964, 1000, 0,
1833 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1834 /* 1280x1024@60Hz */
1835 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1836 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1837 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1838 /* 1360x768@60Hz */
1839 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1840 1536, 1792, 0, 768, 771, 777, 795, 0,
1841 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1842 /* 1440x1050@60Hz */
1843 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1844 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1845 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1846 /* 1440x900@60Hz */
1847 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1848 1672, 1904, 0, 900, 903, 909, 934, 0,
1849 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1850 /* 1600x1200@60Hz */
1851 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1852 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1853 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1854 /* 1680x1050@60Hz */
1855 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1856 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1857 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1858 /* 1792x1344@60Hz */
1859 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1860 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1861 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1862 /* 1853x1392@60Hz */
1863 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1864 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1865 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1866 /* 1920x1200@60Hz */
1867 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1868 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1869 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1870 /* 1920x1440@60Hz */
1871 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1872 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1873 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1874 /* 2560x1600@60Hz */
1875 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1876 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1877 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1878 /* Terminate */
1879 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1880};
1881
1882/**
1883 * vmw_guess_mode_timing - Provide fake timings for a
1884 * 60Hz vrefresh mode.
1885 *
1886 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1887 * members filled in.
1888 */
1889static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1890{
1891 mode->hsync_start = mode->hdisplay + 50;
1892 mode->hsync_end = mode->hsync_start + 50;
1893 mode->htotal = mode->hsync_end + 50;
1894
1895 mode->vsync_start = mode->vdisplay + 50;
1896 mode->vsync_end = mode->vsync_start + 50;
1897 mode->vtotal = mode->vsync_end + 50;
1898
1899 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1900 mode->vrefresh = drm_mode_vrefresh(mode);
1901}
1902
1903
1904int vmw_du_connector_fill_modes(struct drm_connector *connector,
1905 uint32_t max_width, uint32_t max_height)
1906{
1907 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1908 struct drm_device *dev = connector->dev;
1909 struct vmw_private *dev_priv = vmw_priv(dev);
1910 struct drm_display_mode *mode = NULL;
1911 struct drm_display_mode *bmode;
1912 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1913 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1914 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1915 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1916 };
1917 int i;
1918
1919 /* Add preferred mode */
1920 {
1921 mode = drm_mode_duplicate(dev, &prefmode);
1922 if (!mode)
1923 return 0;
1924 mode->hdisplay = du->pref_width;
1925 mode->vdisplay = du->pref_height;
1926 vmw_guess_mode_timing(mode);
1927
1928 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1929 mode->vdisplay)) {
1930 drm_mode_probed_add(connector, mode);
1931 } else {
1932 drm_mode_destroy(dev, mode);
1933 mode = NULL;
1934 }
1935
1936 if (du->pref_mode) {
1937 list_del_init(&du->pref_mode->head);
1938 drm_mode_destroy(dev, du->pref_mode);
1939 }
1940
1941 /* mode might be null here, this is intended */
1942 du->pref_mode = mode;
1943 }
1944
1945 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1946 bmode = &vmw_kms_connector_builtin[i];
1947 if (bmode->hdisplay > max_width ||
1948 bmode->vdisplay > max_height)
1949 continue;
1950
1951 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1952 bmode->vdisplay))
1953 continue;
1954
1955 mode = drm_mode_duplicate(dev, bmode);
1956 if (!mode)
1957 return 0;
1958 mode->vrefresh = drm_mode_vrefresh(mode);
1959
1960 drm_mode_probed_add(connector, mode);
1961 }
1962
1963 /* Move the prefered mode first, help apps pick the right mode. */
1964 if (du->pref_mode)
1965 list_move(&du->pref_mode->head, &connector->probed_modes);
1966
1967 drm_mode_connector_list_update(connector);
1968
1969 return 1;
1970}
1971
1972int vmw_du_connector_set_property(struct drm_connector *connector,
1973 struct drm_property *property,
1974 uint64_t val)
1975{
1976 return 0;
1977}
1978
1979
1980int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1981 struct drm_file *file_priv)
1982{
1983 struct vmw_private *dev_priv = vmw_priv(dev);
1984 struct drm_vmw_update_layout_arg *arg =
1985 (struct drm_vmw_update_layout_arg *)data;
1986 struct vmw_master *vmaster = vmw_master(file_priv->master);
1987 void __user *user_rects;
1988 struct drm_vmw_rect *rects;
1989 unsigned rects_size;
1990 int ret;
1991 int i;
1992 struct drm_mode_config *mode_config = &dev->mode_config;
1993
1994 ret = ttm_read_lock(&vmaster->lock, true);
1995 if (unlikely(ret != 0))
1996 return ret;
1997
1998 if (!arg->num_outputs) {
1999 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
2000 vmw_du_update_layout(dev_priv, 1, &def_rect);
2001 goto out_unlock;
2002 }
2003
2004 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
2005 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
2006 GFP_KERNEL);
2007 if (unlikely(!rects)) {
2008 ret = -ENOMEM;
2009 goto out_unlock;
2010 }
2011
2012 user_rects = (void __user *)(unsigned long)arg->rects;
2013 ret = copy_from_user(rects, user_rects, rects_size);
2014 if (unlikely(ret != 0)) {
2015 DRM_ERROR("Failed to get rects.\n");
2016 ret = -EFAULT;
2017 goto out_free;
2018 }
2019
2020 for (i = 0; i < arg->num_outputs; ++i) {
2021 if (rects[i].x < 0 ||
2022 rects[i].y < 0 ||
2023 rects[i].x + rects[i].w > mode_config->max_width ||
2024 rects[i].y + rects[i].h > mode_config->max_height) {
2025 DRM_ERROR("Invalid GUI layout.\n");
2026 ret = -EINVAL;
2027 goto out_free;
2028 }
2029 }
2030
2031 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
2032
2033out_free:
2034 kfree(rects);
2035out_unlock:
2036 ttm_read_unlock(&vmaster->lock);
2037 return ret;
2038}