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1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <linux/i2c.h>
28#include <linux/slab.h>
29#include "drmP.h"
30#include "drm.h"
31#include "drm_crtc.h"
32#include "drm_crtc_helper.h"
33#include "drm_edid.h"
34#include "intel_drv.h"
35#include "i915_drm.h"
36#include "i915_drv.h"
37
38/* Here's the desired hotplug mode */
39#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
45
46struct intel_crt {
47 struct intel_encoder base;
48 bool force_hotplug_required;
49};
50
51static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
52{
53 return container_of(intel_attached_encoder(connector),
54 struct intel_crt, base);
55}
56
57static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
58{
59 struct drm_device *dev = encoder->dev;
60 struct drm_i915_private *dev_priv = dev->dev_private;
61 u32 temp, reg;
62
63 if (HAS_PCH_SPLIT(dev))
64 reg = PCH_ADPA;
65 else
66 reg = ADPA;
67
68 temp = I915_READ(reg);
69 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
70 temp &= ~ADPA_DAC_ENABLE;
71
72 switch(mode) {
73 case DRM_MODE_DPMS_ON:
74 temp |= ADPA_DAC_ENABLE;
75 break;
76 case DRM_MODE_DPMS_STANDBY:
77 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
78 break;
79 case DRM_MODE_DPMS_SUSPEND:
80 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
81 break;
82 case DRM_MODE_DPMS_OFF:
83 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
84 break;
85 }
86
87 I915_WRITE(reg, temp);
88}
89
90static int intel_crt_mode_valid(struct drm_connector *connector,
91 struct drm_display_mode *mode)
92{
93 struct drm_device *dev = connector->dev;
94
95 int max_clock = 0;
96 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
97 return MODE_NO_DBLESCAN;
98
99 if (mode->clock < 25000)
100 return MODE_CLOCK_LOW;
101
102 if (IS_GEN2(dev))
103 max_clock = 350000;
104 else
105 max_clock = 400000;
106 if (mode->clock > max_clock)
107 return MODE_CLOCK_HIGH;
108
109 return MODE_OK;
110}
111
112static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
113 struct drm_display_mode *mode,
114 struct drm_display_mode *adjusted_mode)
115{
116 return true;
117}
118
119static void intel_crt_mode_set(struct drm_encoder *encoder,
120 struct drm_display_mode *mode,
121 struct drm_display_mode *adjusted_mode)
122{
123
124 struct drm_device *dev = encoder->dev;
125 struct drm_crtc *crtc = encoder->crtc;
126 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
127 struct drm_i915_private *dev_priv = dev->dev_private;
128 int dpll_md_reg;
129 u32 adpa, dpll_md;
130 u32 adpa_reg;
131
132 dpll_md_reg = DPLL_MD(intel_crtc->pipe);
133
134 if (HAS_PCH_SPLIT(dev))
135 adpa_reg = PCH_ADPA;
136 else
137 adpa_reg = ADPA;
138
139 /*
140 * Disable separate mode multiplier used when cloning SDVO to CRT
141 * XXX this needs to be adjusted when we really are cloning
142 */
143 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
144 dpll_md = I915_READ(dpll_md_reg);
145 I915_WRITE(dpll_md_reg,
146 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
147 }
148
149 adpa = ADPA_HOTPLUG_BITS;
150 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
151 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
152 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
153 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
154
155 if (intel_crtc->pipe == 0) {
156 if (HAS_PCH_CPT(dev))
157 adpa |= PORT_TRANS_A_SEL_CPT;
158 else
159 adpa |= ADPA_PIPE_A_SELECT;
160 } else {
161 if (HAS_PCH_CPT(dev))
162 adpa |= PORT_TRANS_B_SEL_CPT;
163 else
164 adpa |= ADPA_PIPE_B_SELECT;
165 }
166
167 if (!HAS_PCH_SPLIT(dev))
168 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
169
170 I915_WRITE(adpa_reg, adpa);
171}
172
173static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
174{
175 struct drm_device *dev = connector->dev;
176 struct intel_crt *crt = intel_attached_crt(connector);
177 struct drm_i915_private *dev_priv = dev->dev_private;
178 u32 adpa;
179 bool ret;
180
181 /* The first time through, trigger an explicit detection cycle */
182 if (crt->force_hotplug_required) {
183 bool turn_off_dac = HAS_PCH_SPLIT(dev);
184 u32 save_adpa;
185
186 crt->force_hotplug_required = 0;
187
188 save_adpa = adpa = I915_READ(PCH_ADPA);
189 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
190
191 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
192 if (turn_off_dac)
193 adpa &= ~ADPA_DAC_ENABLE;
194
195 I915_WRITE(PCH_ADPA, adpa);
196
197 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
198 1000))
199 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
200
201 if (turn_off_dac) {
202 I915_WRITE(PCH_ADPA, save_adpa);
203 POSTING_READ(PCH_ADPA);
204 }
205 }
206
207 /* Check the status to see if both blue and green are on now */
208 adpa = I915_READ(PCH_ADPA);
209 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
210 ret = true;
211 else
212 ret = false;
213 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
214
215 return ret;
216}
217
218/**
219 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
220 *
221 * Not for i915G/i915GM
222 *
223 * \return true if CRT is connected.
224 * \return false if CRT is disconnected.
225 */
226static bool intel_crt_detect_hotplug(struct drm_connector *connector)
227{
228 struct drm_device *dev = connector->dev;
229 struct drm_i915_private *dev_priv = dev->dev_private;
230 u32 hotplug_en, orig, stat;
231 bool ret = false;
232 int i, tries = 0;
233
234 if (HAS_PCH_SPLIT(dev))
235 return intel_ironlake_crt_detect_hotplug(connector);
236
237 /*
238 * On 4 series desktop, CRT detect sequence need to be done twice
239 * to get a reliable result.
240 */
241
242 if (IS_G4X(dev) && !IS_GM45(dev))
243 tries = 2;
244 else
245 tries = 1;
246 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
247 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
248
249 for (i = 0; i < tries ; i++) {
250 /* turn on the FORCE_DETECT */
251 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
252 /* wait for FORCE_DETECT to go off */
253 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
254 CRT_HOTPLUG_FORCE_DETECT) == 0,
255 1000))
256 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
257 }
258
259 stat = I915_READ(PORT_HOTPLUG_STAT);
260 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
261 ret = true;
262
263 /* clear the interrupt we just generated, if any */
264 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
265
266 /* and put the bits back */
267 I915_WRITE(PORT_HOTPLUG_EN, orig);
268
269 return ret;
270}
271
272static bool intel_crt_detect_ddc(struct drm_connector *connector)
273{
274 struct intel_crt *crt = intel_attached_crt(connector);
275 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
276
277 /* CRT should always be at 0, but check anyway */
278 if (crt->base.type != INTEL_OUTPUT_ANALOG)
279 return false;
280
281 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
282 struct edid *edid;
283 bool is_digital = false;
284
285 edid = drm_get_edid(connector,
286 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
287 /*
288 * This may be a DVI-I connector with a shared DDC
289 * link between analog and digital outputs, so we
290 * have to check the EDID input spec of the attached device.
291 *
292 * On the other hand, what should we do if it is a broken EDID?
293 */
294 if (edid != NULL) {
295 is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
296 connector->display_info.raw_edid = NULL;
297 kfree(edid);
298 }
299
300 if (!is_digital) {
301 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
302 return true;
303 } else {
304 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
305 }
306 }
307
308 return false;
309}
310
311static enum drm_connector_status
312intel_crt_load_detect(struct intel_crt *crt)
313{
314 struct drm_device *dev = crt->base.base.dev;
315 struct drm_i915_private *dev_priv = dev->dev_private;
316 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
317 uint32_t save_bclrpat;
318 uint32_t save_vtotal;
319 uint32_t vtotal, vactive;
320 uint32_t vsample;
321 uint32_t vblank, vblank_start, vblank_end;
322 uint32_t dsl;
323 uint32_t bclrpat_reg;
324 uint32_t vtotal_reg;
325 uint32_t vblank_reg;
326 uint32_t vsync_reg;
327 uint32_t pipeconf_reg;
328 uint32_t pipe_dsl_reg;
329 uint8_t st00;
330 enum drm_connector_status status;
331
332 DRM_DEBUG_KMS("starting load-detect on CRT\n");
333
334 bclrpat_reg = BCLRPAT(pipe);
335 vtotal_reg = VTOTAL(pipe);
336 vblank_reg = VBLANK(pipe);
337 vsync_reg = VSYNC(pipe);
338 pipeconf_reg = PIPECONF(pipe);
339 pipe_dsl_reg = PIPEDSL(pipe);
340
341 save_bclrpat = I915_READ(bclrpat_reg);
342 save_vtotal = I915_READ(vtotal_reg);
343 vblank = I915_READ(vblank_reg);
344
345 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
346 vactive = (save_vtotal & 0x7ff) + 1;
347
348 vblank_start = (vblank & 0xfff) + 1;
349 vblank_end = ((vblank >> 16) & 0xfff) + 1;
350
351 /* Set the border color to purple. */
352 I915_WRITE(bclrpat_reg, 0x500050);
353
354 if (!IS_GEN2(dev)) {
355 uint32_t pipeconf = I915_READ(pipeconf_reg);
356 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
357 POSTING_READ(pipeconf_reg);
358 /* Wait for next Vblank to substitue
359 * border color for Color info */
360 intel_wait_for_vblank(dev, pipe);
361 st00 = I915_READ8(VGA_MSR_WRITE);
362 status = ((st00 & (1 << 4)) != 0) ?
363 connector_status_connected :
364 connector_status_disconnected;
365
366 I915_WRITE(pipeconf_reg, pipeconf);
367 } else {
368 bool restore_vblank = false;
369 int count, detect;
370
371 /*
372 * If there isn't any border, add some.
373 * Yes, this will flicker
374 */
375 if (vblank_start <= vactive && vblank_end >= vtotal) {
376 uint32_t vsync = I915_READ(vsync_reg);
377 uint32_t vsync_start = (vsync & 0xffff) + 1;
378
379 vblank_start = vsync_start;
380 I915_WRITE(vblank_reg,
381 (vblank_start - 1) |
382 ((vblank_end - 1) << 16));
383 restore_vblank = true;
384 }
385 /* sample in the vertical border, selecting the larger one */
386 if (vblank_start - vactive >= vtotal - vblank_end)
387 vsample = (vblank_start + vactive) >> 1;
388 else
389 vsample = (vtotal + vblank_end) >> 1;
390
391 /*
392 * Wait for the border to be displayed
393 */
394 while (I915_READ(pipe_dsl_reg) >= vactive)
395 ;
396 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
397 ;
398 /*
399 * Watch ST00 for an entire scanline
400 */
401 detect = 0;
402 count = 0;
403 do {
404 count++;
405 /* Read the ST00 VGA status register */
406 st00 = I915_READ8(VGA_MSR_WRITE);
407 if (st00 & (1 << 4))
408 detect++;
409 } while ((I915_READ(pipe_dsl_reg) == dsl));
410
411 /* restore vblank if necessary */
412 if (restore_vblank)
413 I915_WRITE(vblank_reg, vblank);
414 /*
415 * If more than 3/4 of the scanline detected a monitor,
416 * then it is assumed to be present. This works even on i830,
417 * where there isn't any way to force the border color across
418 * the screen
419 */
420 status = detect * 4 > count * 3 ?
421 connector_status_connected :
422 connector_status_disconnected;
423 }
424
425 /* Restore previous settings */
426 I915_WRITE(bclrpat_reg, save_bclrpat);
427
428 return status;
429}
430
431static enum drm_connector_status
432intel_crt_detect(struct drm_connector *connector, bool force)
433{
434 struct drm_device *dev = connector->dev;
435 struct intel_crt *crt = intel_attached_crt(connector);
436 struct drm_crtc *crtc;
437 enum drm_connector_status status;
438
439 if (I915_HAS_HOTPLUG(dev)) {
440 if (intel_crt_detect_hotplug(connector)) {
441 DRM_DEBUG_KMS("CRT detected via hotplug\n");
442 return connector_status_connected;
443 } else {
444 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
445 return connector_status_disconnected;
446 }
447 }
448
449 if (intel_crt_detect_ddc(connector))
450 return connector_status_connected;
451
452 if (!force)
453 return connector->status;
454
455 /* for pre-945g platforms use load detect */
456 crtc = crt->base.base.crtc;
457 if (crtc && crtc->enabled) {
458 status = intel_crt_load_detect(crt);
459 } else {
460 struct intel_load_detect_pipe tmp;
461
462 if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
463 &tmp)) {
464 if (intel_crt_detect_ddc(connector))
465 status = connector_status_connected;
466 else
467 status = intel_crt_load_detect(crt);
468 intel_release_load_detect_pipe(&crt->base, connector,
469 &tmp);
470 } else
471 status = connector_status_unknown;
472 }
473
474 return status;
475}
476
477static void intel_crt_destroy(struct drm_connector *connector)
478{
479 drm_sysfs_connector_remove(connector);
480 drm_connector_cleanup(connector);
481 kfree(connector);
482}
483
484static int intel_crt_get_modes(struct drm_connector *connector)
485{
486 struct drm_device *dev = connector->dev;
487 struct drm_i915_private *dev_priv = dev->dev_private;
488 int ret;
489
490 ret = intel_ddc_get_modes(connector,
491 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
492 if (ret || !IS_G4X(dev))
493 return ret;
494
495 /* Try to probe digital port for output in DVI-I -> VGA mode. */
496 return intel_ddc_get_modes(connector,
497 &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
498}
499
500static int intel_crt_set_property(struct drm_connector *connector,
501 struct drm_property *property,
502 uint64_t value)
503{
504 return 0;
505}
506
507static void intel_crt_reset(struct drm_connector *connector)
508{
509 struct drm_device *dev = connector->dev;
510 struct intel_crt *crt = intel_attached_crt(connector);
511
512 if (HAS_PCH_SPLIT(dev))
513 crt->force_hotplug_required = 1;
514}
515
516/*
517 * Routines for controlling stuff on the analog port
518 */
519
520static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
521 .dpms = intel_crt_dpms,
522 .mode_fixup = intel_crt_mode_fixup,
523 .prepare = intel_encoder_prepare,
524 .commit = intel_encoder_commit,
525 .mode_set = intel_crt_mode_set,
526};
527
528static const struct drm_connector_funcs intel_crt_connector_funcs = {
529 .reset = intel_crt_reset,
530 .dpms = drm_helper_connector_dpms,
531 .detect = intel_crt_detect,
532 .fill_modes = drm_helper_probe_single_connector_modes,
533 .destroy = intel_crt_destroy,
534 .set_property = intel_crt_set_property,
535};
536
537static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
538 .mode_valid = intel_crt_mode_valid,
539 .get_modes = intel_crt_get_modes,
540 .best_encoder = intel_best_encoder,
541};
542
543static const struct drm_encoder_funcs intel_crt_enc_funcs = {
544 .destroy = intel_encoder_destroy,
545};
546
547void intel_crt_init(struct drm_device *dev)
548{
549 struct drm_connector *connector;
550 struct intel_crt *crt;
551 struct intel_connector *intel_connector;
552 struct drm_i915_private *dev_priv = dev->dev_private;
553
554 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
555 if (!crt)
556 return;
557
558 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
559 if (!intel_connector) {
560 kfree(crt);
561 return;
562 }
563
564 connector = &intel_connector->base;
565 drm_connector_init(dev, &intel_connector->base,
566 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
567
568 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
569 DRM_MODE_ENCODER_DAC);
570
571 intel_connector_attach_encoder(intel_connector, &crt->base);
572
573 crt->base.type = INTEL_OUTPUT_ANALOG;
574 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
575 1 << INTEL_ANALOG_CLONE_BIT |
576 1 << INTEL_SDVO_LVDS_CLONE_BIT);
577 crt->base.crtc_mask = (1 << 0) | (1 << 1);
578 connector->interlace_allowed = 1;
579 connector->doublescan_allowed = 0;
580
581 drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
582 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
583
584 drm_sysfs_connector_add(connector);
585
586 if (I915_HAS_HOTPLUG(dev))
587 connector->polled = DRM_CONNECTOR_POLL_HPD;
588 else
589 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
590
591 /*
592 * Configure the automatic hotplug detection stuff
593 */
594 crt->force_hotplug_required = 0;
595 if (HAS_PCH_SPLIT(dev)) {
596 u32 adpa;
597
598 adpa = I915_READ(PCH_ADPA);
599 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
600 adpa |= ADPA_HOTPLUG_BITS;
601 I915_WRITE(PCH_ADPA, adpa);
602 POSTING_READ(PCH_ADPA);
603
604 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
605 crt->force_hotplug_required = 1;
606 }
607
608 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
609}
1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <linux/dmi.h>
28#include <linux/i2c.h>
29#include <linux/slab.h>
30#include "drmP.h"
31#include "drm.h"
32#include "drm_crtc.h"
33#include "drm_crtc_helper.h"
34#include "drm_edid.h"
35#include "intel_drv.h"
36#include "i915_drm.h"
37#include "i915_drv.h"
38
39/* Here's the desired hotplug mode */
40#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
46
47struct intel_crt {
48 struct intel_encoder base;
49 bool force_hotplug_required;
50};
51
52static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
53{
54 return container_of(intel_attached_encoder(connector),
55 struct intel_crt, base);
56}
57
58static void pch_crt_dpms(struct drm_encoder *encoder, int mode)
59{
60 struct drm_device *dev = encoder->dev;
61 struct drm_i915_private *dev_priv = dev->dev_private;
62 u32 temp;
63
64 temp = I915_READ(PCH_ADPA);
65 temp &= ~ADPA_DAC_ENABLE;
66
67 switch (mode) {
68 case DRM_MODE_DPMS_ON:
69 temp |= ADPA_DAC_ENABLE;
70 break;
71 case DRM_MODE_DPMS_STANDBY:
72 case DRM_MODE_DPMS_SUSPEND:
73 case DRM_MODE_DPMS_OFF:
74 /* Just leave port enable cleared */
75 break;
76 }
77
78 I915_WRITE(PCH_ADPA, temp);
79}
80
81static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)
82{
83 struct drm_device *dev = encoder->dev;
84 struct drm_i915_private *dev_priv = dev->dev_private;
85 u32 temp;
86
87 temp = I915_READ(ADPA);
88 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
89 temp &= ~ADPA_DAC_ENABLE;
90
91 switch (mode) {
92 case DRM_MODE_DPMS_ON:
93 temp |= ADPA_DAC_ENABLE;
94 break;
95 case DRM_MODE_DPMS_STANDBY:
96 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
97 break;
98 case DRM_MODE_DPMS_SUSPEND:
99 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
100 break;
101 case DRM_MODE_DPMS_OFF:
102 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
103 break;
104 }
105
106 I915_WRITE(ADPA, temp);
107}
108
109static int intel_crt_mode_valid(struct drm_connector *connector,
110 struct drm_display_mode *mode)
111{
112 struct drm_device *dev = connector->dev;
113
114 int max_clock = 0;
115 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
116 return MODE_NO_DBLESCAN;
117
118 if (mode->clock < 25000)
119 return MODE_CLOCK_LOW;
120
121 if (IS_GEN2(dev))
122 max_clock = 350000;
123 else
124 max_clock = 400000;
125 if (mode->clock > max_clock)
126 return MODE_CLOCK_HIGH;
127
128 return MODE_OK;
129}
130
131static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
132 struct drm_display_mode *mode,
133 struct drm_display_mode *adjusted_mode)
134{
135 return true;
136}
137
138static void intel_crt_mode_set(struct drm_encoder *encoder,
139 struct drm_display_mode *mode,
140 struct drm_display_mode *adjusted_mode)
141{
142
143 struct drm_device *dev = encoder->dev;
144 struct drm_crtc *crtc = encoder->crtc;
145 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
146 struct drm_i915_private *dev_priv = dev->dev_private;
147 int dpll_md_reg;
148 u32 adpa, dpll_md;
149 u32 adpa_reg;
150
151 dpll_md_reg = DPLL_MD(intel_crtc->pipe);
152
153 if (HAS_PCH_SPLIT(dev))
154 adpa_reg = PCH_ADPA;
155 else
156 adpa_reg = ADPA;
157
158 /*
159 * Disable separate mode multiplier used when cloning SDVO to CRT
160 * XXX this needs to be adjusted when we really are cloning
161 */
162 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
163 dpll_md = I915_READ(dpll_md_reg);
164 I915_WRITE(dpll_md_reg,
165 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
166 }
167
168 adpa = ADPA_HOTPLUG_BITS;
169 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
170 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
171 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
172 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
173
174 /* For CPT allow 3 pipe config, for others just use A or B */
175 if (HAS_PCH_CPT(dev))
176 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
177 else if (intel_crtc->pipe == 0)
178 adpa |= ADPA_PIPE_A_SELECT;
179 else
180 adpa |= ADPA_PIPE_B_SELECT;
181
182 if (!HAS_PCH_SPLIT(dev))
183 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
184
185 I915_WRITE(adpa_reg, adpa);
186}
187
188static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
189{
190 struct drm_device *dev = connector->dev;
191 struct intel_crt *crt = intel_attached_crt(connector);
192 struct drm_i915_private *dev_priv = dev->dev_private;
193 u32 adpa;
194 bool ret;
195
196 /* The first time through, trigger an explicit detection cycle */
197 if (crt->force_hotplug_required) {
198 bool turn_off_dac = HAS_PCH_SPLIT(dev);
199 u32 save_adpa;
200
201 crt->force_hotplug_required = 0;
202
203 save_adpa = adpa = I915_READ(PCH_ADPA);
204 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
205
206 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
207 if (turn_off_dac)
208 adpa &= ~ADPA_DAC_ENABLE;
209
210 I915_WRITE(PCH_ADPA, adpa);
211
212 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
213 1000))
214 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
215
216 if (turn_off_dac) {
217 I915_WRITE(PCH_ADPA, save_adpa);
218 POSTING_READ(PCH_ADPA);
219 }
220 }
221
222 /* Check the status to see if both blue and green are on now */
223 adpa = I915_READ(PCH_ADPA);
224 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
225 ret = true;
226 else
227 ret = false;
228 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
229
230 return ret;
231}
232
233/**
234 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
235 *
236 * Not for i915G/i915GM
237 *
238 * \return true if CRT is connected.
239 * \return false if CRT is disconnected.
240 */
241static bool intel_crt_detect_hotplug(struct drm_connector *connector)
242{
243 struct drm_device *dev = connector->dev;
244 struct drm_i915_private *dev_priv = dev->dev_private;
245 u32 hotplug_en, orig, stat;
246 bool ret = false;
247 int i, tries = 0;
248
249 if (HAS_PCH_SPLIT(dev))
250 return intel_ironlake_crt_detect_hotplug(connector);
251
252 /*
253 * On 4 series desktop, CRT detect sequence need to be done twice
254 * to get a reliable result.
255 */
256
257 if (IS_G4X(dev) && !IS_GM45(dev))
258 tries = 2;
259 else
260 tries = 1;
261 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
262 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
263
264 for (i = 0; i < tries ; i++) {
265 /* turn on the FORCE_DETECT */
266 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
267 /* wait for FORCE_DETECT to go off */
268 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
269 CRT_HOTPLUG_FORCE_DETECT) == 0,
270 1000))
271 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
272 }
273
274 stat = I915_READ(PORT_HOTPLUG_STAT);
275 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
276 ret = true;
277
278 /* clear the interrupt we just generated, if any */
279 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
280
281 /* and put the bits back */
282 I915_WRITE(PORT_HOTPLUG_EN, orig);
283
284 return ret;
285}
286
287static struct edid *intel_crt_get_edid(struct drm_connector *connector,
288 struct i2c_adapter *i2c)
289{
290 struct edid *edid;
291
292 edid = drm_get_edid(connector, i2c);
293
294 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
295 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
296 intel_gmbus_force_bit(i2c, true);
297 edid = drm_get_edid(connector, i2c);
298 intel_gmbus_force_bit(i2c, false);
299 }
300
301 return edid;
302}
303
304/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
305static int intel_crt_ddc_get_modes(struct drm_connector *connector,
306 struct i2c_adapter *adapter)
307{
308 struct edid *edid;
309
310 edid = intel_crt_get_edid(connector, adapter);
311 if (!edid)
312 return 0;
313
314 return intel_connector_update_modes(connector, edid);
315}
316
317static bool intel_crt_detect_ddc(struct drm_connector *connector)
318{
319 struct intel_crt *crt = intel_attached_crt(connector);
320 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
321
322 /* CRT should always be at 0, but check anyway */
323 if (crt->base.type != INTEL_OUTPUT_ANALOG)
324 return false;
325
326 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
327 struct edid *edid;
328 bool is_digital = false;
329 struct i2c_adapter *i2c;
330
331 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
332 edid = intel_crt_get_edid(connector, i2c);
333 /*
334 * This may be a DVI-I connector with a shared DDC
335 * link between analog and digital outputs, so we
336 * have to check the EDID input spec of the attached device.
337 *
338 * On the other hand, what should we do if it is a broken EDID?
339 */
340 if (edid != NULL) {
341 is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
342 connector->display_info.raw_edid = NULL;
343 kfree(edid);
344 }
345
346 if (!is_digital) {
347 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
348 return true;
349 } else {
350 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
351 }
352 }
353
354 return false;
355}
356
357static enum drm_connector_status
358intel_crt_load_detect(struct intel_crt *crt)
359{
360 struct drm_device *dev = crt->base.base.dev;
361 struct drm_i915_private *dev_priv = dev->dev_private;
362 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
363 uint32_t save_bclrpat;
364 uint32_t save_vtotal;
365 uint32_t vtotal, vactive;
366 uint32_t vsample;
367 uint32_t vblank, vblank_start, vblank_end;
368 uint32_t dsl;
369 uint32_t bclrpat_reg;
370 uint32_t vtotal_reg;
371 uint32_t vblank_reg;
372 uint32_t vsync_reg;
373 uint32_t pipeconf_reg;
374 uint32_t pipe_dsl_reg;
375 uint8_t st00;
376 enum drm_connector_status status;
377
378 DRM_DEBUG_KMS("starting load-detect on CRT\n");
379
380 bclrpat_reg = BCLRPAT(pipe);
381 vtotal_reg = VTOTAL(pipe);
382 vblank_reg = VBLANK(pipe);
383 vsync_reg = VSYNC(pipe);
384 pipeconf_reg = PIPECONF(pipe);
385 pipe_dsl_reg = PIPEDSL(pipe);
386
387 save_bclrpat = I915_READ(bclrpat_reg);
388 save_vtotal = I915_READ(vtotal_reg);
389 vblank = I915_READ(vblank_reg);
390
391 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
392 vactive = (save_vtotal & 0x7ff) + 1;
393
394 vblank_start = (vblank & 0xfff) + 1;
395 vblank_end = ((vblank >> 16) & 0xfff) + 1;
396
397 /* Set the border color to purple. */
398 I915_WRITE(bclrpat_reg, 0x500050);
399
400 if (!IS_GEN2(dev)) {
401 uint32_t pipeconf = I915_READ(pipeconf_reg);
402 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
403 POSTING_READ(pipeconf_reg);
404 /* Wait for next Vblank to substitue
405 * border color for Color info */
406 intel_wait_for_vblank(dev, pipe);
407 st00 = I915_READ8(VGA_MSR_WRITE);
408 status = ((st00 & (1 << 4)) != 0) ?
409 connector_status_connected :
410 connector_status_disconnected;
411
412 I915_WRITE(pipeconf_reg, pipeconf);
413 } else {
414 bool restore_vblank = false;
415 int count, detect;
416
417 /*
418 * If there isn't any border, add some.
419 * Yes, this will flicker
420 */
421 if (vblank_start <= vactive && vblank_end >= vtotal) {
422 uint32_t vsync = I915_READ(vsync_reg);
423 uint32_t vsync_start = (vsync & 0xffff) + 1;
424
425 vblank_start = vsync_start;
426 I915_WRITE(vblank_reg,
427 (vblank_start - 1) |
428 ((vblank_end - 1) << 16));
429 restore_vblank = true;
430 }
431 /* sample in the vertical border, selecting the larger one */
432 if (vblank_start - vactive >= vtotal - vblank_end)
433 vsample = (vblank_start + vactive) >> 1;
434 else
435 vsample = (vtotal + vblank_end) >> 1;
436
437 /*
438 * Wait for the border to be displayed
439 */
440 while (I915_READ(pipe_dsl_reg) >= vactive)
441 ;
442 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
443 ;
444 /*
445 * Watch ST00 for an entire scanline
446 */
447 detect = 0;
448 count = 0;
449 do {
450 count++;
451 /* Read the ST00 VGA status register */
452 st00 = I915_READ8(VGA_MSR_WRITE);
453 if (st00 & (1 << 4))
454 detect++;
455 } while ((I915_READ(pipe_dsl_reg) == dsl));
456
457 /* restore vblank if necessary */
458 if (restore_vblank)
459 I915_WRITE(vblank_reg, vblank);
460 /*
461 * If more than 3/4 of the scanline detected a monitor,
462 * then it is assumed to be present. This works even on i830,
463 * where there isn't any way to force the border color across
464 * the screen
465 */
466 status = detect * 4 > count * 3 ?
467 connector_status_connected :
468 connector_status_disconnected;
469 }
470
471 /* Restore previous settings */
472 I915_WRITE(bclrpat_reg, save_bclrpat);
473
474 return status;
475}
476
477static enum drm_connector_status
478intel_crt_detect(struct drm_connector *connector, bool force)
479{
480 struct drm_device *dev = connector->dev;
481 struct intel_crt *crt = intel_attached_crt(connector);
482 enum drm_connector_status status;
483 struct intel_load_detect_pipe tmp;
484
485 if (I915_HAS_HOTPLUG(dev)) {
486 if (intel_crt_detect_hotplug(connector)) {
487 DRM_DEBUG_KMS("CRT detected via hotplug\n");
488 return connector_status_connected;
489 } else {
490 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
491 return connector_status_disconnected;
492 }
493 }
494
495 if (intel_crt_detect_ddc(connector))
496 return connector_status_connected;
497
498 if (!force)
499 return connector->status;
500
501 /* for pre-945g platforms use load detect */
502 if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
503 &tmp)) {
504 if (intel_crt_detect_ddc(connector))
505 status = connector_status_connected;
506 else
507 status = intel_crt_load_detect(crt);
508 intel_release_load_detect_pipe(&crt->base, connector,
509 &tmp);
510 } else
511 status = connector_status_unknown;
512
513 return status;
514}
515
516static void intel_crt_destroy(struct drm_connector *connector)
517{
518 drm_sysfs_connector_remove(connector);
519 drm_connector_cleanup(connector);
520 kfree(connector);
521}
522
523static int intel_crt_get_modes(struct drm_connector *connector)
524{
525 struct drm_device *dev = connector->dev;
526 struct drm_i915_private *dev_priv = dev->dev_private;
527 int ret;
528 struct i2c_adapter *i2c;
529
530 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
531 ret = intel_crt_ddc_get_modes(connector, i2c);
532 if (ret || !IS_G4X(dev))
533 return ret;
534
535 /* Try to probe digital port for output in DVI-I -> VGA mode. */
536 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
537 return intel_crt_ddc_get_modes(connector, i2c);
538}
539
540static int intel_crt_set_property(struct drm_connector *connector,
541 struct drm_property *property,
542 uint64_t value)
543{
544 return 0;
545}
546
547static void intel_crt_reset(struct drm_connector *connector)
548{
549 struct drm_device *dev = connector->dev;
550 struct intel_crt *crt = intel_attached_crt(connector);
551
552 if (HAS_PCH_SPLIT(dev))
553 crt->force_hotplug_required = 1;
554}
555
556/*
557 * Routines for controlling stuff on the analog port
558 */
559
560static const struct drm_encoder_helper_funcs pch_encoder_funcs = {
561 .mode_fixup = intel_crt_mode_fixup,
562 .prepare = intel_encoder_prepare,
563 .commit = intel_encoder_commit,
564 .mode_set = intel_crt_mode_set,
565 .dpms = pch_crt_dpms,
566};
567
568static const struct drm_encoder_helper_funcs gmch_encoder_funcs = {
569 .mode_fixup = intel_crt_mode_fixup,
570 .prepare = intel_encoder_prepare,
571 .commit = intel_encoder_commit,
572 .mode_set = intel_crt_mode_set,
573 .dpms = gmch_crt_dpms,
574};
575
576static const struct drm_connector_funcs intel_crt_connector_funcs = {
577 .reset = intel_crt_reset,
578 .dpms = drm_helper_connector_dpms,
579 .detect = intel_crt_detect,
580 .fill_modes = drm_helper_probe_single_connector_modes,
581 .destroy = intel_crt_destroy,
582 .set_property = intel_crt_set_property,
583};
584
585static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
586 .mode_valid = intel_crt_mode_valid,
587 .get_modes = intel_crt_get_modes,
588 .best_encoder = intel_best_encoder,
589};
590
591static const struct drm_encoder_funcs intel_crt_enc_funcs = {
592 .destroy = intel_encoder_destroy,
593};
594
595static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
596{
597 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
598 return 1;
599}
600
601static const struct dmi_system_id intel_no_crt[] = {
602 {
603 .callback = intel_no_crt_dmi_callback,
604 .ident = "ACER ZGB",
605 .matches = {
606 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
607 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
608 },
609 },
610 { }
611};
612
613void intel_crt_init(struct drm_device *dev)
614{
615 struct drm_connector *connector;
616 struct intel_crt *crt;
617 struct intel_connector *intel_connector;
618 struct drm_i915_private *dev_priv = dev->dev_private;
619 const struct drm_encoder_helper_funcs *encoder_helper_funcs;
620
621 /* Skip machines without VGA that falsely report hotplug events */
622 if (dmi_check_system(intel_no_crt))
623 return;
624
625 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
626 if (!crt)
627 return;
628
629 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
630 if (!intel_connector) {
631 kfree(crt);
632 return;
633 }
634
635 connector = &intel_connector->base;
636 drm_connector_init(dev, &intel_connector->base,
637 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
638
639 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
640 DRM_MODE_ENCODER_DAC);
641
642 intel_connector_attach_encoder(intel_connector, &crt->base);
643
644 crt->base.type = INTEL_OUTPUT_ANALOG;
645 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
646 1 << INTEL_ANALOG_CLONE_BIT |
647 1 << INTEL_SDVO_LVDS_CLONE_BIT);
648 if (IS_HASWELL(dev))
649 crt->base.crtc_mask = (1 << 0);
650 else
651 crt->base.crtc_mask = (1 << 0) | (1 << 1);
652
653 if (IS_GEN2(dev))
654 connector->interlace_allowed = 0;
655 else
656 connector->interlace_allowed = 1;
657 connector->doublescan_allowed = 0;
658
659 if (HAS_PCH_SPLIT(dev))
660 encoder_helper_funcs = &pch_encoder_funcs;
661 else
662 encoder_helper_funcs = &gmch_encoder_funcs;
663
664 drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs);
665 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
666
667 drm_sysfs_connector_add(connector);
668
669 if (I915_HAS_HOTPLUG(dev))
670 connector->polled = DRM_CONNECTOR_POLL_HPD;
671 else
672 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
673
674 /*
675 * Configure the automatic hotplug detection stuff
676 */
677 crt->force_hotplug_required = 0;
678 if (HAS_PCH_SPLIT(dev)) {
679 u32 adpa;
680
681 adpa = I915_READ(PCH_ADPA);
682 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
683 adpa |= ADPA_HOTPLUG_BITS;
684 I915_WRITE(PCH_ADPA, adpa);
685 POSTING_READ(PCH_ADPA);
686
687 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
688 crt->force_hotplug_required = 1;
689 }
690
691 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
692}