1/*
  2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
  3 * reserved.
  4 *
  5 * This software is available to you under a choice of one of two
  6 * licenses.  You may choose to be licensed under the terms of the GNU
  7 * General Public License (GPL) Version 2, available from the file
  8 * COPYING in the main directory of this source tree, or the NetLogic
  9 * license below:
 10 *
 11 * Redistribution and use in source and binary forms, with or without
 12 * modification, are permitted provided that the following conditions
 13 * are met:
 14 *
 15 * 1. Redistributions of source code must retain the above copyright
 16 *    notice, this list of conditions and the following disclaimer.
 17 * 2. Redistributions in binary form must reproduce the above copyright
 18 *    notice, this list of conditions and the following disclaimer in
 19 *    the documentation and/or other materials provided with the
 20 *    distribution.
 21 *
 22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
 29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
 31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
 32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33 */
 34
 35#include <linux/types.h>
 36#include <linux/kernel.h>
 37#include <linux/mm.h>
 38#include <linux/delay.h>
 39
 40#include <asm/mipsregs.h>
 41#include <asm/time.h>
 42
 43#include <asm/netlogic/haldefs.h>
 44#include <asm/netlogic/xlp-hal/iomap.h>
 45#include <asm/netlogic/xlp-hal/xlp.h>
 46#include <asm/netlogic/xlp-hal/pic.h>
 47#include <asm/netlogic/xlp-hal/sys.h>
 48
 49/* These addresses are computed by the nlm_hal_init() */
 50uint64_t nlm_io_base;
 51uint64_t nlm_sys_base;
 52uint64_t nlm_pic_base;
 53
 54/* Main initialization */
 55void nlm_hal_init(void)
 56{
 57	nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
 58	nlm_sys_base = nlm_get_sys_regbase(0);	/* node 0 */
 59	nlm_pic_base = nlm_get_pic_regbase(0);	/* node 0 */
 60}
 61
 62int nlm_irq_to_irt(int irq)
 63{
 64	if (!PIC_IRQ_IS_IRT(irq))
 65		return -1;
 66
 67	switch (irq) {
 68	case PIC_UART_0_IRQ:
 69		return PIC_IRT_UART_0_INDEX;
 70	case PIC_UART_1_IRQ:
 71		return PIC_IRT_UART_1_INDEX;
 72	default:
 73		return -1;
 74	}
 75}
 76
 77int nlm_irt_to_irq(int irt)
 78{
 79	switch (irt) {
 80	case PIC_IRT_UART_0_INDEX:
 81		return PIC_UART_0_IRQ;
 82	case PIC_IRT_UART_1_INDEX:
 83		return PIC_UART_1_IRQ;
 84	default:
 85		return -1;
 86	}
 87}
 88
 89unsigned int nlm_get_core_frequency(int core)
 90{
 91	unsigned int pll_divf, pll_divr, dfs_div, ext_div;
 92	unsigned int rstval, dfsval, denom;
 93	uint64_t num;
 94
 95	rstval = nlm_read_sys_reg(nlm_sys_base, SYS_POWER_ON_RESET_CFG);
 96	dfsval = nlm_read_sys_reg(nlm_sys_base, SYS_CORE_DFS_DIV_VALUE);
 97	pll_divf = ((rstval >> 10) & 0x7f) + 1;
 98	pll_divr = ((rstval >> 8)  & 0x3) + 1;
 99	ext_div  = ((rstval >> 30) & 0x3) + 1;
100	dfs_div  = ((dfsval >> (core * 4)) & 0xf) + 1;
101
102	num = 800000000ULL * pll_divf;
103	denom = 3 * pll_divr * ext_div * dfs_div;
104	do_div(num, denom);
105	return (unsigned int)num;
106}
107
108unsigned int nlm_get_cpu_frequency(void)
109{
110	return nlm_get_core_frequency(0);
111}