1/***********************license start***************
  2 * Author: Cavium Networks
  3 *
  4 * Contact: support@caviumnetworks.com
  5 * This file is part of the OCTEON SDK
  6 *
  7 * Copyright (c) 2003-2010 Cavium Networks
  8 *
  9 * This file is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License, Version 2, as
 11 * published by the Free Software Foundation.
 12 *
 13 * This file is distributed in the hope that it will be useful, but
 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 16 * NONINFRINGEMENT.  See the GNU General Public License for more
 17 * details.
 18 *
 19 * You should have received a copy of the GNU General Public License
 20 * along with this file; if not, write to the Free Software
 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 22 * or visit http://www.gnu.org/licenses/.
 23 *
 24 * This file may also be available under a different license from Cavium.
 25 * Contact Cavium Networks for more information
 26 ***********************license end**************************************/
 27
 28#ifndef __CVMX_IPD_DEFS_H__
 29#define __CVMX_IPD_DEFS_H__
 30
 31#define CVMX_IPD_1ST_MBUFF_SKIP (CVMX_ADD_IO_SEG(0x00014F0000000000ull))
 32#define CVMX_IPD_1st_NEXT_PTR_BACK (CVMX_ADD_IO_SEG(0x00014F0000000150ull))
 33#define CVMX_IPD_2nd_NEXT_PTR_BACK (CVMX_ADD_IO_SEG(0x00014F0000000158ull))
 34#define CVMX_IPD_BIST_STATUS (CVMX_ADD_IO_SEG(0x00014F00000007F8ull))
 35#define CVMX_IPD_BP_PRT_RED_END (CVMX_ADD_IO_SEG(0x00014F0000000328ull))
 36#define CVMX_IPD_CLK_COUNT (CVMX_ADD_IO_SEG(0x00014F0000000338ull))
 37#define CVMX_IPD_CTL_STATUS (CVMX_ADD_IO_SEG(0x00014F0000000018ull))
 38#define CVMX_IPD_INT_ENB (CVMX_ADD_IO_SEG(0x00014F0000000160ull))
 39#define CVMX_IPD_INT_SUM (CVMX_ADD_IO_SEG(0x00014F0000000168ull))
 40#define CVMX_IPD_NOT_1ST_MBUFF_SKIP (CVMX_ADD_IO_SEG(0x00014F0000000008ull))
 41#define CVMX_IPD_PACKET_MBUFF_SIZE (CVMX_ADD_IO_SEG(0x00014F0000000010ull))
 42#define CVMX_IPD_PKT_PTR_VALID (CVMX_ADD_IO_SEG(0x00014F0000000358ull))
 43#define CVMX_IPD_PORTX_BP_PAGE_CNT(offset) (CVMX_ADD_IO_SEG(0x00014F0000000028ull) + ((offset) & 63) * 8)
 44#define CVMX_IPD_PORTX_BP_PAGE_CNT2(offset) (CVMX_ADD_IO_SEG(0x00014F0000000368ull) + ((offset) & 63) * 8 - 8*36)
 45#define CVMX_IPD_PORTX_BP_PAGE_CNT3(offset) (CVMX_ADD_IO_SEG(0x00014F00000003D0ull) + ((offset) & 63) * 8 - 8*40)
 46#define CVMX_IPD_PORT_BP_COUNTERS2_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000388ull) + ((offset) & 63) * 8 - 8*36)
 47#define CVMX_IPD_PORT_BP_COUNTERS3_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F00000003B0ull) + ((offset) & 63) * 8 - 8*40)
 48#define CVMX_IPD_PORT_BP_COUNTERS_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F00000001B8ull) + ((offset) & 63) * 8)
 49#define CVMX_IPD_PORT_QOS_INTX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000808ull) + ((offset) & 7) * 8)
 50#define CVMX_IPD_PORT_QOS_INT_ENBX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000848ull) + ((offset) & 7) * 8)
 51#define CVMX_IPD_PORT_QOS_X_CNT(offset) (CVMX_ADD_IO_SEG(0x00014F0000000888ull) + ((offset) & 511) * 8)
 52#define CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000348ull))
 53#define CVMX_IPD_PRC_PORT_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000350ull))
 54#define CVMX_IPD_PTR_COUNT (CVMX_ADD_IO_SEG(0x00014F0000000320ull))
 55#define CVMX_IPD_PWP_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000340ull))
 56#define CVMX_IPD_QOS0_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(0)
 57#define CVMX_IPD_QOS1_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(1)
 58#define CVMX_IPD_QOS2_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(2)
 59#define CVMX_IPD_QOS3_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(3)
 60#define CVMX_IPD_QOS4_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(4)
 61#define CVMX_IPD_QOS5_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(5)
 62#define CVMX_IPD_QOS6_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(6)
 63#define CVMX_IPD_QOS7_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(7)
 64#define CVMX_IPD_QOSX_RED_MARKS(offset) (CVMX_ADD_IO_SEG(0x00014F0000000178ull) + ((offset) & 7) * 8)
 65#define CVMX_IPD_QUE0_FREE_PAGE_CNT (CVMX_ADD_IO_SEG(0x00014F0000000330ull))
 66#define CVMX_IPD_RED_PORT_ENABLE (CVMX_ADD_IO_SEG(0x00014F00000002D8ull))
 67#define CVMX_IPD_RED_PORT_ENABLE2 (CVMX_ADD_IO_SEG(0x00014F00000003A8ull))
 68#define CVMX_IPD_RED_QUE0_PARAM CVMX_IPD_RED_QUEX_PARAM(0)
 69#define CVMX_IPD_RED_QUE1_PARAM CVMX_IPD_RED_QUEX_PARAM(1)
 70#define CVMX_IPD_RED_QUE2_PARAM CVMX_IPD_RED_QUEX_PARAM(2)
 71#define CVMX_IPD_RED_QUE3_PARAM CVMX_IPD_RED_QUEX_PARAM(3)
 72#define CVMX_IPD_RED_QUE4_PARAM CVMX_IPD_RED_QUEX_PARAM(4)
 73#define CVMX_IPD_RED_QUE5_PARAM CVMX_IPD_RED_QUEX_PARAM(5)
 74#define CVMX_IPD_RED_QUE6_PARAM CVMX_IPD_RED_QUEX_PARAM(6)
 75#define CVMX_IPD_RED_QUE7_PARAM CVMX_IPD_RED_QUEX_PARAM(7)
 76#define CVMX_IPD_RED_QUEX_PARAM(offset) (CVMX_ADD_IO_SEG(0x00014F00000002E0ull) + ((offset) & 7) * 8)
 77#define CVMX_IPD_SUB_PORT_BP_PAGE_CNT (CVMX_ADD_IO_SEG(0x00014F0000000148ull))
 78#define CVMX_IPD_SUB_PORT_FCS (CVMX_ADD_IO_SEG(0x00014F0000000170ull))
 79#define CVMX_IPD_SUB_PORT_QOS_CNT (CVMX_ADD_IO_SEG(0x00014F0000000800ull))
 80#define CVMX_IPD_WQE_FPA_QUEUE (CVMX_ADD_IO_SEG(0x00014F0000000020ull))
 81#define CVMX_IPD_WQE_PTR_VALID (CVMX_ADD_IO_SEG(0x00014F0000000360ull))
 82
 83union cvmx_ipd_1st_mbuff_skip {
 84	uint64_t u64;
 85	struct cvmx_ipd_1st_mbuff_skip_s {
 86		uint64_t reserved_6_63:58;
 87		uint64_t skip_sz:6;
 88	} s;
 89	struct cvmx_ipd_1st_mbuff_skip_s cn30xx;
 90	struct cvmx_ipd_1st_mbuff_skip_s cn31xx;
 91	struct cvmx_ipd_1st_mbuff_skip_s cn38xx;
 92	struct cvmx_ipd_1st_mbuff_skip_s cn38xxp2;
 93	struct cvmx_ipd_1st_mbuff_skip_s cn50xx;
 94	struct cvmx_ipd_1st_mbuff_skip_s cn52xx;
 95	struct cvmx_ipd_1st_mbuff_skip_s cn52xxp1;
 96	struct cvmx_ipd_1st_mbuff_skip_s cn56xx;
 97	struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1;
 98	struct cvmx_ipd_1st_mbuff_skip_s cn58xx;
 99	struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1;
100	struct cvmx_ipd_1st_mbuff_skip_s cn63xx;
101	struct cvmx_ipd_1st_mbuff_skip_s cn63xxp1;
102};
103
104union cvmx_ipd_1st_next_ptr_back {
105	uint64_t u64;
106	struct cvmx_ipd_1st_next_ptr_back_s {
107		uint64_t reserved_4_63:60;
108		uint64_t back:4;
109	} s;
110	struct cvmx_ipd_1st_next_ptr_back_s cn30xx;
111	struct cvmx_ipd_1st_next_ptr_back_s cn31xx;
112	struct cvmx_ipd_1st_next_ptr_back_s cn38xx;
113	struct cvmx_ipd_1st_next_ptr_back_s cn38xxp2;
114	struct cvmx_ipd_1st_next_ptr_back_s cn50xx;
115	struct cvmx_ipd_1st_next_ptr_back_s cn52xx;
116	struct cvmx_ipd_1st_next_ptr_back_s cn52xxp1;
117	struct cvmx_ipd_1st_next_ptr_back_s cn56xx;
118	struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1;
119	struct cvmx_ipd_1st_next_ptr_back_s cn58xx;
120	struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1;
121	struct cvmx_ipd_1st_next_ptr_back_s cn63xx;
122	struct cvmx_ipd_1st_next_ptr_back_s cn63xxp1;
123};
124
125union cvmx_ipd_2nd_next_ptr_back {
126	uint64_t u64;
127	struct cvmx_ipd_2nd_next_ptr_back_s {
128		uint64_t reserved_4_63:60;
129		uint64_t back:4;
130	} s;
131	struct cvmx_ipd_2nd_next_ptr_back_s cn30xx;
132	struct cvmx_ipd_2nd_next_ptr_back_s cn31xx;
133	struct cvmx_ipd_2nd_next_ptr_back_s cn38xx;
134	struct cvmx_ipd_2nd_next_ptr_back_s cn38xxp2;
135	struct cvmx_ipd_2nd_next_ptr_back_s cn50xx;
136	struct cvmx_ipd_2nd_next_ptr_back_s cn52xx;
137	struct cvmx_ipd_2nd_next_ptr_back_s cn52xxp1;
138	struct cvmx_ipd_2nd_next_ptr_back_s cn56xx;
139	struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1;
140	struct cvmx_ipd_2nd_next_ptr_back_s cn58xx;
141	struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1;
142	struct cvmx_ipd_2nd_next_ptr_back_s cn63xx;
143	struct cvmx_ipd_2nd_next_ptr_back_s cn63xxp1;
144};
145
146union cvmx_ipd_bist_status {
147	uint64_t u64;
148	struct cvmx_ipd_bist_status_s {
149		uint64_t reserved_18_63:46;
150		uint64_t csr_mem:1;
151		uint64_t csr_ncmd:1;
152		uint64_t pwq_wqed:1;
153		uint64_t pwq_wp1:1;
154		uint64_t pwq_pow:1;
155		uint64_t ipq_pbe1:1;
156		uint64_t ipq_pbe0:1;
157		uint64_t pbm3:1;
158		uint64_t pbm2:1;
159		uint64_t pbm1:1;
160		uint64_t pbm0:1;
161		uint64_t pbm_word:1;
162		uint64_t pwq1:1;
163		uint64_t pwq0:1;
164		uint64_t prc_off:1;
165		uint64_t ipd_old:1;
166		uint64_t ipd_new:1;
167		uint64_t pwp:1;
168	} s;
169	struct cvmx_ipd_bist_status_cn30xx {
170		uint64_t reserved_16_63:48;
171		uint64_t pwq_wqed:1;
172		uint64_t pwq_wp1:1;
173		uint64_t pwq_pow:1;
174		uint64_t ipq_pbe1:1;
175		uint64_t ipq_pbe0:1;
176		uint64_t pbm3:1;
177		uint64_t pbm2:1;
178		uint64_t pbm1:1;
179		uint64_t pbm0:1;
180		uint64_t pbm_word:1;
181		uint64_t pwq1:1;
182		uint64_t pwq0:1;
183		uint64_t prc_off:1;
184		uint64_t ipd_old:1;
185		uint64_t ipd_new:1;
186		uint64_t pwp:1;
187	} cn30xx;
188	struct cvmx_ipd_bist_status_cn30xx cn31xx;
189	struct cvmx_ipd_bist_status_cn30xx cn38xx;
190	struct cvmx_ipd_bist_status_cn30xx cn38xxp2;
191	struct cvmx_ipd_bist_status_cn30xx cn50xx;
192	struct cvmx_ipd_bist_status_s cn52xx;
193	struct cvmx_ipd_bist_status_s cn52xxp1;
194	struct cvmx_ipd_bist_status_s cn56xx;
195	struct cvmx_ipd_bist_status_s cn56xxp1;
196	struct cvmx_ipd_bist_status_cn30xx cn58xx;
197	struct cvmx_ipd_bist_status_cn30xx cn58xxp1;
198	struct cvmx_ipd_bist_status_s cn63xx;
199	struct cvmx_ipd_bist_status_s cn63xxp1;
200};
201
202union cvmx_ipd_bp_prt_red_end {
203	uint64_t u64;
204	struct cvmx_ipd_bp_prt_red_end_s {
205		uint64_t reserved_44_63:20;
206		uint64_t prt_enb:44;
207	} s;
208	struct cvmx_ipd_bp_prt_red_end_cn30xx {
209		uint64_t reserved_36_63:28;
210		uint64_t prt_enb:36;
211	} cn30xx;
212	struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx;
213	struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx;
214	struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2;
215	struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx;
216	struct cvmx_ipd_bp_prt_red_end_cn52xx {
217		uint64_t reserved_40_63:24;
218		uint64_t prt_enb:40;
219	} cn52xx;
220	struct cvmx_ipd_bp_prt_red_end_cn52xx cn52xxp1;
221	struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xx;
222	struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xxp1;
223	struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx;
224	struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1;
225	struct cvmx_ipd_bp_prt_red_end_s cn63xx;
226	struct cvmx_ipd_bp_prt_red_end_s cn63xxp1;
227};
228
229union cvmx_ipd_clk_count {
230	uint64_t u64;
231	struct cvmx_ipd_clk_count_s {
232		uint64_t clk_cnt:64;
233	} s;
234	struct cvmx_ipd_clk_count_s cn30xx;
235	struct cvmx_ipd_clk_count_s cn31xx;
236	struct cvmx_ipd_clk_count_s cn38xx;
237	struct cvmx_ipd_clk_count_s cn38xxp2;
238	struct cvmx_ipd_clk_count_s cn50xx;
239	struct cvmx_ipd_clk_count_s cn52xx;
240	struct cvmx_ipd_clk_count_s cn52xxp1;
241	struct cvmx_ipd_clk_count_s cn56xx;
242	struct cvmx_ipd_clk_count_s cn56xxp1;
243	struct cvmx_ipd_clk_count_s cn58xx;
244	struct cvmx_ipd_clk_count_s cn58xxp1;
245	struct cvmx_ipd_clk_count_s cn63xx;
246	struct cvmx_ipd_clk_count_s cn63xxp1;
247};
248
249union cvmx_ipd_ctl_status {
250	uint64_t u64;
251	struct cvmx_ipd_ctl_status_s {
252		uint64_t reserved_18_63:46;
253		uint64_t use_sop:1;
254		uint64_t rst_done:1;
255		uint64_t clken:1;
256		uint64_t no_wptr:1;
257		uint64_t pq_apkt:1;
258		uint64_t pq_nabuf:1;
259		uint64_t ipd_full:1;
260		uint64_t pkt_off:1;
261		uint64_t len_m8:1;
262		uint64_t reset:1;
263		uint64_t addpkt:1;
264		uint64_t naddbuf:1;
265		uint64_t pkt_lend:1;
266		uint64_t wqe_lend:1;
267		uint64_t pbp_en:1;
268		uint64_t opc_mode:2;
269		uint64_t ipd_en:1;
270	} s;
271	struct cvmx_ipd_ctl_status_cn30xx {
272		uint64_t reserved_10_63:54;
273		uint64_t len_m8:1;
274		uint64_t reset:1;
275		uint64_t addpkt:1;
276		uint64_t naddbuf:1;
277		uint64_t pkt_lend:1;
278		uint64_t wqe_lend:1;
279		uint64_t pbp_en:1;
280		uint64_t opc_mode:2;
281		uint64_t ipd_en:1;
282	} cn30xx;
283	struct cvmx_ipd_ctl_status_cn30xx cn31xx;
284	struct cvmx_ipd_ctl_status_cn30xx cn38xx;
285	struct cvmx_ipd_ctl_status_cn38xxp2 {
286		uint64_t reserved_9_63:55;
287		uint64_t reset:1;
288		uint64_t addpkt:1;
289		uint64_t naddbuf:1;
290		uint64_t pkt_lend:1;
291		uint64_t wqe_lend:1;
292		uint64_t pbp_en:1;
293		uint64_t opc_mode:2;
294		uint64_t ipd_en:1;
295	} cn38xxp2;
296	struct cvmx_ipd_ctl_status_cn50xx {
297		uint64_t reserved_15_63:49;
298		uint64_t no_wptr:1;
299		uint64_t pq_apkt:1;
300		uint64_t pq_nabuf:1;
301		uint64_t ipd_full:1;
302		uint64_t pkt_off:1;
303		uint64_t len_m8:1;
304		uint64_t reset:1;
305		uint64_t addpkt:1;
306		uint64_t naddbuf:1;
307		uint64_t pkt_lend:1;
308		uint64_t wqe_lend:1;
309		uint64_t pbp_en:1;
310		uint64_t opc_mode:2;
311		uint64_t ipd_en:1;
312	} cn50xx;
313	struct cvmx_ipd_ctl_status_cn50xx cn52xx;
314	struct cvmx_ipd_ctl_status_cn50xx cn52xxp1;
315	struct cvmx_ipd_ctl_status_cn50xx cn56xx;
316	struct cvmx_ipd_ctl_status_cn50xx cn56xxp1;
317	struct cvmx_ipd_ctl_status_cn58xx {
318		uint64_t reserved_12_63:52;
319		uint64_t ipd_full:1;
320		uint64_t pkt_off:1;
321		uint64_t len_m8:1;
322		uint64_t reset:1;
323		uint64_t addpkt:1;
324		uint64_t naddbuf:1;
325		uint64_t pkt_lend:1;
326		uint64_t wqe_lend:1;
327		uint64_t pbp_en:1;
328		uint64_t opc_mode:2;
329		uint64_t ipd_en:1;
330	} cn58xx;
331	struct cvmx_ipd_ctl_status_cn58xx cn58xxp1;
332	struct cvmx_ipd_ctl_status_s cn63xx;
333	struct cvmx_ipd_ctl_status_cn63xxp1 {
334		uint64_t reserved_16_63:48;
335		uint64_t clken:1;
336		uint64_t no_wptr:1;
337		uint64_t pq_apkt:1;
338		uint64_t pq_nabuf:1;
339		uint64_t ipd_full:1;
340		uint64_t pkt_off:1;
341		uint64_t len_m8:1;
342		uint64_t reset:1;
343		uint64_t addpkt:1;
344		uint64_t naddbuf:1;
345		uint64_t pkt_lend:1;
346		uint64_t wqe_lend:1;
347		uint64_t pbp_en:1;
348		uint64_t opc_mode:2;
349		uint64_t ipd_en:1;
350	} cn63xxp1;
351};
352
353union cvmx_ipd_int_enb {
354	uint64_t u64;
355	struct cvmx_ipd_int_enb_s {
356		uint64_t reserved_12_63:52;
357		uint64_t pq_sub:1;
358		uint64_t pq_add:1;
359		uint64_t bc_ovr:1;
360		uint64_t d_coll:1;
361		uint64_t c_coll:1;
362		uint64_t cc_ovr:1;
363		uint64_t dc_ovr:1;
364		uint64_t bp_sub:1;
365		uint64_t prc_par3:1;
366		uint64_t prc_par2:1;
367		uint64_t prc_par1:1;
368		uint64_t prc_par0:1;
369	} s;
370	struct cvmx_ipd_int_enb_cn30xx {
371		uint64_t reserved_5_63:59;
372		uint64_t bp_sub:1;
373		uint64_t prc_par3:1;
374		uint64_t prc_par2:1;
375		uint64_t prc_par1:1;
376		uint64_t prc_par0:1;
377	} cn30xx;
378	struct cvmx_ipd_int_enb_cn30xx cn31xx;
379	struct cvmx_ipd_int_enb_cn38xx {
380		uint64_t reserved_10_63:54;
381		uint64_t bc_ovr:1;
382		uint64_t d_coll:1;
383		uint64_t c_coll:1;
384		uint64_t cc_ovr:1;
385		uint64_t dc_ovr:1;
386		uint64_t bp_sub:1;
387		uint64_t prc_par3:1;
388		uint64_t prc_par2:1;
389		uint64_t prc_par1:1;
390		uint64_t prc_par0:1;
391	} cn38xx;
392	struct cvmx_ipd_int_enb_cn30xx cn38xxp2;
393	struct cvmx_ipd_int_enb_cn38xx cn50xx;
394	struct cvmx_ipd_int_enb_s cn52xx;
395	struct cvmx_ipd_int_enb_s cn52xxp1;
396	struct cvmx_ipd_int_enb_s cn56xx;
397	struct cvmx_ipd_int_enb_s cn56xxp1;
398	struct cvmx_ipd_int_enb_cn38xx cn58xx;
399	struct cvmx_ipd_int_enb_cn38xx cn58xxp1;
400	struct cvmx_ipd_int_enb_s cn63xx;
401	struct cvmx_ipd_int_enb_s cn63xxp1;
402};
403
404union cvmx_ipd_int_sum {
405	uint64_t u64;
406	struct cvmx_ipd_int_sum_s {
407		uint64_t reserved_12_63:52;
408		uint64_t pq_sub:1;
409		uint64_t pq_add:1;
410		uint64_t bc_ovr:1;
411		uint64_t d_coll:1;
412		uint64_t c_coll:1;
413		uint64_t cc_ovr:1;
414		uint64_t dc_ovr:1;
415		uint64_t bp_sub:1;
416		uint64_t prc_par3:1;
417		uint64_t prc_par2:1;
418		uint64_t prc_par1:1;
419		uint64_t prc_par0:1;
420	} s;
421	struct cvmx_ipd_int_sum_cn30xx {
422		uint64_t reserved_5_63:59;
423		uint64_t bp_sub:1;
424		uint64_t prc_par3:1;
425		uint64_t prc_par2:1;
426		uint64_t prc_par1:1;
427		uint64_t prc_par0:1;
428	} cn30xx;
429	struct cvmx_ipd_int_sum_cn30xx cn31xx;
430	struct cvmx_ipd_int_sum_cn38xx {
431		uint64_t reserved_10_63:54;
432		uint64_t bc_ovr:1;
433		uint64_t d_coll:1;
434		uint64_t c_coll:1;
435		uint64_t cc_ovr:1;
436		uint64_t dc_ovr:1;
437		uint64_t bp_sub:1;
438		uint64_t prc_par3:1;
439		uint64_t prc_par2:1;
440		uint64_t prc_par1:1;
441		uint64_t prc_par0:1;
442	} cn38xx;
443	struct cvmx_ipd_int_sum_cn30xx cn38xxp2;
444	struct cvmx_ipd_int_sum_cn38xx cn50xx;
445	struct cvmx_ipd_int_sum_s cn52xx;
446	struct cvmx_ipd_int_sum_s cn52xxp1;
447	struct cvmx_ipd_int_sum_s cn56xx;
448	struct cvmx_ipd_int_sum_s cn56xxp1;
449	struct cvmx_ipd_int_sum_cn38xx cn58xx;
450	struct cvmx_ipd_int_sum_cn38xx cn58xxp1;
451	struct cvmx_ipd_int_sum_s cn63xx;
452	struct cvmx_ipd_int_sum_s cn63xxp1;
453};
454
455union cvmx_ipd_not_1st_mbuff_skip {
456	uint64_t u64;
457	struct cvmx_ipd_not_1st_mbuff_skip_s {
458		uint64_t reserved_6_63:58;
459		uint64_t skip_sz:6;
460	} s;
461	struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx;
462	struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx;
463	struct cvmx_ipd_not_1st_mbuff_skip_s cn38xx;
464	struct cvmx_ipd_not_1st_mbuff_skip_s cn38xxp2;
465	struct cvmx_ipd_not_1st_mbuff_skip_s cn50xx;
466	struct cvmx_ipd_not_1st_mbuff_skip_s cn52xx;
467	struct cvmx_ipd_not_1st_mbuff_skip_s cn52xxp1;
468	struct cvmx_ipd_not_1st_mbuff_skip_s cn56xx;
469	struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1;
470	struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx;
471	struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1;
472	struct cvmx_ipd_not_1st_mbuff_skip_s cn63xx;
473	struct cvmx_ipd_not_1st_mbuff_skip_s cn63xxp1;
474};
475
476union cvmx_ipd_packet_mbuff_size {
477	uint64_t u64;
478	struct cvmx_ipd_packet_mbuff_size_s {
479		uint64_t reserved_12_63:52;
480		uint64_t mb_size:12;
481	} s;
482	struct cvmx_ipd_packet_mbuff_size_s cn30xx;
483	struct cvmx_ipd_packet_mbuff_size_s cn31xx;
484	struct cvmx_ipd_packet_mbuff_size_s cn38xx;
485	struct cvmx_ipd_packet_mbuff_size_s cn38xxp2;
486	struct cvmx_ipd_packet_mbuff_size_s cn50xx;
487	struct cvmx_ipd_packet_mbuff_size_s cn52xx;
488	struct cvmx_ipd_packet_mbuff_size_s cn52xxp1;
489	struct cvmx_ipd_packet_mbuff_size_s cn56xx;
490	struct cvmx_ipd_packet_mbuff_size_s cn56xxp1;
491	struct cvmx_ipd_packet_mbuff_size_s cn58xx;
492	struct cvmx_ipd_packet_mbuff_size_s cn58xxp1;
493	struct cvmx_ipd_packet_mbuff_size_s cn63xx;
494	struct cvmx_ipd_packet_mbuff_size_s cn63xxp1;
495};
496
497union cvmx_ipd_pkt_ptr_valid {
498	uint64_t u64;
499	struct cvmx_ipd_pkt_ptr_valid_s {
500		uint64_t reserved_29_63:35;
501		uint64_t ptr:29;
502	} s;
503	struct cvmx_ipd_pkt_ptr_valid_s cn30xx;
504	struct cvmx_ipd_pkt_ptr_valid_s cn31xx;
505	struct cvmx_ipd_pkt_ptr_valid_s cn38xx;
506	struct cvmx_ipd_pkt_ptr_valid_s cn50xx;
507	struct cvmx_ipd_pkt_ptr_valid_s cn52xx;
508	struct cvmx_ipd_pkt_ptr_valid_s cn52xxp1;
509	struct cvmx_ipd_pkt_ptr_valid_s cn56xx;
510	struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1;
511	struct cvmx_ipd_pkt_ptr_valid_s cn58xx;
512	struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1;
513	struct cvmx_ipd_pkt_ptr_valid_s cn63xx;
514	struct cvmx_ipd_pkt_ptr_valid_s cn63xxp1;
515};
516
517union cvmx_ipd_portx_bp_page_cnt {
518	uint64_t u64;
519	struct cvmx_ipd_portx_bp_page_cnt_s {
520		uint64_t reserved_18_63:46;
521		uint64_t bp_enb:1;
522		uint64_t page_cnt:17;
523	} s;
524	struct cvmx_ipd_portx_bp_page_cnt_s cn30xx;
525	struct cvmx_ipd_portx_bp_page_cnt_s cn31xx;
526	struct cvmx_ipd_portx_bp_page_cnt_s cn38xx;
527	struct cvmx_ipd_portx_bp_page_cnt_s cn38xxp2;
528	struct cvmx_ipd_portx_bp_page_cnt_s cn50xx;
529	struct cvmx_ipd_portx_bp_page_cnt_s cn52xx;
530	struct cvmx_ipd_portx_bp_page_cnt_s cn52xxp1;
531	struct cvmx_ipd_portx_bp_page_cnt_s cn56xx;
532	struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1;
533	struct cvmx_ipd_portx_bp_page_cnt_s cn58xx;
534	struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1;
535	struct cvmx_ipd_portx_bp_page_cnt_s cn63xx;
536	struct cvmx_ipd_portx_bp_page_cnt_s cn63xxp1;
537};
538
539union cvmx_ipd_portx_bp_page_cnt2 {
540	uint64_t u64;
541	struct cvmx_ipd_portx_bp_page_cnt2_s {
542		uint64_t reserved_18_63:46;
543		uint64_t bp_enb:1;
544		uint64_t page_cnt:17;
545	} s;
546	struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx;
547	struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1;
548	struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx;
549	struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1;
550	struct cvmx_ipd_portx_bp_page_cnt2_s cn63xx;
551	struct cvmx_ipd_portx_bp_page_cnt2_s cn63xxp1;
552};
553
554union cvmx_ipd_portx_bp_page_cnt3 {
555	uint64_t u64;
556	struct cvmx_ipd_portx_bp_page_cnt3_s {
557		uint64_t reserved_18_63:46;
558		uint64_t bp_enb:1;
559		uint64_t page_cnt:17;
560	} s;
561	struct cvmx_ipd_portx_bp_page_cnt3_s cn63xx;
562	struct cvmx_ipd_portx_bp_page_cnt3_s cn63xxp1;
563};
564
565union cvmx_ipd_port_bp_counters2_pairx {
566	uint64_t u64;
567	struct cvmx_ipd_port_bp_counters2_pairx_s {
568		uint64_t reserved_25_63:39;
569		uint64_t cnt_val:25;
570	} s;
571	struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx;
572	struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1;
573	struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx;
574	struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1;
575	struct cvmx_ipd_port_bp_counters2_pairx_s cn63xx;
576	struct cvmx_ipd_port_bp_counters2_pairx_s cn63xxp1;
577};
578
579union cvmx_ipd_port_bp_counters3_pairx {
580	uint64_t u64;
581	struct cvmx_ipd_port_bp_counters3_pairx_s {
582		uint64_t reserved_25_63:39;
583		uint64_t cnt_val:25;
584	} s;
585	struct cvmx_ipd_port_bp_counters3_pairx_s cn63xx;
586	struct cvmx_ipd_port_bp_counters3_pairx_s cn63xxp1;
587};
588
589union cvmx_ipd_port_bp_counters_pairx {
590	uint64_t u64;
591	struct cvmx_ipd_port_bp_counters_pairx_s {
592		uint64_t reserved_25_63:39;
593		uint64_t cnt_val:25;
594	} s;
595	struct cvmx_ipd_port_bp_counters_pairx_s cn30xx;
596	struct cvmx_ipd_port_bp_counters_pairx_s cn31xx;
597	struct cvmx_ipd_port_bp_counters_pairx_s cn38xx;
598	struct cvmx_ipd_port_bp_counters_pairx_s cn38xxp2;
599	struct cvmx_ipd_port_bp_counters_pairx_s cn50xx;
600	struct cvmx_ipd_port_bp_counters_pairx_s cn52xx;
601	struct cvmx_ipd_port_bp_counters_pairx_s cn52xxp1;
602	struct cvmx_ipd_port_bp_counters_pairx_s cn56xx;
603	struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1;
604	struct cvmx_ipd_port_bp_counters_pairx_s cn58xx;
605	struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1;
606	struct cvmx_ipd_port_bp_counters_pairx_s cn63xx;
607	struct cvmx_ipd_port_bp_counters_pairx_s cn63xxp1;
608};
609
610union cvmx_ipd_port_qos_x_cnt {
611	uint64_t u64;
612	struct cvmx_ipd_port_qos_x_cnt_s {
613		uint64_t wmark:32;
614		uint64_t cnt:32;
615	} s;
616	struct cvmx_ipd_port_qos_x_cnt_s cn52xx;
617	struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1;
618	struct cvmx_ipd_port_qos_x_cnt_s cn56xx;
619	struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1;
620	struct cvmx_ipd_port_qos_x_cnt_s cn63xx;
621	struct cvmx_ipd_port_qos_x_cnt_s cn63xxp1;
622};
623
624union cvmx_ipd_port_qos_intx {
625	uint64_t u64;
626	struct cvmx_ipd_port_qos_intx_s {
627		uint64_t intr:64;
628	} s;
629	struct cvmx_ipd_port_qos_intx_s cn52xx;
630	struct cvmx_ipd_port_qos_intx_s cn52xxp1;
631	struct cvmx_ipd_port_qos_intx_s cn56xx;
632	struct cvmx_ipd_port_qos_intx_s cn56xxp1;
633	struct cvmx_ipd_port_qos_intx_s cn63xx;
634	struct cvmx_ipd_port_qos_intx_s cn63xxp1;
635};
636
637union cvmx_ipd_port_qos_int_enbx {
638	uint64_t u64;
639	struct cvmx_ipd_port_qos_int_enbx_s {
640		uint64_t enb:64;
641	} s;
642	struct cvmx_ipd_port_qos_int_enbx_s cn52xx;
643	struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1;
644	struct cvmx_ipd_port_qos_int_enbx_s cn56xx;
645	struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1;
646	struct cvmx_ipd_port_qos_int_enbx_s cn63xx;
647	struct cvmx_ipd_port_qos_int_enbx_s cn63xxp1;
648};
649
650union cvmx_ipd_prc_hold_ptr_fifo_ctl {
651	uint64_t u64;
652	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s {
653		uint64_t reserved_39_63:25;
654		uint64_t max_pkt:3;
655		uint64_t praddr:3;
656		uint64_t ptr:29;
657		uint64_t cena:1;
658		uint64_t raddr:3;
659	} s;
660	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx;
661	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx;
662	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn38xx;
663	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn50xx;
664	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xx;
665	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xxp1;
666	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xx;
667	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1;
668	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx;
669	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1;
670	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xx;
671	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xxp1;
672};
673
674union cvmx_ipd_prc_port_ptr_fifo_ctl {
675	uint64_t u64;
676	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s {
677		uint64_t reserved_44_63:20;
678		uint64_t max_pkt:7;
679		uint64_t ptr:29;
680		uint64_t cena:1;
681		uint64_t raddr:7;
682	} s;
683	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx;
684	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx;
685	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn38xx;
686	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn50xx;
687	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xx;
688	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xxp1;
689	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xx;
690	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1;
691	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx;
692	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1;
693	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xx;
694	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xxp1;
695};
696
697union cvmx_ipd_ptr_count {
698	uint64_t u64;
699	struct cvmx_ipd_ptr_count_s {
700		uint64_t reserved_19_63:45;
701		uint64_t pktv_cnt:1;
702		uint64_t wqev_cnt:1;
703		uint64_t pfif_cnt:3;
704		uint64_t pkt_pcnt:7;
705		uint64_t wqe_pcnt:7;
706	} s;
707	struct cvmx_ipd_ptr_count_s cn30xx;
708	struct cvmx_ipd_ptr_count_s cn31xx;
709	struct cvmx_ipd_ptr_count_s cn38xx;
710	struct cvmx_ipd_ptr_count_s cn38xxp2;
711	struct cvmx_ipd_ptr_count_s cn50xx;
712	struct cvmx_ipd_ptr_count_s cn52xx;
713	struct cvmx_ipd_ptr_count_s cn52xxp1;
714	struct cvmx_ipd_ptr_count_s cn56xx;
715	struct cvmx_ipd_ptr_count_s cn56xxp1;
716	struct cvmx_ipd_ptr_count_s cn58xx;
717	struct cvmx_ipd_ptr_count_s cn58xxp1;
718	struct cvmx_ipd_ptr_count_s cn63xx;
719	struct cvmx_ipd_ptr_count_s cn63xxp1;
720};
721
722union cvmx_ipd_pwp_ptr_fifo_ctl {
723	uint64_t u64;
724	struct cvmx_ipd_pwp_ptr_fifo_ctl_s {
725		uint64_t reserved_61_63:3;
726		uint64_t max_cnts:7;
727		uint64_t wraddr:8;
728		uint64_t praddr:8;
729		uint64_t ptr:29;
730		uint64_t cena:1;
731		uint64_t raddr:8;
732	} s;
733	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx;
734	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx;
735	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn38xx;
736	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn50xx;
737	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xx;
738	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xxp1;
739	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xx;
740	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1;
741	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx;
742	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1;
743	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xx;
744	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xxp1;
745};
746
747union cvmx_ipd_qosx_red_marks {
748	uint64_t u64;
749	struct cvmx_ipd_qosx_red_marks_s {
750		uint64_t drop:32;
751		uint64_t pass:32;
752	} s;
753	struct cvmx_ipd_qosx_red_marks_s cn30xx;
754	struct cvmx_ipd_qosx_red_marks_s cn31xx;
755	struct cvmx_ipd_qosx_red_marks_s cn38xx;
756	struct cvmx_ipd_qosx_red_marks_s cn38xxp2;
757	struct cvmx_ipd_qosx_red_marks_s cn50xx;
758	struct cvmx_ipd_qosx_red_marks_s cn52xx;
759	struct cvmx_ipd_qosx_red_marks_s cn52xxp1;
760	struct cvmx_ipd_qosx_red_marks_s cn56xx;
761	struct cvmx_ipd_qosx_red_marks_s cn56xxp1;
762	struct cvmx_ipd_qosx_red_marks_s cn58xx;
763	struct cvmx_ipd_qosx_red_marks_s cn58xxp1;
764	struct cvmx_ipd_qosx_red_marks_s cn63xx;
765	struct cvmx_ipd_qosx_red_marks_s cn63xxp1;
766};
767
768union cvmx_ipd_que0_free_page_cnt {
769	uint64_t u64;
770	struct cvmx_ipd_que0_free_page_cnt_s {
771		uint64_t reserved_32_63:32;
772		uint64_t q0_pcnt:32;
773	} s;
774	struct cvmx_ipd_que0_free_page_cnt_s cn30xx;
775	struct cvmx_ipd_que0_free_page_cnt_s cn31xx;
776	struct cvmx_ipd_que0_free_page_cnt_s cn38xx;
777	struct cvmx_ipd_que0_free_page_cnt_s cn38xxp2;
778	struct cvmx_ipd_que0_free_page_cnt_s cn50xx;
779	struct cvmx_ipd_que0_free_page_cnt_s cn52xx;
780	struct cvmx_ipd_que0_free_page_cnt_s cn52xxp1;
781	struct cvmx_ipd_que0_free_page_cnt_s cn56xx;
782	struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1;
783	struct cvmx_ipd_que0_free_page_cnt_s cn58xx;
784	struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1;
785	struct cvmx_ipd_que0_free_page_cnt_s cn63xx;
786	struct cvmx_ipd_que0_free_page_cnt_s cn63xxp1;
787};
788
789union cvmx_ipd_red_port_enable {
790	uint64_t u64;
791	struct cvmx_ipd_red_port_enable_s {
792		uint64_t prb_dly:14;
793		uint64_t avg_dly:14;
794		uint64_t prt_enb:36;
795	} s;
796	struct cvmx_ipd_red_port_enable_s cn30xx;
797	struct cvmx_ipd_red_port_enable_s cn31xx;
798	struct cvmx_ipd_red_port_enable_s cn38xx;
799	struct cvmx_ipd_red_port_enable_s cn38xxp2;
800	struct cvmx_ipd_red_port_enable_s cn50xx;
801	struct cvmx_ipd_red_port_enable_s cn52xx;
802	struct cvmx_ipd_red_port_enable_s cn52xxp1;
803	struct cvmx_ipd_red_port_enable_s cn56xx;
804	struct cvmx_ipd_red_port_enable_s cn56xxp1;
805	struct cvmx_ipd_red_port_enable_s cn58xx;
806	struct cvmx_ipd_red_port_enable_s cn58xxp1;
807	struct cvmx_ipd_red_port_enable_s cn63xx;
808	struct cvmx_ipd_red_port_enable_s cn63xxp1;
809};
810
811union cvmx_ipd_red_port_enable2 {
812	uint64_t u64;
813	struct cvmx_ipd_red_port_enable2_s {
814		uint64_t reserved_8_63:56;
815		uint64_t prt_enb:8;
816	} s;
817	struct cvmx_ipd_red_port_enable2_cn52xx {
818		uint64_t reserved_4_63:60;
819		uint64_t prt_enb:4;
820	} cn52xx;
821	struct cvmx_ipd_red_port_enable2_cn52xx cn52xxp1;
822	struct cvmx_ipd_red_port_enable2_cn52xx cn56xx;
823	struct cvmx_ipd_red_port_enable2_cn52xx cn56xxp1;
824	struct cvmx_ipd_red_port_enable2_s cn63xx;
825	struct cvmx_ipd_red_port_enable2_s cn63xxp1;
826};
827
828union cvmx_ipd_red_quex_param {
829	uint64_t u64;
830	struct cvmx_ipd_red_quex_param_s {
831		uint64_t reserved_49_63:15;
832		uint64_t use_pcnt:1;
833		uint64_t new_con:8;
834		uint64_t avg_con:8;
835		uint64_t prb_con:32;
836	} s;
837	struct cvmx_ipd_red_quex_param_s cn30xx;
838	struct cvmx_ipd_red_quex_param_s cn31xx;
839	struct cvmx_ipd_red_quex_param_s cn38xx;
840	struct cvmx_ipd_red_quex_param_s cn38xxp2;
841	struct cvmx_ipd_red_quex_param_s cn50xx;
842	struct cvmx_ipd_red_quex_param_s cn52xx;
843	struct cvmx_ipd_red_quex_param_s cn52xxp1;
844	struct cvmx_ipd_red_quex_param_s cn56xx;
845	struct cvmx_ipd_red_quex_param_s cn56xxp1;
846	struct cvmx_ipd_red_quex_param_s cn58xx;
847	struct cvmx_ipd_red_quex_param_s cn58xxp1;
848	struct cvmx_ipd_red_quex_param_s cn63xx;
849	struct cvmx_ipd_red_quex_param_s cn63xxp1;
850};
851
852union cvmx_ipd_sub_port_bp_page_cnt {
853	uint64_t u64;
854	struct cvmx_ipd_sub_port_bp_page_cnt_s {
855		uint64_t reserved_31_63:33;
856		uint64_t port:6;
857		uint64_t page_cnt:25;
858	} s;
859	struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx;
860	struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx;
861	struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xx;
862	struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xxp2;
863	struct cvmx_ipd_sub_port_bp_page_cnt_s cn50xx;
864	struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xx;
865	struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xxp1;
866	struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xx;
867	struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1;
868	struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx;
869	struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1;
870	struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xx;
871	struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xxp1;
872};
873
874union cvmx_ipd_sub_port_fcs {
875	uint64_t u64;
876	struct cvmx_ipd_sub_port_fcs_s {
877		uint64_t reserved_40_63:24;
878		uint64_t port_bit2:4;
879		uint64_t reserved_32_35:4;
880		uint64_t port_bit:32;
881	} s;
882	struct cvmx_ipd_sub_port_fcs_cn30xx {
883		uint64_t reserved_3_63:61;
884		uint64_t port_bit:3;
885	} cn30xx;
886	struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx;
887	struct cvmx_ipd_sub_port_fcs_cn38xx {
888		uint64_t reserved_32_63:32;
889		uint64_t port_bit:32;
890	} cn38xx;
891	struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2;
892	struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx;
893	struct cvmx_ipd_sub_port_fcs_s cn52xx;
894	struct cvmx_ipd_sub_port_fcs_s cn52xxp1;
895	struct cvmx_ipd_sub_port_fcs_s cn56xx;
896	struct cvmx_ipd_sub_port_fcs_s cn56xxp1;
897	struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx;
898	struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1;
899	struct cvmx_ipd_sub_port_fcs_s cn63xx;
900	struct cvmx_ipd_sub_port_fcs_s cn63xxp1;
901};
902
903union cvmx_ipd_sub_port_qos_cnt {
904	uint64_t u64;
905	struct cvmx_ipd_sub_port_qos_cnt_s {
906		uint64_t reserved_41_63:23;
907		uint64_t port_qos:9;
908		uint64_t cnt:32;
909	} s;
910	struct cvmx_ipd_sub_port_qos_cnt_s cn52xx;
911	struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1;
912	struct cvmx_ipd_sub_port_qos_cnt_s cn56xx;
913	struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1;
914	struct cvmx_ipd_sub_port_qos_cnt_s cn63xx;
915	struct cvmx_ipd_sub_port_qos_cnt_s cn63xxp1;
916};
917
918union cvmx_ipd_wqe_fpa_queue {
919	uint64_t u64;
920	struct cvmx_ipd_wqe_fpa_queue_s {
921		uint64_t reserved_3_63:61;
922		uint64_t wqe_pool:3;
923	} s;
924	struct cvmx_ipd_wqe_fpa_queue_s cn30xx;
925	struct cvmx_ipd_wqe_fpa_queue_s cn31xx;
926	struct cvmx_ipd_wqe_fpa_queue_s cn38xx;
927	struct cvmx_ipd_wqe_fpa_queue_s cn38xxp2;
928	struct cvmx_ipd_wqe_fpa_queue_s cn50xx;
929	struct cvmx_ipd_wqe_fpa_queue_s cn52xx;
930	struct cvmx_ipd_wqe_fpa_queue_s cn52xxp1;
931	struct cvmx_ipd_wqe_fpa_queue_s cn56xx;
932	struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1;
933	struct cvmx_ipd_wqe_fpa_queue_s cn58xx;
934	struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1;
935	struct cvmx_ipd_wqe_fpa_queue_s cn63xx;
936	struct cvmx_ipd_wqe_fpa_queue_s cn63xxp1;
937};
938
939union cvmx_ipd_wqe_ptr_valid {
940	uint64_t u64;
941	struct cvmx_ipd_wqe_ptr_valid_s {
942		uint64_t reserved_29_63:35;
943		uint64_t ptr:29;
944	} s;
945	struct cvmx_ipd_wqe_ptr_valid_s cn30xx;
946	struct cvmx_ipd_wqe_ptr_valid_s cn31xx;
947	struct cvmx_ipd_wqe_ptr_valid_s cn38xx;
948	struct cvmx_ipd_wqe_ptr_valid_s cn50xx;
949	struct cvmx_ipd_wqe_ptr_valid_s cn52xx;
950	struct cvmx_ipd_wqe_ptr_valid_s cn52xxp1;
951	struct cvmx_ipd_wqe_ptr_valid_s cn56xx;
952	struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1;
953	struct cvmx_ipd_wqe_ptr_valid_s cn58xx;
954	struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1;
955	struct cvmx_ipd_wqe_ptr_valid_s cn63xx;
956	struct cvmx_ipd_wqe_ptr_valid_s cn63xxp1;
957};
958
959#endif