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1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef __VMWGFX_DRM_H__
29#define __VMWGFX_DRM_H__
30
31#define DRM_VMW_MAX_SURFACE_FACES 6
32#define DRM_VMW_MAX_MIP_LEVELS 24
33
34#define DRM_VMW_EXT_NAME_LEN 128
35
36#define DRM_VMW_GET_PARAM 0
37#define DRM_VMW_ALLOC_DMABUF 1
38#define DRM_VMW_UNREF_DMABUF 2
39#define DRM_VMW_CURSOR_BYPASS 3
40/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
41#define DRM_VMW_CONTROL_STREAM 4
42#define DRM_VMW_CLAIM_STREAM 5
43#define DRM_VMW_UNREF_STREAM 6
44/* guarded by DRM_VMW_PARAM_3D == 1 */
45#define DRM_VMW_CREATE_CONTEXT 7
46#define DRM_VMW_UNREF_CONTEXT 8
47#define DRM_VMW_CREATE_SURFACE 9
48#define DRM_VMW_UNREF_SURFACE 10
49#define DRM_VMW_REF_SURFACE 11
50#define DRM_VMW_EXECBUF 12
51#define DRM_VMW_FIFO_DEBUG 13
52#define DRM_VMW_FENCE_WAIT 14
53/* guarded by minor version >= 2 */
54#define DRM_VMW_UPDATE_LAYOUT 15
55
56
57/*************************************************************************/
58/**
59 * DRM_VMW_GET_PARAM - get device information.
60 *
61 * DRM_VMW_PARAM_FIFO_OFFSET:
62 * Offset to use to map the first page of the FIFO read-only.
63 * The fifo is mapped using the mmap() system call on the drm device.
64 *
65 * DRM_VMW_PARAM_OVERLAY_IOCTL:
66 * Does the driver support the overlay ioctl.
67 */
68
69#define DRM_VMW_PARAM_NUM_STREAMS 0
70#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
71#define DRM_VMW_PARAM_3D 2
72#define DRM_VMW_PARAM_FIFO_OFFSET 3
73#define DRM_VMW_PARAM_HW_CAPS 4
74#define DRM_VMW_PARAM_FIFO_CAPS 5
75#define DRM_VMW_PARAM_MAX_FB_SIZE 6
76
77/**
78 * struct drm_vmw_getparam_arg
79 *
80 * @value: Returned value. //Out
81 * @param: Parameter to query. //In.
82 *
83 * Argument to the DRM_VMW_GET_PARAM Ioctl.
84 */
85
86struct drm_vmw_getparam_arg {
87 uint64_t value;
88 uint32_t param;
89 uint32_t pad64;
90};
91
92/*************************************************************************/
93/**
94 * DRM_VMW_EXTENSION - Query device extensions.
95 */
96
97/**
98 * struct drm_vmw_extension_rep
99 *
100 * @exists: The queried extension exists.
101 * @driver_ioctl_offset: Ioctl number of the first ioctl in the extension.
102 * @driver_sarea_offset: Offset to any space in the DRI SAREA
103 * used by the extension.
104 * @major: Major version number of the extension.
105 * @minor: Minor version number of the extension.
106 * @pl: Patch level version number of the extension.
107 *
108 * Output argument to the DRM_VMW_EXTENSION Ioctl.
109 */
110
111struct drm_vmw_extension_rep {
112 int32_t exists;
113 uint32_t driver_ioctl_offset;
114 uint32_t driver_sarea_offset;
115 uint32_t major;
116 uint32_t minor;
117 uint32_t pl;
118 uint32_t pad64;
119};
120
121/**
122 * union drm_vmw_extension_arg
123 *
124 * @extension - Ascii name of the extension to be queried. //In
125 * @rep - Reply as defined above. //Out
126 *
127 * Argument to the DRM_VMW_EXTENSION Ioctl.
128 */
129
130union drm_vmw_extension_arg {
131 char extension[DRM_VMW_EXT_NAME_LEN];
132 struct drm_vmw_extension_rep rep;
133};
134
135/*************************************************************************/
136/**
137 * DRM_VMW_CREATE_CONTEXT - Create a host context.
138 *
139 * Allocates a device unique context id, and queues a create context command
140 * for the host. Does not wait for host completion.
141 */
142
143/**
144 * struct drm_vmw_context_arg
145 *
146 * @cid: Device unique context ID.
147 *
148 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
149 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
150 */
151
152struct drm_vmw_context_arg {
153 int32_t cid;
154 uint32_t pad64;
155};
156
157/*************************************************************************/
158/**
159 * DRM_VMW_UNREF_CONTEXT - Create a host context.
160 *
161 * Frees a global context id, and queues a destroy host command for the host.
162 * Does not wait for host completion. The context ID can be used directly
163 * in the command stream and shows up as the same context ID on the host.
164 */
165
166/*************************************************************************/
167/**
168 * DRM_VMW_CREATE_SURFACE - Create a host suface.
169 *
170 * Allocates a device unique surface id, and queues a create surface command
171 * for the host. Does not wait for host completion. The surface ID can be
172 * used directly in the command stream and shows up as the same surface
173 * ID on the host.
174 */
175
176/**
177 * struct drm_wmv_surface_create_req
178 *
179 * @flags: Surface flags as understood by the host.
180 * @format: Surface format as understood by the host.
181 * @mip_levels: Number of mip levels for each face.
182 * An unused face should have 0 encoded.
183 * @size_addr: Address of a user-space array of sruct drm_vmw_size
184 * cast to an uint64_t for 32-64 bit compatibility.
185 * The size of the array should equal the total number of mipmap levels.
186 * @shareable: Boolean whether other clients (as identified by file descriptors)
187 * may reference this surface.
188 * @scanout: Boolean whether the surface is intended to be used as a
189 * scanout.
190 *
191 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
192 * Output data from the DRM_VMW_REF_SURFACE Ioctl.
193 */
194
195struct drm_vmw_surface_create_req {
196 uint32_t flags;
197 uint32_t format;
198 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
199 uint64_t size_addr;
200 int32_t shareable;
201 int32_t scanout;
202};
203
204/**
205 * struct drm_wmv_surface_arg
206 *
207 * @sid: Surface id of created surface or surface to destroy or reference.
208 *
209 * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
210 * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
211 * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
212 */
213
214struct drm_vmw_surface_arg {
215 int32_t sid;
216 uint32_t pad64;
217};
218
219/**
220 * struct drm_vmw_size ioctl.
221 *
222 * @width - mip level width
223 * @height - mip level height
224 * @depth - mip level depth
225 *
226 * Description of a mip level.
227 * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
228 */
229
230struct drm_vmw_size {
231 uint32_t width;
232 uint32_t height;
233 uint32_t depth;
234 uint32_t pad64;
235};
236
237/**
238 * union drm_vmw_surface_create_arg
239 *
240 * @rep: Output data as described above.
241 * @req: Input data as described above.
242 *
243 * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
244 */
245
246union drm_vmw_surface_create_arg {
247 struct drm_vmw_surface_arg rep;
248 struct drm_vmw_surface_create_req req;
249};
250
251/*************************************************************************/
252/**
253 * DRM_VMW_REF_SURFACE - Reference a host surface.
254 *
255 * Puts a reference on a host surface with a give sid, as previously
256 * returned by the DRM_VMW_CREATE_SURFACE ioctl.
257 * A reference will make sure the surface isn't destroyed while we hold
258 * it and will allow the calling client to use the surface ID in the command
259 * stream.
260 *
261 * On successful return, the Ioctl returns the surface information given
262 * in the DRM_VMW_CREATE_SURFACE ioctl.
263 */
264
265/**
266 * union drm_vmw_surface_reference_arg
267 *
268 * @rep: Output data as described above.
269 * @req: Input data as described above.
270 *
271 * Argument to the DRM_VMW_REF_SURFACE Ioctl.
272 */
273
274union drm_vmw_surface_reference_arg {
275 struct drm_vmw_surface_create_req rep;
276 struct drm_vmw_surface_arg req;
277};
278
279/*************************************************************************/
280/**
281 * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
282 *
283 * Clear a reference previously put on a host surface.
284 * When all references are gone, including the one implicitly placed
285 * on creation,
286 * a destroy surface command will be queued for the host.
287 * Does not wait for completion.
288 */
289
290/*************************************************************************/
291/**
292 * DRM_VMW_EXECBUF
293 *
294 * Submit a command buffer for execution on the host, and return a
295 * fence sequence that when signaled, indicates that the command buffer has
296 * executed.
297 */
298
299/**
300 * struct drm_vmw_execbuf_arg
301 *
302 * @commands: User-space address of a command buffer cast to an uint64_t.
303 * @command-size: Size in bytes of the command buffer.
304 * @throttle-us: Sleep until software is less than @throttle_us
305 * microseconds ahead of hardware. The driver may round this value
306 * to the nearest kernel tick.
307 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
308 * uint64_t.
309 * @version: Allows expanding the execbuf ioctl parameters without breaking
310 * backwards compatibility, since user-space will always tell the kernel
311 * which version it uses.
312 * @flags: Execbuf flags. None currently.
313 *
314 * Argument to the DRM_VMW_EXECBUF Ioctl.
315 */
316
317#define DRM_VMW_EXECBUF_VERSION 0
318
319struct drm_vmw_execbuf_arg {
320 uint64_t commands;
321 uint32_t command_size;
322 uint32_t throttle_us;
323 uint64_t fence_rep;
324 uint32_t version;
325 uint32_t flags;
326};
327
328/**
329 * struct drm_vmw_fence_rep
330 *
331 * @fence_seq: Fence sequence associated with a command submission.
332 * @error: This member should've been set to -EFAULT on submission.
333 * The following actions should be take on completion:
334 * error == -EFAULT: Fence communication failed. The host is synchronized.
335 * Use the last fence id read from the FIFO fence register.
336 * error != 0 && error != -EFAULT:
337 * Fence submission failed. The host is synchronized. Use the fence_seq member.
338 * error == 0: All is OK, The host may not be synchronized.
339 * Use the fence_seq member.
340 *
341 * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
342 */
343
344struct drm_vmw_fence_rep {
345 uint64_t fence_seq;
346 int32_t error;
347 uint32_t pad64;
348};
349
350/*************************************************************************/
351/**
352 * DRM_VMW_ALLOC_DMABUF
353 *
354 * Allocate a DMA buffer that is visible also to the host.
355 * NOTE: The buffer is
356 * identified by a handle and an offset, which are private to the guest, but
357 * useable in the command stream. The guest kernel may translate these
358 * and patch up the command stream accordingly. In the future, the offset may
359 * be zero at all times, or it may disappear from the interface before it is
360 * fixed.
361 *
362 * The DMA buffer may stay user-space mapped in the guest at all times,
363 * and is thus suitable for sub-allocation.
364 *
365 * DMA buffers are mapped using the mmap() syscall on the drm device.
366 */
367
368/**
369 * struct drm_vmw_alloc_dmabuf_req
370 *
371 * @size: Required minimum size of the buffer.
372 *
373 * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
374 */
375
376struct drm_vmw_alloc_dmabuf_req {
377 uint32_t size;
378 uint32_t pad64;
379};
380
381/**
382 * struct drm_vmw_dmabuf_rep
383 *
384 * @map_handle: Offset to use in the mmap() call used to map the buffer.
385 * @handle: Handle unique to this buffer. Used for unreferencing.
386 * @cur_gmr_id: GMR id to use in the command stream when this buffer is
387 * referenced. See not above.
388 * @cur_gmr_offset: Offset to use in the command stream when this buffer is
389 * referenced. See note above.
390 *
391 * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
392 */
393
394struct drm_vmw_dmabuf_rep {
395 uint64_t map_handle;
396 uint32_t handle;
397 uint32_t cur_gmr_id;
398 uint32_t cur_gmr_offset;
399 uint32_t pad64;
400};
401
402/**
403 * union drm_vmw_dmabuf_arg
404 *
405 * @req: Input data as described above.
406 * @rep: Output data as described above.
407 *
408 * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
409 */
410
411union drm_vmw_alloc_dmabuf_arg {
412 struct drm_vmw_alloc_dmabuf_req req;
413 struct drm_vmw_dmabuf_rep rep;
414};
415
416/*************************************************************************/
417/**
418 * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
419 *
420 */
421
422/**
423 * struct drm_vmw_unref_dmabuf_arg
424 *
425 * @handle: Handle indicating what buffer to free. Obtained from the
426 * DRM_VMW_ALLOC_DMABUF Ioctl.
427 *
428 * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
429 */
430
431struct drm_vmw_unref_dmabuf_arg {
432 uint32_t handle;
433 uint32_t pad64;
434};
435
436/*************************************************************************/
437/**
438 * DRM_VMW_FIFO_DEBUG - Get last FIFO submission.
439 *
440 * This IOCTL copies the last FIFO submission directly out of the FIFO buffer.
441 */
442
443/**
444 * struct drm_vmw_fifo_debug_arg
445 *
446 * @debug_buffer: User space address of a debug_buffer cast to an uint64_t //In
447 * @debug_buffer_size: Size in bytes of debug buffer //In
448 * @used_size: Number of bytes copied to the buffer // Out
449 * @did_not_fit: Boolean indicating that the fifo contents did not fit. //Out
450 *
451 * Argument to the DRM_VMW_FIFO_DEBUG Ioctl.
452 */
453
454struct drm_vmw_fifo_debug_arg {
455 uint64_t debug_buffer;
456 uint32_t debug_buffer_size;
457 uint32_t used_size;
458 int32_t did_not_fit;
459 uint32_t pad64;
460};
461
462struct drm_vmw_fence_wait_arg {
463 uint64_t sequence;
464 uint64_t kernel_cookie;
465 int32_t cookie_valid;
466 int32_t pad64;
467};
468
469/*************************************************************************/
470/**
471 * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
472 *
473 * This IOCTL controls the overlay units of the svga device.
474 * The SVGA overlay units does not work like regular hardware units in
475 * that they do not automaticaly read back the contents of the given dma
476 * buffer. But instead only read back for each call to this ioctl, and
477 * at any point between this call being made and a following call that
478 * either changes the buffer or disables the stream.
479 */
480
481/**
482 * struct drm_vmw_rect
483 *
484 * Defines a rectangle. Used in the overlay ioctl to define
485 * source and destination rectangle.
486 */
487
488struct drm_vmw_rect {
489 int32_t x;
490 int32_t y;
491 uint32_t w;
492 uint32_t h;
493};
494
495/**
496 * struct drm_vmw_control_stream_arg
497 *
498 * @stream_id: Stearm to control
499 * @enabled: If false all following arguments are ignored.
500 * @handle: Handle to buffer for getting data from.
501 * @format: Format of the overlay as understood by the host.
502 * @width: Width of the overlay.
503 * @height: Height of the overlay.
504 * @size: Size of the overlay in bytes.
505 * @pitch: Array of pitches, the two last are only used for YUV12 formats.
506 * @offset: Offset from start of dma buffer to overlay.
507 * @src: Source rect, must be within the defined area above.
508 * @dst: Destination rect, x and y may be negative.
509 *
510 * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
511 */
512
513struct drm_vmw_control_stream_arg {
514 uint32_t stream_id;
515 uint32_t enabled;
516
517 uint32_t flags;
518 uint32_t color_key;
519
520 uint32_t handle;
521 uint32_t offset;
522 int32_t format;
523 uint32_t size;
524 uint32_t width;
525 uint32_t height;
526 uint32_t pitch[3];
527
528 uint32_t pad64;
529 struct drm_vmw_rect src;
530 struct drm_vmw_rect dst;
531};
532
533/*************************************************************************/
534/**
535 * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
536 *
537 */
538
539#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
540#define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
541
542/**
543 * struct drm_vmw_cursor_bypass_arg
544 *
545 * @flags: Flags.
546 * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
547 * @xpos: X position of cursor.
548 * @ypos: Y position of cursor.
549 * @xhot: X hotspot.
550 * @yhot: Y hotspot.
551 *
552 * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
553 */
554
555struct drm_vmw_cursor_bypass_arg {
556 uint32_t flags;
557 uint32_t crtc_id;
558 int32_t xpos;
559 int32_t ypos;
560 int32_t xhot;
561 int32_t yhot;
562};
563
564/*************************************************************************/
565/**
566 * DRM_VMW_CLAIM_STREAM - Claim a single stream.
567 */
568
569/**
570 * struct drm_vmw_context_arg
571 *
572 * @stream_id: Device unique context ID.
573 *
574 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
575 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
576 */
577
578struct drm_vmw_stream_arg {
579 uint32_t stream_id;
580 uint32_t pad64;
581};
582
583/*************************************************************************/
584/**
585 * DRM_VMW_UNREF_STREAM - Unclaim a stream.
586 *
587 * Return a single stream that was claimed by this process. Also makes
588 * sure that the stream has been stopped.
589 */
590
591/*************************************************************************/
592/**
593 * DRM_VMW_UPDATE_LAYOUT - Update layout
594 *
595 * Updates the preferred modes and connection status for connectors. The
596 * command conisits of one drm_vmw_update_layout_arg pointing out a array
597 * of num_outputs drm_vmw_rect's.
598 */
599
600/**
601 * struct drm_vmw_update_layout_arg
602 *
603 * @num_outputs: number of active
604 * @rects: pointer to array of drm_vmw_rect
605 *
606 * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
607 */
608
609struct drm_vmw_update_layout_arg {
610 uint32_t num_outputs;
611 uint32_t pad64;
612 uint64_t rects;
613};
614
615#endif
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef __VMWGFX_DRM_H__
29#define __VMWGFX_DRM_H__
30
31#define DRM_VMW_MAX_SURFACE_FACES 6
32#define DRM_VMW_MAX_MIP_LEVELS 24
33
34
35#define DRM_VMW_GET_PARAM 0
36#define DRM_VMW_ALLOC_DMABUF 1
37#define DRM_VMW_UNREF_DMABUF 2
38#define DRM_VMW_CURSOR_BYPASS 3
39/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
40#define DRM_VMW_CONTROL_STREAM 4
41#define DRM_VMW_CLAIM_STREAM 5
42#define DRM_VMW_UNREF_STREAM 6
43/* guarded by DRM_VMW_PARAM_3D == 1 */
44#define DRM_VMW_CREATE_CONTEXT 7
45#define DRM_VMW_UNREF_CONTEXT 8
46#define DRM_VMW_CREATE_SURFACE 9
47#define DRM_VMW_UNREF_SURFACE 10
48#define DRM_VMW_REF_SURFACE 11
49#define DRM_VMW_EXECBUF 12
50#define DRM_VMW_GET_3D_CAP 13
51#define DRM_VMW_FENCE_WAIT 14
52#define DRM_VMW_FENCE_SIGNALED 15
53#define DRM_VMW_FENCE_UNREF 16
54#define DRM_VMW_FENCE_EVENT 17
55#define DRM_VMW_PRESENT 18
56#define DRM_VMW_PRESENT_READBACK 19
57#define DRM_VMW_UPDATE_LAYOUT 20
58
59/*************************************************************************/
60/**
61 * DRM_VMW_GET_PARAM - get device information.
62 *
63 * DRM_VMW_PARAM_FIFO_OFFSET:
64 * Offset to use to map the first page of the FIFO read-only.
65 * The fifo is mapped using the mmap() system call on the drm device.
66 *
67 * DRM_VMW_PARAM_OVERLAY_IOCTL:
68 * Does the driver support the overlay ioctl.
69 */
70
71#define DRM_VMW_PARAM_NUM_STREAMS 0
72#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
73#define DRM_VMW_PARAM_3D 2
74#define DRM_VMW_PARAM_HW_CAPS 3
75#define DRM_VMW_PARAM_FIFO_CAPS 4
76#define DRM_VMW_PARAM_MAX_FB_SIZE 5
77#define DRM_VMW_PARAM_FIFO_HW_VERSION 6
78
79/**
80 * struct drm_vmw_getparam_arg
81 *
82 * @value: Returned value. //Out
83 * @param: Parameter to query. //In.
84 *
85 * Argument to the DRM_VMW_GET_PARAM Ioctl.
86 */
87
88struct drm_vmw_getparam_arg {
89 uint64_t value;
90 uint32_t param;
91 uint32_t pad64;
92};
93
94/*************************************************************************/
95/**
96 * DRM_VMW_CREATE_CONTEXT - Create a host context.
97 *
98 * Allocates a device unique context id, and queues a create context command
99 * for the host. Does not wait for host completion.
100 */
101
102/**
103 * struct drm_vmw_context_arg
104 *
105 * @cid: Device unique context ID.
106 *
107 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
108 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
109 */
110
111struct drm_vmw_context_arg {
112 int32_t cid;
113 uint32_t pad64;
114};
115
116/*************************************************************************/
117/**
118 * DRM_VMW_UNREF_CONTEXT - Create a host context.
119 *
120 * Frees a global context id, and queues a destroy host command for the host.
121 * Does not wait for host completion. The context ID can be used directly
122 * in the command stream and shows up as the same context ID on the host.
123 */
124
125/*************************************************************************/
126/**
127 * DRM_VMW_CREATE_SURFACE - Create a host suface.
128 *
129 * Allocates a device unique surface id, and queues a create surface command
130 * for the host. Does not wait for host completion. The surface ID can be
131 * used directly in the command stream and shows up as the same surface
132 * ID on the host.
133 */
134
135/**
136 * struct drm_wmv_surface_create_req
137 *
138 * @flags: Surface flags as understood by the host.
139 * @format: Surface format as understood by the host.
140 * @mip_levels: Number of mip levels for each face.
141 * An unused face should have 0 encoded.
142 * @size_addr: Address of a user-space array of sruct drm_vmw_size
143 * cast to an uint64_t for 32-64 bit compatibility.
144 * The size of the array should equal the total number of mipmap levels.
145 * @shareable: Boolean whether other clients (as identified by file descriptors)
146 * may reference this surface.
147 * @scanout: Boolean whether the surface is intended to be used as a
148 * scanout.
149 *
150 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
151 * Output data from the DRM_VMW_REF_SURFACE Ioctl.
152 */
153
154struct drm_vmw_surface_create_req {
155 uint32_t flags;
156 uint32_t format;
157 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
158 uint64_t size_addr;
159 int32_t shareable;
160 int32_t scanout;
161};
162
163/**
164 * struct drm_wmv_surface_arg
165 *
166 * @sid: Surface id of created surface or surface to destroy or reference.
167 *
168 * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
169 * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
170 * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
171 */
172
173struct drm_vmw_surface_arg {
174 int32_t sid;
175 uint32_t pad64;
176};
177
178/**
179 * struct drm_vmw_size ioctl.
180 *
181 * @width - mip level width
182 * @height - mip level height
183 * @depth - mip level depth
184 *
185 * Description of a mip level.
186 * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
187 */
188
189struct drm_vmw_size {
190 uint32_t width;
191 uint32_t height;
192 uint32_t depth;
193 uint32_t pad64;
194};
195
196/**
197 * union drm_vmw_surface_create_arg
198 *
199 * @rep: Output data as described above.
200 * @req: Input data as described above.
201 *
202 * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
203 */
204
205union drm_vmw_surface_create_arg {
206 struct drm_vmw_surface_arg rep;
207 struct drm_vmw_surface_create_req req;
208};
209
210/*************************************************************************/
211/**
212 * DRM_VMW_REF_SURFACE - Reference a host surface.
213 *
214 * Puts a reference on a host surface with a give sid, as previously
215 * returned by the DRM_VMW_CREATE_SURFACE ioctl.
216 * A reference will make sure the surface isn't destroyed while we hold
217 * it and will allow the calling client to use the surface ID in the command
218 * stream.
219 *
220 * On successful return, the Ioctl returns the surface information given
221 * in the DRM_VMW_CREATE_SURFACE ioctl.
222 */
223
224/**
225 * union drm_vmw_surface_reference_arg
226 *
227 * @rep: Output data as described above.
228 * @req: Input data as described above.
229 *
230 * Argument to the DRM_VMW_REF_SURFACE Ioctl.
231 */
232
233union drm_vmw_surface_reference_arg {
234 struct drm_vmw_surface_create_req rep;
235 struct drm_vmw_surface_arg req;
236};
237
238/*************************************************************************/
239/**
240 * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
241 *
242 * Clear a reference previously put on a host surface.
243 * When all references are gone, including the one implicitly placed
244 * on creation,
245 * a destroy surface command will be queued for the host.
246 * Does not wait for completion.
247 */
248
249/*************************************************************************/
250/**
251 * DRM_VMW_EXECBUF
252 *
253 * Submit a command buffer for execution on the host, and return a
254 * fence seqno that when signaled, indicates that the command buffer has
255 * executed.
256 */
257
258/**
259 * struct drm_vmw_execbuf_arg
260 *
261 * @commands: User-space address of a command buffer cast to an uint64_t.
262 * @command-size: Size in bytes of the command buffer.
263 * @throttle-us: Sleep until software is less than @throttle_us
264 * microseconds ahead of hardware. The driver may round this value
265 * to the nearest kernel tick.
266 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
267 * uint64_t.
268 * @version: Allows expanding the execbuf ioctl parameters without breaking
269 * backwards compatibility, since user-space will always tell the kernel
270 * which version it uses.
271 * @flags: Execbuf flags. None currently.
272 *
273 * Argument to the DRM_VMW_EXECBUF Ioctl.
274 */
275
276#define DRM_VMW_EXECBUF_VERSION 1
277
278struct drm_vmw_execbuf_arg {
279 uint64_t commands;
280 uint32_t command_size;
281 uint32_t throttle_us;
282 uint64_t fence_rep;
283 uint32_t version;
284 uint32_t flags;
285};
286
287/**
288 * struct drm_vmw_fence_rep
289 *
290 * @handle: Fence object handle for fence associated with a command submission.
291 * @mask: Fence flags relevant for this fence object.
292 * @seqno: Fence sequence number in fifo. A fence object with a lower
293 * seqno will signal the EXEC flag before a fence object with a higher
294 * seqno. This can be used by user-space to avoid kernel calls to determine
295 * whether a fence has signaled the EXEC flag. Note that @seqno will
296 * wrap at 32-bit.
297 * @passed_seqno: The highest seqno number processed by the hardware
298 * so far. This can be used to mark user-space fence objects as signaled, and
299 * to determine whether a fence seqno might be stale.
300 * @error: This member should've been set to -EFAULT on submission.
301 * The following actions should be take on completion:
302 * error == -EFAULT: Fence communication failed. The host is synchronized.
303 * Use the last fence id read from the FIFO fence register.
304 * error != 0 && error != -EFAULT:
305 * Fence submission failed. The host is synchronized. Use the fence_seq member.
306 * error == 0: All is OK, The host may not be synchronized.
307 * Use the fence_seq member.
308 *
309 * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
310 */
311
312struct drm_vmw_fence_rep {
313 uint32_t handle;
314 uint32_t mask;
315 uint32_t seqno;
316 uint32_t passed_seqno;
317 uint32_t pad64;
318 int32_t error;
319};
320
321/*************************************************************************/
322/**
323 * DRM_VMW_ALLOC_DMABUF
324 *
325 * Allocate a DMA buffer that is visible also to the host.
326 * NOTE: The buffer is
327 * identified by a handle and an offset, which are private to the guest, but
328 * useable in the command stream. The guest kernel may translate these
329 * and patch up the command stream accordingly. In the future, the offset may
330 * be zero at all times, or it may disappear from the interface before it is
331 * fixed.
332 *
333 * The DMA buffer may stay user-space mapped in the guest at all times,
334 * and is thus suitable for sub-allocation.
335 *
336 * DMA buffers are mapped using the mmap() syscall on the drm device.
337 */
338
339/**
340 * struct drm_vmw_alloc_dmabuf_req
341 *
342 * @size: Required minimum size of the buffer.
343 *
344 * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
345 */
346
347struct drm_vmw_alloc_dmabuf_req {
348 uint32_t size;
349 uint32_t pad64;
350};
351
352/**
353 * struct drm_vmw_dmabuf_rep
354 *
355 * @map_handle: Offset to use in the mmap() call used to map the buffer.
356 * @handle: Handle unique to this buffer. Used for unreferencing.
357 * @cur_gmr_id: GMR id to use in the command stream when this buffer is
358 * referenced. See not above.
359 * @cur_gmr_offset: Offset to use in the command stream when this buffer is
360 * referenced. See note above.
361 *
362 * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
363 */
364
365struct drm_vmw_dmabuf_rep {
366 uint64_t map_handle;
367 uint32_t handle;
368 uint32_t cur_gmr_id;
369 uint32_t cur_gmr_offset;
370 uint32_t pad64;
371};
372
373/**
374 * union drm_vmw_dmabuf_arg
375 *
376 * @req: Input data as described above.
377 * @rep: Output data as described above.
378 *
379 * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
380 */
381
382union drm_vmw_alloc_dmabuf_arg {
383 struct drm_vmw_alloc_dmabuf_req req;
384 struct drm_vmw_dmabuf_rep rep;
385};
386
387/*************************************************************************/
388/**
389 * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
390 *
391 */
392
393/**
394 * struct drm_vmw_unref_dmabuf_arg
395 *
396 * @handle: Handle indicating what buffer to free. Obtained from the
397 * DRM_VMW_ALLOC_DMABUF Ioctl.
398 *
399 * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
400 */
401
402struct drm_vmw_unref_dmabuf_arg {
403 uint32_t handle;
404 uint32_t pad64;
405};
406
407/*************************************************************************/
408/**
409 * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
410 *
411 * This IOCTL controls the overlay units of the svga device.
412 * The SVGA overlay units does not work like regular hardware units in
413 * that they do not automaticaly read back the contents of the given dma
414 * buffer. But instead only read back for each call to this ioctl, and
415 * at any point between this call being made and a following call that
416 * either changes the buffer or disables the stream.
417 */
418
419/**
420 * struct drm_vmw_rect
421 *
422 * Defines a rectangle. Used in the overlay ioctl to define
423 * source and destination rectangle.
424 */
425
426struct drm_vmw_rect {
427 int32_t x;
428 int32_t y;
429 uint32_t w;
430 uint32_t h;
431};
432
433/**
434 * struct drm_vmw_control_stream_arg
435 *
436 * @stream_id: Stearm to control
437 * @enabled: If false all following arguments are ignored.
438 * @handle: Handle to buffer for getting data from.
439 * @format: Format of the overlay as understood by the host.
440 * @width: Width of the overlay.
441 * @height: Height of the overlay.
442 * @size: Size of the overlay in bytes.
443 * @pitch: Array of pitches, the two last are only used for YUV12 formats.
444 * @offset: Offset from start of dma buffer to overlay.
445 * @src: Source rect, must be within the defined area above.
446 * @dst: Destination rect, x and y may be negative.
447 *
448 * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
449 */
450
451struct drm_vmw_control_stream_arg {
452 uint32_t stream_id;
453 uint32_t enabled;
454
455 uint32_t flags;
456 uint32_t color_key;
457
458 uint32_t handle;
459 uint32_t offset;
460 int32_t format;
461 uint32_t size;
462 uint32_t width;
463 uint32_t height;
464 uint32_t pitch[3];
465
466 uint32_t pad64;
467 struct drm_vmw_rect src;
468 struct drm_vmw_rect dst;
469};
470
471/*************************************************************************/
472/**
473 * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
474 *
475 */
476
477#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
478#define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
479
480/**
481 * struct drm_vmw_cursor_bypass_arg
482 *
483 * @flags: Flags.
484 * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
485 * @xpos: X position of cursor.
486 * @ypos: Y position of cursor.
487 * @xhot: X hotspot.
488 * @yhot: Y hotspot.
489 *
490 * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
491 */
492
493struct drm_vmw_cursor_bypass_arg {
494 uint32_t flags;
495 uint32_t crtc_id;
496 int32_t xpos;
497 int32_t ypos;
498 int32_t xhot;
499 int32_t yhot;
500};
501
502/*************************************************************************/
503/**
504 * DRM_VMW_CLAIM_STREAM - Claim a single stream.
505 */
506
507/**
508 * struct drm_vmw_context_arg
509 *
510 * @stream_id: Device unique context ID.
511 *
512 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
513 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
514 */
515
516struct drm_vmw_stream_arg {
517 uint32_t stream_id;
518 uint32_t pad64;
519};
520
521/*************************************************************************/
522/**
523 * DRM_VMW_UNREF_STREAM - Unclaim a stream.
524 *
525 * Return a single stream that was claimed by this process. Also makes
526 * sure that the stream has been stopped.
527 */
528
529/*************************************************************************/
530/**
531 * DRM_VMW_GET_3D_CAP
532 *
533 * Read 3D capabilities from the FIFO
534 *
535 */
536
537/**
538 * struct drm_vmw_get_3d_cap_arg
539 *
540 * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
541 * @size: Max size to copy
542 *
543 * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
544 * ioctls.
545 */
546
547struct drm_vmw_get_3d_cap_arg {
548 uint64_t buffer;
549 uint32_t max_size;
550 uint32_t pad64;
551};
552
553/*************************************************************************/
554/**
555 * DRM_VMW_FENCE_WAIT
556 *
557 * Waits for a fence object to signal. The wait is interruptible, so that
558 * signals may be delivered during the interrupt. The wait may timeout,
559 * in which case the calls returns -EBUSY. If the wait is restarted,
560 * that is restarting without resetting @cookie_valid to zero,
561 * the timeout is computed from the first call.
562 *
563 * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
564 * on:
565 * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
566 * stream
567 * have executed.
568 * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
569 * commands
570 * in the buffer given to the EXECBUF ioctl returning the fence object handle
571 * are available to user-space.
572 *
573 * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
574 * fenc wait ioctl returns 0, the fence object has been unreferenced after
575 * the wait.
576 */
577
578#define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
579#define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
580
581#define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
582
583/**
584 * struct drm_vmw_fence_wait_arg
585 *
586 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
587 * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
588 * @kernel_cookie: Set to 0 on first call. Left alone on restart.
589 * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
590 * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
591 * before returning.
592 * @flags: Fence flags to wait on.
593 * @wait_options: Options that control the behaviour of the wait ioctl.
594 *
595 * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
596 */
597
598struct drm_vmw_fence_wait_arg {
599 uint32_t handle;
600 int32_t cookie_valid;
601 uint64_t kernel_cookie;
602 uint64_t timeout_us;
603 int32_t lazy;
604 int32_t flags;
605 int32_t wait_options;
606 int32_t pad64;
607};
608
609/*************************************************************************/
610/**
611 * DRM_VMW_FENCE_SIGNALED
612 *
613 * Checks if a fence object is signaled..
614 */
615
616/**
617 * struct drm_vmw_fence_signaled_arg
618 *
619 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
620 * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
621 * @signaled: Out: Flags signaled.
622 * @sequence: Out: Highest sequence passed so far. Can be used to signal the
623 * EXEC flag of user-space fence objects.
624 *
625 * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
626 * ioctls.
627 */
628
629struct drm_vmw_fence_signaled_arg {
630 uint32_t handle;
631 uint32_t flags;
632 int32_t signaled;
633 uint32_t passed_seqno;
634 uint32_t signaled_flags;
635 uint32_t pad64;
636};
637
638/*************************************************************************/
639/**
640 * DRM_VMW_FENCE_UNREF
641 *
642 * Unreferences a fence object, and causes it to be destroyed if there are no
643 * other references to it.
644 *
645 */
646
647/**
648 * struct drm_vmw_fence_arg
649 *
650 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
651 *
652 * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
653 */
654
655struct drm_vmw_fence_arg {
656 uint32_t handle;
657 uint32_t pad64;
658};
659
660
661/*************************************************************************/
662/**
663 * DRM_VMW_FENCE_EVENT
664 *
665 * Queues an event on a fence to be delivered on the drm character device
666 * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
667 * Optionally the approximate time when the fence signaled is
668 * given by the event.
669 */
670
671/*
672 * The event type
673 */
674#define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
675
676struct drm_vmw_event_fence {
677 struct drm_event base;
678 uint64_t user_data;
679 uint32_t tv_sec;
680 uint32_t tv_usec;
681};
682
683/*
684 * Flags that may be given to the command.
685 */
686/* Request fence signaled time on the event. */
687#define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
688
689/**
690 * struct drm_vmw_fence_event_arg
691 *
692 * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
693 * the fence is not supposed to be referenced by user-space.
694 * @user_info: Info to be delivered with the event.
695 * @handle: Attach the event to this fence only.
696 * @flags: A set of flags as defined above.
697 */
698struct drm_vmw_fence_event_arg {
699 uint64_t fence_rep;
700 uint64_t user_data;
701 uint32_t handle;
702 uint32_t flags;
703};
704
705
706/*************************************************************************/
707/**
708 * DRM_VMW_PRESENT
709 *
710 * Executes an SVGA present on a given fb for a given surface. The surface
711 * is placed on the framebuffer. Cliprects are given relative to the given
712 * point (the point disignated by dest_{x|y}).
713 *
714 */
715
716/**
717 * struct drm_vmw_present_arg
718 * @fb_id: framebuffer id to present / read back from.
719 * @sid: Surface id to present from.
720 * @dest_x: X placement coordinate for surface.
721 * @dest_y: Y placement coordinate for surface.
722 * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
723 * @num_clips: Number of cliprects given relative to the framebuffer origin,
724 * in the same coordinate space as the frame buffer.
725 * @pad64: Unused 64-bit padding.
726 *
727 * Input argument to the DRM_VMW_PRESENT ioctl.
728 */
729
730struct drm_vmw_present_arg {
731 uint32_t fb_id;
732 uint32_t sid;
733 int32_t dest_x;
734 int32_t dest_y;
735 uint64_t clips_ptr;
736 uint32_t num_clips;
737 uint32_t pad64;
738};
739
740
741/*************************************************************************/
742/**
743 * DRM_VMW_PRESENT_READBACK
744 *
745 * Executes an SVGA present readback from a given fb to the dma buffer
746 * currently bound as the fb. If there is no dma buffer bound to the fb,
747 * an error will be returned.
748 *
749 */
750
751/**
752 * struct drm_vmw_present_arg
753 * @fb_id: fb_id to present / read back from.
754 * @num_clips: Number of cliprects.
755 * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
756 * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
757 * If this member is NULL, then the ioctl should not return a fence.
758 */
759
760struct drm_vmw_present_readback_arg {
761 uint32_t fb_id;
762 uint32_t num_clips;
763 uint64_t clips_ptr;
764 uint64_t fence_rep;
765};
766
767/*************************************************************************/
768/**
769 * DRM_VMW_UPDATE_LAYOUT - Update layout
770 *
771 * Updates the preferred modes and connection status for connectors. The
772 * command consists of one drm_vmw_update_layout_arg pointing to an array
773 * of num_outputs drm_vmw_rect's.
774 */
775
776/**
777 * struct drm_vmw_update_layout_arg
778 *
779 * @num_outputs: number of active connectors
780 * @rects: pointer to array of drm_vmw_rect cast to an uint64_t
781 *
782 * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
783 */
784struct drm_vmw_update_layout_arg {
785 uint32_t num_outputs;
786 uint32_t pad64;
787 uint64_t rects;
788};
789
790#endif