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Note: File does not exist in v3.1.
  1/* stnic.c : A SH7750 specific part of driver for NS DP83902A ST-NIC.
  2 *
  3 * This file is subject to the terms and conditions of the GNU General Public
  4 * License.  See the file "COPYING" in the main directory of this archive
  5 * for more details.
  6 *
  7 * Copyright (C) 1999 kaz Kojima
  8 */
  9
 10#include <linux/module.h>
 11#include <linux/kernel.h>
 12#include <linux/errno.h>
 13#include <linux/interrupt.h>
 14#include <linux/ioport.h>
 15#include <linux/netdevice.h>
 16#include <linux/etherdevice.h>
 17#include <linux/init.h>
 18#include <linux/delay.h>
 19
 20#include <asm/io.h>
 21#include <mach-se/mach/se.h>
 22#include <asm/machvec.h>
 23#ifdef CONFIG_SH_STANDARD_BIOS
 24#include <asm/sh_bios.h>
 25#endif
 26
 27#include "8390.h"
 28
 29#define DRV_NAME "stnic"
 30
 31#define byte	unsigned char
 32#define half	unsigned short
 33#define word	unsigned int
 34#define vbyte	volatile unsigned char
 35#define vhalf	volatile unsigned short
 36#define vword	volatile unsigned int
 37
 38#define STNIC_RUN	0x01	/* 1 == Run, 0 == reset. */
 39
 40#define START_PG	0	/* First page of TX buffer */
 41#define STOP_PG		128	/* Last page +1 of RX ring */
 42
 43/* Alias */
 44#define STNIC_CR	E8390_CMD
 45#define PG0_RSAR0	EN0_RSARLO
 46#define PG0_RSAR1	EN0_RSARHI
 47#define PG0_RBCR0	EN0_RCNTLO
 48#define PG0_RBCR1	EN0_RCNTHI
 49
 50#define CR_RRD		E8390_RREAD
 51#define CR_RWR		E8390_RWRITE
 52#define CR_PG0		E8390_PAGE0
 53#define CR_STA		E8390_START
 54#define CR_RDMA		E8390_NODMA
 55
 56/* FIXME! YOU MUST SET YOUR OWN ETHER ADDRESS.  */
 57static byte stnic_eadr[6] =
 58{0x00, 0xc0, 0x6e, 0x00, 0x00, 0x07};
 59
 60static struct net_device *stnic_dev;
 61
 62static void stnic_reset (struct net_device *dev);
 63static void stnic_get_hdr (struct net_device *dev, struct e8390_pkt_hdr *hdr,
 64			   int ring_page);
 65static void stnic_block_input (struct net_device *dev, int count,
 66			       struct sk_buff *skb , int ring_offset);
 67static void stnic_block_output (struct net_device *dev, int count,
 68				const unsigned char *buf, int start_page);
 69
 70static void stnic_init (struct net_device *dev);
 71
 72/* SH7750 specific read/write io. */
 73static inline void
 74STNIC_DELAY (void)
 75{
 76  vword trash;
 77  trash = *(vword *) 0xa0000000;
 78  trash = *(vword *) 0xa0000000;
 79  trash = *(vword *) 0xa0000000;
 80}
 81
 82static inline byte
 83STNIC_READ (int reg)
 84{
 85  byte val;
 86
 87  val = (*(vhalf *) (PA_83902 + ((reg) << 1)) >> 8) & 0xff;
 88  STNIC_DELAY ();
 89  return val;
 90}
 91
 92static inline void
 93STNIC_WRITE (int reg, byte val)
 94{
 95  *(vhalf *) (PA_83902 + ((reg) << 1)) = ((half) (val) << 8);
 96  STNIC_DELAY ();
 97}
 98
 99static int __init stnic_probe(void)
100{
101  struct net_device *dev;
102  int i, err;
103
104  /* If we are not running on a SolutionEngine, give up now */
105  if (! MACH_SE)
106    return -ENODEV;
107
108  /* New style probing API */
109  dev = alloc_ei_netdev();
110  if (!dev)
111  	return -ENOMEM;
112
113#ifdef CONFIG_SH_STANDARD_BIOS
114  sh_bios_get_node_addr (stnic_eadr);
115#endif
116  for (i = 0; i < ETH_ALEN; i++)
117    dev->dev_addr[i] = stnic_eadr[i];
118
119  /* Set the base address to point to the NIC, not the "real" base! */
120  dev->base_addr = 0x1000;
121  dev->irq = IRQ_STNIC;
122  dev->netdev_ops = &ei_netdev_ops;
123
124  /* Snarf the interrupt now.  There's no point in waiting since we cannot
125     share and the board will usually be enabled. */
126  err = request_irq (dev->irq, ei_interrupt, 0, DRV_NAME, dev);
127  if (err)  {
128      printk (KERN_EMERG " unable to get IRQ %d.\n", dev->irq);
129      free_netdev(dev);
130      return err;
131    }
132
133  ei_status.name = dev->name;
134  ei_status.word16 = 1;
135#ifdef __LITTLE_ENDIAN__
136  ei_status.bigendian = 0;
137#else
138  ei_status.bigendian = 1;
139#endif
140  ei_status.tx_start_page = START_PG;
141  ei_status.rx_start_page = START_PG + TX_PAGES;
142  ei_status.stop_page = STOP_PG;
143
144  ei_status.reset_8390 = &stnic_reset;
145  ei_status.get_8390_hdr = &stnic_get_hdr;
146  ei_status.block_input = &stnic_block_input;
147  ei_status.block_output = &stnic_block_output;
148
149  stnic_init (dev);
150
151  err = register_netdev(dev);
152  if (err) {
153    free_irq(dev->irq, dev);
154    free_netdev(dev);
155    return err;
156  }
157  stnic_dev = dev;
158
159  printk (KERN_INFO "NS ST-NIC 83902A\n");
160
161  return 0;
162}
163
164static void
165stnic_reset (struct net_device *dev)
166{
167  *(vhalf *) PA_83902_RST = 0;
168  udelay (5);
169  if (ei_debug > 1)
170    printk (KERN_WARNING "8390 reset done (%ld).\n", jiffies);
171  *(vhalf *) PA_83902_RST = ~0;
172  udelay (5);
173}
174
175static void
176stnic_get_hdr (struct net_device *dev, struct e8390_pkt_hdr *hdr,
177	       int ring_page)
178{
179  half buf[2];
180
181  STNIC_WRITE (PG0_RSAR0, 0);
182  STNIC_WRITE (PG0_RSAR1, ring_page);
183  STNIC_WRITE (PG0_RBCR0, 4);
184  STNIC_WRITE (PG0_RBCR1, 0);
185  STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA);
186
187  buf[0] = *(vhalf *) PA_83902_IF;
188  STNIC_DELAY ();
189  buf[1] = *(vhalf *) PA_83902_IF;
190  STNIC_DELAY ();
191  hdr->next = buf[0] >> 8;
192  hdr->status = buf[0] & 0xff;
193#ifdef __LITTLE_ENDIAN__
194  hdr->count = buf[1];
195#else
196  hdr->count = ((buf[1] >> 8) & 0xff) | (buf[1] << 8);
197#endif
198
199  if (ei_debug > 1)
200    printk (KERN_DEBUG "ring %x status %02x next %02x count %04x.\n",
201	    ring_page, hdr->status, hdr->next, hdr->count);
202
203  STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA);
204}
205
206/* Block input and output, similar to the Crynwr packet driver. If you are
207   porting to a new ethercard look at the packet driver source for hints.
208   The HP LAN doesn't use shared memory -- we put the packet
209   out through the "remote DMA" dataport. */
210
211static void
212stnic_block_input (struct net_device *dev, int length, struct sk_buff *skb,
213		   int offset)
214{
215  char *buf = skb->data;
216  half val;
217
218  STNIC_WRITE (PG0_RSAR0, offset & 0xff);
219  STNIC_WRITE (PG0_RSAR1, offset >> 8);
220  STNIC_WRITE (PG0_RBCR0, length & 0xff);
221  STNIC_WRITE (PG0_RBCR1, length >> 8);
222  STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA);
223
224  if (length & 1)
225    length++;
226
227  while (length > 0)
228    {
229      val = *(vhalf *) PA_83902_IF;
230#ifdef __LITTLE_ENDIAN__
231      *buf++ = val & 0xff;
232      *buf++ = val >> 8;
233#else
234      *buf++ = val >> 8;
235      *buf++ = val & 0xff;
236#endif
237      STNIC_DELAY ();
238      length -= sizeof (half);
239    }
240
241  STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA);
242}
243
244static void
245stnic_block_output (struct net_device *dev, int length,
246		    const unsigned char *buf, int output_page)
247{
248  STNIC_WRITE (PG0_RBCR0, 1);	/* Write non-zero value */
249  STNIC_WRITE (STNIC_CR, CR_RRD | CR_PG0 | CR_STA);
250  STNIC_DELAY ();
251
252  STNIC_WRITE (PG0_RBCR0, length & 0xff);
253  STNIC_WRITE (PG0_RBCR1, length >> 8);
254  STNIC_WRITE (PG0_RSAR0, 0);
255  STNIC_WRITE (PG0_RSAR1, output_page);
256  STNIC_WRITE (STNIC_CR, CR_RWR | CR_PG0 | CR_STA);
257
258  if (length & 1)
259    length++;
260
261  while (length > 0)
262    {
263#ifdef __LITTLE_ENDIAN__
264      *(vhalf *) PA_83902_IF = ((half) buf[1] << 8) | buf[0];
265#else
266      *(vhalf *) PA_83902_IF = ((half) buf[0] << 8) | buf[1];
267#endif
268      STNIC_DELAY ();
269      buf += sizeof (half);
270      length -= sizeof (half);
271    }
272
273  STNIC_WRITE (STNIC_CR, CR_RDMA | CR_PG0 | CR_STA);
274}
275
276/* This function resets the STNIC if something screws up.  */
277static void
278stnic_init (struct net_device *dev)
279{
280  stnic_reset (dev);
281  NS8390_init (dev, 0);
282}
283
284static void __exit stnic_cleanup(void)
285{
286	unregister_netdev(stnic_dev);
287	free_irq(stnic_dev->irq, stnic_dev);
288	free_netdev(stnic_dev);
289}
290
291module_init(stnic_probe);
292module_exit(stnic_cleanup);
293MODULE_LICENSE("GPL");