1/*
  2 * Register cache access API
  3 *
  4 * Copyright 2011 Wolfson Microelectronics plc
  5 *
  6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
  7 *
  8 * This program is free software; you can redistribute it and/or modify
  9 * it under the terms of the GNU General Public License version 2 as
 10 * published by the Free Software Foundation.
 11 */
 12
 13#include <linux/slab.h>
 14#include <linux/export.h>
 15#include <linux/device.h>
 16#include <trace/events/regmap.h>
 17#include <linux/bsearch.h>
 18#include <linux/sort.h>
 19
 20#include "internal.h"
 21
 22static const struct regcache_ops *cache_types[] = {
 23	&regcache_rbtree_ops,
 24	&regcache_lzo_ops,
 25};
 26
 27static int regcache_hw_init(struct regmap *map)
 28{
 29	int i, j;
 30	int ret;
 31	int count;
 32	unsigned int val;
 33	void *tmp_buf;
 34
 35	if (!map->num_reg_defaults_raw)
 36		return -EINVAL;
 37
 38	if (!map->reg_defaults_raw) {
 39		u32 cache_bypass = map->cache_bypass;
 40		dev_warn(map->dev, "No cache defaults, reading back from HW\n");
 41
 42		/* Bypass the cache access till data read from HW*/
 43		map->cache_bypass = 1;
 44		tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
 45		if (!tmp_buf)
 46			return -EINVAL;
 47		ret = regmap_bulk_read(map, 0, tmp_buf,
 48				       map->num_reg_defaults_raw);
 49		map->cache_bypass = cache_bypass;
 50		if (ret < 0) {
 51			kfree(tmp_buf);
 52			return ret;
 53		}
 54		map->reg_defaults_raw = tmp_buf;
 55		map->cache_free = 1;
 56	}
 57
 58	/* calculate the size of reg_defaults */
 59	for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
 60		val = regcache_get_val(map->reg_defaults_raw,
 61				       i, map->cache_word_size);
 62		if (regmap_volatile(map, i * map->reg_stride))
 63			continue;
 64		count++;
 65	}
 66
 67	map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
 68				      GFP_KERNEL);
 69	if (!map->reg_defaults) {
 70		ret = -ENOMEM;
 71		goto err_free;
 72	}
 73
 74	/* fill the reg_defaults */
 75	map->num_reg_defaults = count;
 76	for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
 77		val = regcache_get_val(map->reg_defaults_raw,
 78				       i, map->cache_word_size);
 79		if (regmap_volatile(map, i * map->reg_stride))
 80			continue;
 81		map->reg_defaults[j].reg = i * map->reg_stride;
 82		map->reg_defaults[j].def = val;
 83		j++;
 84	}
 85
 86	return 0;
 87
 88err_free:
 89	if (map->cache_free)
 90		kfree(map->reg_defaults_raw);
 91
 92	return ret;
 93}
 94
 95int regcache_init(struct regmap *map, const struct regmap_config *config)
 96{
 97	int ret;
 98	int i;
 99	void *tmp_buf;
100
101	for (i = 0; i < config->num_reg_defaults; i++)
102		if (config->reg_defaults[i].reg % map->reg_stride)
103			return -EINVAL;
104
105	if (map->cache_type == REGCACHE_NONE) {
106		map->cache_bypass = true;
107		return 0;
108	}
109
110	for (i = 0; i < ARRAY_SIZE(cache_types); i++)
111		if (cache_types[i]->type == map->cache_type)
112			break;
113
114	if (i == ARRAY_SIZE(cache_types)) {
115		dev_err(map->dev, "Could not match compress type: %d\n",
116			map->cache_type);
117		return -EINVAL;
118	}
119
120	map->num_reg_defaults = config->num_reg_defaults;
121	map->num_reg_defaults_raw = config->num_reg_defaults_raw;
122	map->reg_defaults_raw = config->reg_defaults_raw;
123	map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
124	map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
125
126	map->cache = NULL;
127	map->cache_ops = cache_types[i];
128
129	if (!map->cache_ops->read ||
130	    !map->cache_ops->write ||
131	    !map->cache_ops->name)
132		return -EINVAL;
133
134	/* We still need to ensure that the reg_defaults
135	 * won't vanish from under us.  We'll need to make
136	 * a copy of it.
137	 */
138	if (config->reg_defaults) {
139		if (!map->num_reg_defaults)
140			return -EINVAL;
141		tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
142				  sizeof(struct reg_default), GFP_KERNEL);
143		if (!tmp_buf)
144			return -ENOMEM;
145		map->reg_defaults = tmp_buf;
146	} else if (map->num_reg_defaults_raw) {
147		/* Some devices such as PMICs don't have cache defaults,
148		 * we cope with this by reading back the HW registers and
149		 * crafting the cache defaults by hand.
150		 */
151		ret = regcache_hw_init(map);
152		if (ret < 0)
153			return ret;
154	}
155
156	if (!map->max_register)
157		map->max_register = map->num_reg_defaults_raw;
158
159	if (map->cache_ops->init) {
160		dev_dbg(map->dev, "Initializing %s cache\n",
161			map->cache_ops->name);
162		ret = map->cache_ops->init(map);
163		if (ret)
164			goto err_free;
165	}
166	return 0;
167
168err_free:
169	kfree(map->reg_defaults);
170	if (map->cache_free)
171		kfree(map->reg_defaults_raw);
172
173	return ret;
174}
175
176void regcache_exit(struct regmap *map)
177{
178	if (map->cache_type == REGCACHE_NONE)
179		return;
180
181	BUG_ON(!map->cache_ops);
182
183	kfree(map->reg_defaults);
184	if (map->cache_free)
185		kfree(map->reg_defaults_raw);
186
187	if (map->cache_ops->exit) {
188		dev_dbg(map->dev, "Destroying %s cache\n",
189			map->cache_ops->name);
190		map->cache_ops->exit(map);
191	}
192}
193
194/**
195 * regcache_read: Fetch the value of a given register from the cache.
196 *
197 * @map: map to configure.
198 * @reg: The register index.
199 * @value: The value to be returned.
200 *
201 * Return a negative value on failure, 0 on success.
202 */
203int regcache_read(struct regmap *map,
204		  unsigned int reg, unsigned int *value)
205{
206	int ret;
207
208	if (map->cache_type == REGCACHE_NONE)
209		return -ENOSYS;
210
211	BUG_ON(!map->cache_ops);
212
213	if (!regmap_volatile(map, reg)) {
214		ret = map->cache_ops->read(map, reg, value);
215
216		if (ret == 0)
217			trace_regmap_reg_read_cache(map->dev, reg, *value);
218
219		return ret;
220	}
221
222	return -EINVAL;
223}
224
225/**
226 * regcache_write: Set the value of a given register in the cache.
227 *
228 * @map: map to configure.
229 * @reg: The register index.
230 * @value: The new register value.
231 *
232 * Return a negative value on failure, 0 on success.
233 */
234int regcache_write(struct regmap *map,
235		   unsigned int reg, unsigned int value)
236{
237	if (map->cache_type == REGCACHE_NONE)
238		return 0;
239
240	BUG_ON(!map->cache_ops);
241
242	if (!regmap_writeable(map, reg))
243		return -EIO;
244
245	if (!regmap_volatile(map, reg))
246		return map->cache_ops->write(map, reg, value);
247
248	return 0;
249}
250
251/**
252 * regcache_sync: Sync the register cache with the hardware.
253 *
254 * @map: map to configure.
255 *
256 * Any registers that should not be synced should be marked as
257 * volatile.  In general drivers can choose not to use the provided
258 * syncing functionality if they so require.
259 *
260 * Return a negative value on failure, 0 on success.
261 */
262int regcache_sync(struct regmap *map)
263{
264	int ret = 0;
265	unsigned int i;
266	const char *name;
267	unsigned int bypass;
268
269	BUG_ON(!map->cache_ops || !map->cache_ops->sync);
270
271	map->lock(map);
272	/* Remember the initial bypass state */
273	bypass = map->cache_bypass;
274	dev_dbg(map->dev, "Syncing %s cache\n",
275		map->cache_ops->name);
276	name = map->cache_ops->name;
277	trace_regcache_sync(map->dev, name, "start");
278
279	if (!map->cache_dirty)
280		goto out;
281
282	/* Apply any patch first */
283	map->cache_bypass = 1;
284	for (i = 0; i < map->patch_regs; i++) {
285		if (map->patch[i].reg % map->reg_stride) {
286			ret = -EINVAL;
287			goto out;
288		}
289		ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
290		if (ret != 0) {
291			dev_err(map->dev, "Failed to write %x = %x: %d\n",
292				map->patch[i].reg, map->patch[i].def, ret);
293			goto out;
294		}
295	}
296	map->cache_bypass = 0;
297
298	ret = map->cache_ops->sync(map, 0, map->max_register);
299
300	if (ret == 0)
301		map->cache_dirty = false;
302
303out:
304	trace_regcache_sync(map->dev, name, "stop");
305	/* Restore the bypass state */
306	map->cache_bypass = bypass;
307	map->unlock(map);
308
309	return ret;
310}
311EXPORT_SYMBOL_GPL(regcache_sync);
312
313/**
314 * regcache_sync_region: Sync part  of the register cache with the hardware.
315 *
316 * @map: map to sync.
317 * @min: first register to sync
318 * @max: last register to sync
319 *
320 * Write all non-default register values in the specified region to
321 * the hardware.
322 *
323 * Return a negative value on failure, 0 on success.
324 */
325int regcache_sync_region(struct regmap *map, unsigned int min,
326			 unsigned int max)
327{
328	int ret = 0;
329	const char *name;
330	unsigned int bypass;
331
332	BUG_ON(!map->cache_ops || !map->cache_ops->sync);
333
334	map->lock(map);
335
336	/* Remember the initial bypass state */
337	bypass = map->cache_bypass;
338
339	name = map->cache_ops->name;
340	dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
341
342	trace_regcache_sync(map->dev, name, "start region");
343
344	if (!map->cache_dirty)
345		goto out;
346
347	ret = map->cache_ops->sync(map, min, max);
348
349out:
350	trace_regcache_sync(map->dev, name, "stop region");
351	/* Restore the bypass state */
352	map->cache_bypass = bypass;
353	map->unlock(map);
354
355	return ret;
356}
357EXPORT_SYMBOL_GPL(regcache_sync_region);
358
359/**
360 * regcache_cache_only: Put a register map into cache only mode
361 *
362 * @map: map to configure
363 * @cache_only: flag if changes should be written to the hardware
364 *
365 * When a register map is marked as cache only writes to the register
366 * map API will only update the register cache, they will not cause
367 * any hardware changes.  This is useful for allowing portions of
368 * drivers to act as though the device were functioning as normal when
369 * it is disabled for power saving reasons.
370 */
371void regcache_cache_only(struct regmap *map, bool enable)
372{
373	map->lock(map);
374	WARN_ON(map->cache_bypass && enable);
375	map->cache_only = enable;
376	trace_regmap_cache_only(map->dev, enable);
377	map->unlock(map);
378}
379EXPORT_SYMBOL_GPL(regcache_cache_only);
380
381/**
382 * regcache_mark_dirty: Mark the register cache as dirty
383 *
384 * @map: map to mark
385 *
386 * Mark the register cache as dirty, for example due to the device
387 * having been powered down for suspend.  If the cache is not marked
388 * as dirty then the cache sync will be suppressed.
389 */
390void regcache_mark_dirty(struct regmap *map)
391{
392	map->lock(map);
393	map->cache_dirty = true;
394	map->unlock(map);
395}
396EXPORT_SYMBOL_GPL(regcache_mark_dirty);
397
398/**
399 * regcache_cache_bypass: Put a register map into cache bypass mode
400 *
401 * @map: map to configure
402 * @cache_bypass: flag if changes should not be written to the hardware
403 *
404 * When a register map is marked with the cache bypass option, writes
405 * to the register map API will only update the hardware and not the
406 * the cache directly.  This is useful when syncing the cache back to
407 * the hardware.
408 */
409void regcache_cache_bypass(struct regmap *map, bool enable)
410{
411	map->lock(map);
412	WARN_ON(map->cache_only && enable);
413	map->cache_bypass = enable;
414	trace_regmap_cache_bypass(map->dev, enable);
415	map->unlock(map);
416}
417EXPORT_SYMBOL_GPL(regcache_cache_bypass);
418
419bool regcache_set_val(void *base, unsigned int idx,
420		      unsigned int val, unsigned int word_size)
421{
422	switch (word_size) {
423	case 1: {
424		u8 *cache = base;
425		if (cache[idx] == val)
426			return true;
427		cache[idx] = val;
428		break;
429	}
430	case 2: {
431		u16 *cache = base;
432		if (cache[idx] == val)
433			return true;
434		cache[idx] = val;
435		break;
436	}
437	case 4: {
438		u32 *cache = base;
439		if (cache[idx] == val)
440			return true;
441		cache[idx] = val;
442		break;
443	}
444	default:
445		BUG();
446	}
447	return false;
448}
449
450unsigned int regcache_get_val(const void *base, unsigned int idx,
451			      unsigned int word_size)
452{
453	if (!base)
454		return -EINVAL;
455
456	switch (word_size) {
457	case 1: {
458		const u8 *cache = base;
459		return cache[idx];
460	}
461	case 2: {
462		const u16 *cache = base;
463		return cache[idx];
464	}
465	case 4: {
466		const u32 *cache = base;
467		return cache[idx];
468	}
469	default:
470		BUG();
471	}
472	/* unreachable */
473	return -1;
474}
475
476static int regcache_default_cmp(const void *a, const void *b)
477{
478	const struct reg_default *_a = a;
479	const struct reg_default *_b = b;
480
481	return _a->reg - _b->reg;
482}
483
484int regcache_lookup_reg(struct regmap *map, unsigned int reg)
485{
486	struct reg_default key;
487	struct reg_default *r;
488
489	key.reg = reg;
490	key.def = 0;
491
492	r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
493		    sizeof(struct reg_default), regcache_default_cmp);
494
495	if (r)
496		return r - map->reg_defaults;
497	else
498		return -ENOENT;
499}