Loading...
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 */
8
9#include <linux/init.h>
10#include <linux/kernel.h>
11#include <linux/delay.h>
12#include <linux/bootmem.h>
13#include <linux/ioport.h>
14#include <linux/pm.h>
15#include <asm/bootinfo.h>
16#include <asm/time.h>
17#include <asm/reboot.h>
18#include <asm/cacheflush.h>
19#include <bcm63xx_board.h>
20#include <bcm63xx_cpu.h>
21#include <bcm63xx_regs.h>
22#include <bcm63xx_io.h>
23
24void bcm63xx_machine_halt(void)
25{
26 printk(KERN_INFO "System halted\n");
27 while (1)
28 ;
29}
30
31static void bcm6348_a1_reboot(void)
32{
33 u32 reg;
34
35 /* soft reset all blocks */
36 printk(KERN_INFO "soft-reseting all blocks ...\n");
37 reg = bcm_perf_readl(PERF_SOFTRESET_REG);
38 reg &= ~SOFTRESET_6348_ALL;
39 bcm_perf_writel(reg, PERF_SOFTRESET_REG);
40 mdelay(10);
41
42 reg = bcm_perf_readl(PERF_SOFTRESET_REG);
43 reg |= SOFTRESET_6348_ALL;
44 bcm_perf_writel(reg, PERF_SOFTRESET_REG);
45 mdelay(10);
46
47 /* Jump to the power on address. */
48 printk(KERN_INFO "jumping to reset vector.\n");
49 /* set high vectors (base at 0xbfc00000 */
50 set_c0_status(ST0_BEV | ST0_ERL);
51 /* run uncached in kseg0 */
52 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
53 __flush_cache_all();
54 /* remove all wired TLB entries */
55 write_c0_wired(0);
56 __asm__ __volatile__(
57 "jr\t%0"
58 :
59 : "r" (0xbfc00000));
60 while (1)
61 ;
62}
63
64void bcm63xx_machine_reboot(void)
65{
66 u32 reg;
67
68 /* mask and clear all external irq */
69 reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
70 reg &= ~EXTIRQ_CFG_MASK_ALL;
71 reg |= EXTIRQ_CFG_CLEAR_ALL;
72 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
73
74 if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
75 bcm6348_a1_reboot();
76
77 printk(KERN_INFO "triggering watchdog soft-reset...\n");
78 reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
79 reg |= SYS_PLL_SOFT_RESET;
80 bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
81 while (1)
82 ;
83}
84
85static void __bcm63xx_machine_reboot(char *p)
86{
87 bcm63xx_machine_reboot();
88}
89
90/*
91 * return system type in /proc/cpuinfo
92 */
93const char *get_system_type(void)
94{
95 static char buf[128];
96 snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)",
97 board_get_name(),
98 bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
99 return buf;
100}
101
102void __init plat_time_init(void)
103{
104 mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
105}
106
107void __init plat_mem_setup(void)
108{
109 add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM);
110
111 _machine_halt = bcm63xx_machine_halt;
112 _machine_restart = __bcm63xx_machine_reboot;
113 pm_power_off = bcm63xx_machine_halt;
114
115 set_io_port_base(0);
116 ioport_resource.start = 0;
117 ioport_resource.end = ~0;
118
119 board_setup();
120}
121
122int __init bcm63xx_register_devices(void)
123{
124 return board_register_devices();
125}
126
127arch_initcall(bcm63xx_register_devices);
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 */
8
9#include <linux/init.h>
10#include <linux/kernel.h>
11#include <linux/delay.h>
12#include <linux/bootmem.h>
13#include <linux/ioport.h>
14#include <linux/pm.h>
15#include <asm/bootinfo.h>
16#include <asm/time.h>
17#include <asm/reboot.h>
18#include <asm/cacheflush.h>
19#include <bcm63xx_board.h>
20#include <bcm63xx_cpu.h>
21#include <bcm63xx_regs.h>
22#include <bcm63xx_io.h>
23
24void bcm63xx_machine_halt(void)
25{
26 printk(KERN_INFO "System halted\n");
27 while (1)
28 ;
29}
30
31static void bcm6348_a1_reboot(void)
32{
33 u32 reg;
34
35 /* soft reset all blocks */
36 printk(KERN_INFO "soft-resetting all blocks ...\n");
37 reg = bcm_perf_readl(PERF_SOFTRESET_REG);
38 reg &= ~SOFTRESET_6348_ALL;
39 bcm_perf_writel(reg, PERF_SOFTRESET_REG);
40 mdelay(10);
41
42 reg = bcm_perf_readl(PERF_SOFTRESET_REG);
43 reg |= SOFTRESET_6348_ALL;
44 bcm_perf_writel(reg, PERF_SOFTRESET_REG);
45 mdelay(10);
46
47 /* Jump to the power on address. */
48 printk(KERN_INFO "jumping to reset vector.\n");
49 /* set high vectors (base at 0xbfc00000 */
50 set_c0_status(ST0_BEV | ST0_ERL);
51 /* run uncached in kseg0 */
52 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
53 __flush_cache_all();
54 /* remove all wired TLB entries */
55 write_c0_wired(0);
56 __asm__ __volatile__(
57 "jr\t%0"
58 :
59 : "r" (0xbfc00000));
60 while (1)
61 ;
62}
63
64void bcm63xx_machine_reboot(void)
65{
66 u32 reg, perf_regs[2] = { 0, 0 };
67 unsigned int i;
68
69 /* mask and clear all external irq */
70 switch (bcm63xx_get_cpu_id()) {
71 case BCM6338_CPU_ID:
72 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
73 break;
74 case BCM6348_CPU_ID:
75 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348;
76 break;
77 case BCM6358_CPU_ID:
78 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6358;
79 break;
80 }
81
82 for (i = 0; i < 2; i++) {
83 reg = bcm_perf_readl(perf_regs[i]);
84 if (BCMCPU_IS_6348()) {
85 reg &= ~EXTIRQ_CFG_MASK_ALL_6348;
86 reg |= EXTIRQ_CFG_CLEAR_ALL_6348;
87 } else {
88 reg &= ~EXTIRQ_CFG_MASK_ALL;
89 reg |= EXTIRQ_CFG_CLEAR_ALL;
90 }
91 bcm_perf_writel(reg, perf_regs[i]);
92 }
93
94 if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
95 bcm6348_a1_reboot();
96
97 printk(KERN_INFO "triggering watchdog soft-reset...\n");
98 reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
99 reg |= SYS_PLL_SOFT_RESET;
100 bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
101 while (1)
102 ;
103}
104
105static void __bcm63xx_machine_reboot(char *p)
106{
107 bcm63xx_machine_reboot();
108}
109
110/*
111 * return system type in /proc/cpuinfo
112 */
113const char *get_system_type(void)
114{
115 static char buf[128];
116 snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)",
117 board_get_name(),
118 bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
119 return buf;
120}
121
122void __init plat_time_init(void)
123{
124 mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
125}
126
127void __init plat_mem_setup(void)
128{
129 add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM);
130
131 _machine_halt = bcm63xx_machine_halt;
132 _machine_restart = __bcm63xx_machine_reboot;
133 pm_power_off = bcm63xx_machine_halt;
134
135 set_io_port_base(0);
136 ioport_resource.start = 0;
137 ioport_resource.end = ~0;
138
139 board_setup();
140}
141
142int __init bcm63xx_register_devices(void)
143{
144 return board_register_devices();
145}
146
147device_initcall(bcm63xx_register_devices);