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1/*
2 * linux/arch/arm/mm/arm740.S: utility functions for ARM740
3 *
4 * Copyright (C) 2004-2006 Hyok S. Choi (hyok.choi@samsung.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/assembler.h>
14#include <asm/asm-offsets.h>
15#include <asm/hwcap.h>
16#include <asm/pgtable-hwdef.h>
17#include <asm/pgtable.h>
18#include <asm/ptrace.h>
19
20#include "proc-macros.S"
21
22 .text
23/*
24 * cpu_arm740_proc_init()
25 * cpu_arm740_do_idle()
26 * cpu_arm740_dcache_clean_area()
27 * cpu_arm740_switch_mm()
28 *
29 * These are not required.
30 */
31ENTRY(cpu_arm740_proc_init)
32ENTRY(cpu_arm740_do_idle)
33ENTRY(cpu_arm740_dcache_clean_area)
34ENTRY(cpu_arm740_switch_mm)
35 mov pc, lr
36
37/*
38 * cpu_arm740_proc_fin()
39 */
40ENTRY(cpu_arm740_proc_fin)
41 mrc p15, 0, r0, c1, c0, 0
42 bic r0, r0, #0x3f000000 @ bank/f/lock/s
43 bic r0, r0, #0x0000000c @ w-buffer/cache
44 mcr p15, 0, r0, c1, c0, 0 @ disable caches
45 mov pc, lr
46
47/*
48 * cpu_arm740_reset(loc)
49 * Params : r0 = address to jump to
50 * Notes : This sets up everything for a reset
51 */
52ENTRY(cpu_arm740_reset)
53 mov ip, #0
54 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
55 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
56 bic ip, ip, #0x0000000c @ ............wc..
57 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
58 mov pc, r0
59
60 __CPUINIT
61
62 .type __arm740_setup, #function
63__arm740_setup:
64 mov r0, #0
65 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
66
67 mcr p15, 0, r0, c6, c3 @ disable area 3~7
68 mcr p15, 0, r0, c6, c4
69 mcr p15, 0, r0, c6, c5
70 mcr p15, 0, r0, c6, c6
71 mcr p15, 0, r0, c6, c7
72
73 mov r0, #0x0000003F @ base = 0, size = 4GB
74 mcr p15, 0, r0, c6, c0 @ set area 0, default
75
76 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
77 ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
78 mov r2, #10 @ 11 is the minimum (4KB)
791: add r2, r2, #1 @ area size *= 2
80 mov r1, r1, lsr #1
81 bne 1b @ count not zero r-shift
82 orr r0, r0, r2, lsl #1 @ the area register value
83 orr r0, r0, #1 @ set enable bit
84 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
85
86 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
87 ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
88 mov r2, #10 @ 11 is the minimum (4KB)
891: add r2, r2, #1 @ area size *= 2
90 mov r1, r1, lsr #1
91 bne 1b @ count not zero r-shift
92 orr r0, r0, r2, lsl #1 @ the area register value
93 orr r0, r0, #1 @ set enable bit
94 mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
95
96 mov r0, #0x06
97 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
98#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
99 mov r0, #0x00 @ disable whole write buffer
100#else
101 mov r0, #0x02 @ Region 1 write bufferred
102#endif
103 mcr p15, 0, r0, c3, c0
104
105 mov r0, #0x10000
106 sub r0, r0, #1 @ r0 = 0xffff
107 mcr p15, 0, r0, c5, c0 @ all read/write access
108
109 mrc p15, 0, r0, c1, c0 @ get control register
110 bic r0, r0, #0x3F000000 @ set to standard caching mode
111 @ need some benchmark
112 orr r0, r0, #0x0000000d @ MPU/Cache/WB
113
114 mov pc, lr
115
116 .size __arm740_setup, . - __arm740_setup
117
118 __INITDATA
119
120 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
121 define_processor_functions arm740, dabort=v4t_late_abort, pabort=legacy_pabort, nommu=1
122
123 .section ".rodata"
124
125 string cpu_arch_name, "armv4"
126 string cpu_elf_name, "v4"
127 string cpu_arm740_name, "ARM740T"
128
129 .align
130
131 .section ".proc.info.init", #alloc, #execinstr
132 .type __arm740_proc_info,#object
133__arm740_proc_info:
134 .long 0x41807400
135 .long 0xfffffff0
136 .long 0
137 b __arm740_setup
138 .long cpu_arch_name
139 .long cpu_elf_name
140 .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
141 .long cpu_arm740_name
142 .long arm740_processor_functions
143 .long 0
144 .long 0
145 .long v3_cache_fns @ cache model
146 .size __arm740_proc_info, . - __arm740_proc_info
1/*
2 * linux/arch/arm/mm/arm740.S: utility functions for ARM740
3 *
4 * Copyright (C) 2004-2006 Hyok S. Choi (hyok.choi@samsung.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/assembler.h>
14#include <asm/asm-offsets.h>
15#include <asm/hwcap.h>
16#include <asm/pgtable-hwdef.h>
17#include <asm/pgtable.h>
18#include <asm/ptrace.h>
19
20#include "proc-macros.S"
21
22 .text
23/*
24 * cpu_arm740_proc_init()
25 * cpu_arm740_do_idle()
26 * cpu_arm740_dcache_clean_area()
27 * cpu_arm740_switch_mm()
28 *
29 * These are not required.
30 */
31ENTRY(cpu_arm740_proc_init)
32ENTRY(cpu_arm740_do_idle)
33ENTRY(cpu_arm740_dcache_clean_area)
34ENTRY(cpu_arm740_switch_mm)
35 mov pc, lr
36
37/*
38 * cpu_arm740_proc_fin()
39 */
40ENTRY(cpu_arm740_proc_fin)
41 mrc p15, 0, r0, c1, c0, 0
42 bic r0, r0, #0x3f000000 @ bank/f/lock/s
43 bic r0, r0, #0x0000000c @ w-buffer/cache
44 mcr p15, 0, r0, c1, c0, 0 @ disable caches
45 mov pc, lr
46
47/*
48 * cpu_arm740_reset(loc)
49 * Params : r0 = address to jump to
50 * Notes : This sets up everything for a reset
51 */
52 .pushsection .idmap.text, "ax"
53ENTRY(cpu_arm740_reset)
54 mov ip, #0
55 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
56 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
57 bic ip, ip, #0x0000000c @ ............wc..
58 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
59 mov pc, r0
60ENDPROC(cpu_arm740_reset)
61 .popsection
62
63 __CPUINIT
64
65 .type __arm740_setup, #function
66__arm740_setup:
67 mov r0, #0
68 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
69
70 mcr p15, 0, r0, c6, c3 @ disable area 3~7
71 mcr p15, 0, r0, c6, c4
72 mcr p15, 0, r0, c6, c5
73 mcr p15, 0, r0, c6, c6
74 mcr p15, 0, r0, c6, c7
75
76 mov r0, #0x0000003F @ base = 0, size = 4GB
77 mcr p15, 0, r0, c6, c0 @ set area 0, default
78
79 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
80 ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
81 mov r2, #10 @ 11 is the minimum (4KB)
821: add r2, r2, #1 @ area size *= 2
83 mov r1, r1, lsr #1
84 bne 1b @ count not zero r-shift
85 orr r0, r0, r2, lsl #1 @ the area register value
86 orr r0, r0, #1 @ set enable bit
87 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
88
89 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
90 ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
91 mov r2, #10 @ 11 is the minimum (4KB)
921: add r2, r2, #1 @ area size *= 2
93 mov r1, r1, lsr #1
94 bne 1b @ count not zero r-shift
95 orr r0, r0, r2, lsl #1 @ the area register value
96 orr r0, r0, #1 @ set enable bit
97 mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
98
99 mov r0, #0x06
100 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
101#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
102 mov r0, #0x00 @ disable whole write buffer
103#else
104 mov r0, #0x02 @ Region 1 write bufferred
105#endif
106 mcr p15, 0, r0, c3, c0
107
108 mov r0, #0x10000
109 sub r0, r0, #1 @ r0 = 0xffff
110 mcr p15, 0, r0, c5, c0 @ all read/write access
111
112 mrc p15, 0, r0, c1, c0 @ get control register
113 bic r0, r0, #0x3F000000 @ set to standard caching mode
114 @ need some benchmark
115 orr r0, r0, #0x0000000d @ MPU/Cache/WB
116
117 mov pc, lr
118
119 .size __arm740_setup, . - __arm740_setup
120
121 __INITDATA
122
123 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
124 define_processor_functions arm740, dabort=v4t_late_abort, pabort=legacy_pabort, nommu=1
125
126 .section ".rodata"
127
128 string cpu_arch_name, "armv4"
129 string cpu_elf_name, "v4"
130 string cpu_arm740_name, "ARM740T"
131
132 .align
133
134 .section ".proc.info.init", #alloc, #execinstr
135 .type __arm740_proc_info,#object
136__arm740_proc_info:
137 .long 0x41807400
138 .long 0xfffffff0
139 .long 0
140 b __arm740_setup
141 .long cpu_arch_name
142 .long cpu_elf_name
143 .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
144 .long cpu_arm740_name
145 .long arm740_processor_functions
146 .long 0
147 .long 0
148 .long v3_cache_fns @ cache model
149 .size __arm740_proc_info, . - __arm740_proc_info