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1/*
2 * Copyright (c) 2010-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef ATH9K_HW_OPS_H
18#define ATH9K_HW_OPS_H
19
20#include "hw.h"
21
22/* Hardware core and driver accessible callbacks */
23
24static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
25 int restore,
26 int power_off)
27{
28 ath9k_hw_ops(ah)->config_pci_powersave(ah, restore, power_off);
29}
30
31static inline void ath9k_hw_rxena(struct ath_hw *ah)
32{
33 ath9k_hw_ops(ah)->rx_enable(ah);
34}
35
36static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
37 u32 link)
38{
39 ath9k_hw_ops(ah)->set_desc_link(ds, link);
40}
41
42static inline bool ath9k_hw_calibrate(struct ath_hw *ah,
43 struct ath9k_channel *chan,
44 u8 rxchainmask,
45 bool longcal)
46{
47 return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
48}
49
50static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
51{
52 return ath9k_hw_ops(ah)->get_isr(ah, masked);
53}
54
55static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen,
56 bool is_firstseg, bool is_lastseg,
57 const void *ds0, dma_addr_t buf_addr,
58 unsigned int qcu)
59{
60 ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg,
61 ds0, buf_addr, qcu);
62}
63
64static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
65 struct ath_tx_status *ts)
66{
67 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
68}
69
70static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
71 u32 pktLen, enum ath9k_pkt_type type,
72 u32 txPower, u32 keyIx,
73 enum ath9k_key_type keyType,
74 u32 flags)
75{
76 ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx,
77 keyType, flags);
78}
79
80static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
81 void *lastds,
82 u32 durUpdateEn, u32 rtsctsRate,
83 u32 rtsctsDuration,
84 struct ath9k_11n_rate_series series[],
85 u32 nseries, u32 flags)
86{
87 ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn,
88 rtsctsRate, rtsctsDuration, series,
89 nseries, flags);
90}
91
92static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
93 u32 aggrLen)
94{
95 ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen);
96}
97
98static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
99 u32 numDelims)
100{
101 ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims);
102}
103
104static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
105{
106 ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds);
107}
108
109static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
110{
111 ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
112}
113
114static inline void ath9k_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
115{
116 ath9k_hw_ops(ah)->set_clrdmask(ah, ds, val);
117}
118
119static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
120 struct ath_hw_antcomb_conf *antconf)
121{
122 ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf);
123}
124
125static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
126 struct ath_hw_antcomb_conf *antconf)
127{
128 ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf);
129}
130
131/* Private hardware call ops */
132
133/* PHY ops */
134
135static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
136 struct ath9k_channel *chan)
137{
138 return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
139}
140
141static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
142 struct ath9k_channel *chan)
143{
144 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
145}
146
147static inline int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
148{
149 if (!ath9k_hw_private_ops(ah)->rf_alloc_ext_banks)
150 return 0;
151
152 return ath9k_hw_private_ops(ah)->rf_alloc_ext_banks(ah);
153}
154
155static inline void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
156{
157 if (!ath9k_hw_private_ops(ah)->rf_free_ext_banks)
158 return;
159
160 ath9k_hw_private_ops(ah)->rf_free_ext_banks(ah);
161}
162
163static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
164 struct ath9k_channel *chan,
165 u16 modesIndex)
166{
167 if (!ath9k_hw_private_ops(ah)->set_rf_regs)
168 return true;
169
170 return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
171}
172
173static inline void ath9k_hw_init_bb(struct ath_hw *ah,
174 struct ath9k_channel *chan)
175{
176 return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
177}
178
179static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
180 struct ath9k_channel *chan)
181{
182 return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
183}
184
185static inline int ath9k_hw_process_ini(struct ath_hw *ah,
186 struct ath9k_channel *chan)
187{
188 return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
189}
190
191static inline void ath9k_olc_init(struct ath_hw *ah)
192{
193 if (!ath9k_hw_private_ops(ah)->olc_init)
194 return;
195
196 return ath9k_hw_private_ops(ah)->olc_init(ah);
197}
198
199static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
200 struct ath9k_channel *chan)
201{
202 return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
203}
204
205static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
206{
207 return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
208}
209
210static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
211 struct ath9k_channel *chan)
212{
213 return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
214}
215
216static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
217{
218 return ath9k_hw_private_ops(ah)->rfbus_req(ah);
219}
220
221static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
222{
223 return ath9k_hw_private_ops(ah)->rfbus_done(ah);
224}
225
226static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
227{
228 if (!ath9k_hw_private_ops(ah)->restore_chainmask)
229 return;
230
231 return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
232}
233
234static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value)
235{
236 return ath9k_hw_private_ops(ah)->set_diversity(ah, value);
237}
238
239static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
240 enum ath9k_ani_cmd cmd, int param)
241{
242 return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
243}
244
245static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
246 int16_t nfarray[NUM_NF_READINGS])
247{
248 ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
249}
250
251static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
252 struct ath9k_channel *chan)
253{
254 return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
255}
256
257static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
258 struct ath9k_cal_list *currCal)
259{
260 ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
261}
262
263#endif /* ATH9K_HW_OPS_H */
1/*
2 * Copyright (c) 2010-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef ATH9K_HW_OPS_H
18#define ATH9K_HW_OPS_H
19
20#include "hw.h"
21
22/* Hardware core and driver accessible callbacks */
23
24static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
25 bool power_off)
26{
27 if (!ah->aspm_enabled)
28 return;
29
30 ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
31}
32
33static inline void ath9k_hw_rxena(struct ath_hw *ah)
34{
35 ath9k_hw_ops(ah)->rx_enable(ah);
36}
37
38static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
39 u32 link)
40{
41 ath9k_hw_ops(ah)->set_desc_link(ds, link);
42}
43
44static inline bool ath9k_hw_calibrate(struct ath_hw *ah,
45 struct ath9k_channel *chan,
46 u8 rxchainmask,
47 bool longcal)
48{
49 return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
50}
51
52static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked,
53 u32 *sync_cause_p)
54{
55 return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p);
56}
57
58static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
59 struct ath_tx_info *i)
60{
61 return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
62}
63
64static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
65 struct ath_tx_status *ts)
66{
67 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
68}
69
70static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
71 struct ath_hw_antcomb_conf *antconf)
72{
73 ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf);
74}
75
76static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
77 struct ath_hw_antcomb_conf *antconf)
78{
79 ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf);
80}
81
82static inline void ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum)
83{
84 ath9k_hw_ops(ah)->tx99_start(ah, qnum);
85}
86
87static inline void ath9k_hw_tx99_stop(struct ath_hw *ah)
88{
89 ath9k_hw_ops(ah)->tx99_stop(ah);
90}
91
92static inline void ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power)
93{
94 if (ath9k_hw_ops(ah)->tx99_set_txpower)
95 ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
96}
97
98#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
99
100static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
101{
102 if (ath9k_hw_ops(ah)->set_bt_ant_diversity)
103 ath9k_hw_ops(ah)->set_bt_ant_diversity(ah, enable);
104}
105
106#endif
107
108/* Private hardware call ops */
109
110static inline void ath9k_hw_init_hang_checks(struct ath_hw *ah)
111{
112 ath9k_hw_private_ops(ah)->init_hang_checks(ah);
113}
114
115static inline bool ath9k_hw_detect_mac_hang(struct ath_hw *ah)
116{
117 return ath9k_hw_private_ops(ah)->detect_mac_hang(ah);
118}
119
120static inline bool ath9k_hw_detect_bb_hang(struct ath_hw *ah)
121{
122 return ath9k_hw_private_ops(ah)->detect_bb_hang(ah);
123}
124
125/* PHY ops */
126
127static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
128 struct ath9k_channel *chan)
129{
130 return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
131}
132
133static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
134 struct ath9k_channel *chan)
135{
136 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
137}
138
139static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
140 struct ath9k_channel *chan,
141 u16 modesIndex)
142{
143 if (!ath9k_hw_private_ops(ah)->set_rf_regs)
144 return true;
145
146 return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
147}
148
149static inline void ath9k_hw_init_bb(struct ath_hw *ah,
150 struct ath9k_channel *chan)
151{
152 return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
153}
154
155static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
156 struct ath9k_channel *chan)
157{
158 return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
159}
160
161static inline int ath9k_hw_process_ini(struct ath_hw *ah,
162 struct ath9k_channel *chan)
163{
164 return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
165}
166
167static inline void ath9k_olc_init(struct ath_hw *ah)
168{
169 if (!ath9k_hw_private_ops(ah)->olc_init)
170 return;
171
172 return ath9k_hw_private_ops(ah)->olc_init(ah);
173}
174
175static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
176 struct ath9k_channel *chan)
177{
178 return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
179}
180
181static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
182{
183 return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
184}
185
186static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
187 struct ath9k_channel *chan)
188{
189 return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
190}
191
192static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
193{
194 return ath9k_hw_private_ops(ah)->rfbus_req(ah);
195}
196
197static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
198{
199 return ath9k_hw_private_ops(ah)->rfbus_done(ah);
200}
201
202static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
203{
204 if (!ath9k_hw_private_ops(ah)->restore_chainmask)
205 return;
206
207 return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
208}
209
210static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
211 enum ath9k_ani_cmd cmd, int param)
212{
213 return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
214}
215
216static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
217 int16_t nfarray[NUM_NF_READINGS])
218{
219 ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
220}
221
222static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
223 struct ath9k_channel *chan)
224{
225 return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
226}
227
228static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
229 struct ath9k_cal_list *currCal)
230{
231 ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
232}
233
234static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah,
235 struct ath9k_channel *chan,
236 u8 *ini_reloaded)
237{
238 return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan,
239 ini_reloaded);
240}
241
242static inline void ath9k_hw_set_radar_params(struct ath_hw *ah)
243{
244 if (!ath9k_hw_private_ops(ah)->set_radar_params)
245 return;
246
247 ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf);
248}
249
250static inline void ath9k_hw_init_cal_settings(struct ath_hw *ah)
251{
252 ath9k_hw_private_ops(ah)->init_cal_settings(ah);
253}
254
255static inline u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
256 struct ath9k_channel *chan)
257{
258 return ath9k_hw_private_ops(ah)->compute_pll_control(ah, chan);
259}
260
261static inline void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
262{
263 if (!ath9k_hw_private_ops(ah)->init_mode_gain_regs)
264 return;
265
266 ath9k_hw_private_ops(ah)->init_mode_gain_regs(ah);
267}
268
269static inline void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)
270{
271 if (!ath9k_hw_private_ops(ah)->ani_cache_ini_regs)
272 return;
273
274 ath9k_hw_private_ops(ah)->ani_cache_ini_regs(ah);
275}
276
277#endif /* ATH9K_HW_OPS_H */