1/*
  2 * Copyright (c) 2005-2011 Atheros Communications Inc.
  3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4 *
  5 * Permission to use, copy, modify, and/or distribute this software for any
  6 * purpose with or without fee is hereby granted, provided that the above
  7 * copyright notice and this permission notice appear in all copies.
  8 *
  9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 16 */
 17
 18#ifndef _BMI_H_
 19#define _BMI_H_
 20
 21#include "core.h"
 22
 23/*
 24 * Bootloader Messaging Interface (BMI)
 25 *
 26 * BMI is a very simple messaging interface used during initialization
 27 * to read memory, write memory, execute code, and to define an
 28 * application entry PC.
 29 *
 30 * It is used to download an application to QCA988x, to provide
 31 * patches to code that is already resident on QCA988x, and generally
 32 * to examine and modify state.  The Host has an opportunity to use
 33 * BMI only once during bootup.  Once the Host issues a BMI_DONE
 34 * command, this opportunity ends.
 35 *
 36 * The Host writes BMI requests to mailbox0, and reads BMI responses
 37 * from mailbox0.   BMI requests all begin with a command
 38 * (see below for specific commands), and are followed by
 39 * command-specific data.
 40 *
 41 * Flow control:
 42 * The Host can only issue a command once the Target gives it a
 43 * "BMI Command Credit", using AR8K Counter #4.  As soon as the
 44 * Target has completed a command, it issues another BMI Command
 45 * Credit (so the Host can issue the next command).
 46 *
 47 * BMI handles all required Target-side cache flushing.
 48 */
 49
 50/* Maximum data size used for BMI transfers */
 51#define BMI_MAX_DATA_SIZE	256
 52
 53/* len = cmd + addr + length */
 54#define BMI_MAX_CMDBUF_SIZE (BMI_MAX_DATA_SIZE + \
 55			sizeof(u32) + \
 56			sizeof(u32) + \
 57			sizeof(u32))
 58
 59/* BMI Commands */
 60
 61enum bmi_cmd_id {
 62	BMI_NO_COMMAND          = 0,
 63	BMI_DONE                = 1,
 64	BMI_READ_MEMORY         = 2,
 65	BMI_WRITE_MEMORY        = 3,
 66	BMI_EXECUTE             = 4,
 67	BMI_SET_APP_START       = 5,
 68	BMI_READ_SOC_REGISTER   = 6,
 69	BMI_READ_SOC_WORD       = 6,
 70	BMI_WRITE_SOC_REGISTER  = 7,
 71	BMI_WRITE_SOC_WORD      = 7,
 72	BMI_GET_TARGET_ID       = 8,
 73	BMI_GET_TARGET_INFO     = 8,
 74	BMI_ROMPATCH_INSTALL    = 9,
 75	BMI_ROMPATCH_UNINSTALL  = 10,
 76	BMI_ROMPATCH_ACTIVATE   = 11,
 77	BMI_ROMPATCH_DEACTIVATE = 12,
 78	BMI_LZ_STREAM_START     = 13, /* should be followed by LZ_DATA */
 79	BMI_LZ_DATA             = 14,
 80	BMI_NVRAM_PROCESS       = 15,
 81};
 82
 83#define BMI_NVRAM_SEG_NAME_SZ 16
 84
 85struct bmi_cmd {
 86	__le32 id; /* enum bmi_cmd_id */
 87	union {
 88		struct {
 89		} done;
 90		struct {
 91			__le32 addr;
 92			__le32 len;
 93		} read_mem;
 94		struct {
 95			__le32 addr;
 96			__le32 len;
 97			u8 payload[0];
 98		} write_mem;
 99		struct {
100			__le32 addr;
101			__le32 param;
102		} execute;
103		struct {
104			__le32 addr;
105		} set_app_start;
106		struct {
107			__le32 addr;
108		} read_soc_reg;
109		struct {
110			__le32 addr;
111			__le32 value;
112		} write_soc_reg;
113		struct {
114		} get_target_info;
115		struct {
116			__le32 rom_addr;
117			__le32 ram_addr; /* or value */
118			__le32 size;
119			__le32 activate; /* 0=install, but dont activate */
120		} rompatch_install;
121		struct {
122			__le32 patch_id;
123		} rompatch_uninstall;
124		struct {
125			__le32 count;
126			__le32 patch_ids[0]; /* length of @count */
127		} rompatch_activate;
128		struct {
129			__le32 count;
130			__le32 patch_ids[0]; /* length of @count */
131		} rompatch_deactivate;
132		struct {
133			__le32 addr;
134		} lz_start;
135		struct {
136			__le32 len; /* max BMI_MAX_DATA_SIZE */
137			u8 payload[0]; /* length of @len */
138		} lz_data;
139		struct {
140			u8 name[BMI_NVRAM_SEG_NAME_SZ];
141		} nvram_process;
142		u8 payload[BMI_MAX_CMDBUF_SIZE];
143	};
144} __packed;
145
146union bmi_resp {
147	struct {
148		u8 payload[0];
149	} read_mem;
150	struct {
151		__le32 result;
152	} execute;
153	struct {
154		__le32 value;
155	} read_soc_reg;
156	struct {
157		__le32 len;
158		__le32 version;
159		__le32 type;
160	} get_target_info;
161	struct {
162		__le32 patch_id;
163	} rompatch_install;
164	struct {
165		__le32 patch_id;
166	} rompatch_uninstall;
167	struct {
168		/* 0 = nothing executed
169		 * otherwise = NVRAM segment return value */
170		__le32 result;
171	} nvram_process;
172	u8 payload[BMI_MAX_CMDBUF_SIZE];
173} __packed;
174
175struct bmi_target_info {
176	u32 version;
177	u32 type;
178};
179
180
181/* in msec */
182#define BMI_COMMUNICATION_TIMEOUT_HZ (1*HZ)
183
184#define BMI_CE_NUM_TO_TARG 0
185#define BMI_CE_NUM_TO_HOST 1
186
187void ath10k_bmi_start(struct ath10k *ar);
188int ath10k_bmi_done(struct ath10k *ar);
189int ath10k_bmi_get_target_info(struct ath10k *ar,
190			       struct bmi_target_info *target_info);
191int ath10k_bmi_read_memory(struct ath10k *ar, u32 address,
192			   void *buffer, u32 length);
193int ath10k_bmi_write_memory(struct ath10k *ar, u32 address,
194			    const void *buffer, u32 length);
195
196#define ath10k_bmi_read32(ar, item, val)				\
197	({								\
198		int ret;						\
199		u32 addr;						\
200		__le32 tmp;						\
201									\
202		addr = host_interest_item_address(HI_ITEM(item));	\
203		ret = ath10k_bmi_read_memory(ar, addr, (u8 *)&tmp, 4); \
204		*val = __le32_to_cpu(tmp);				\
205		ret;							\
206	 })
207
208#define ath10k_bmi_write32(ar, item, val)				\
209	({								\
210		int ret;						\
211		u32 address;						\
212		__le32 v = __cpu_to_le32(val);				\
213									\
214		address = host_interest_item_address(HI_ITEM(item));	\
215		ret = ath10k_bmi_write_memory(ar, address,		\
216					      (u8 *)&v, sizeof(v));	\
217		ret;							\
218	})
219
220int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 *param);
221int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address);
222int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length);
223int ath10k_bmi_fast_download(struct ath10k *ar, u32 address,
224			     const void *buffer, u32 length);
225#endif /* _BMI_H_ */