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1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
7 */
8
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/slab.h>
13#include <linux/gpio.h>
14#include <linux/irq.h>
15#include <linux/interrupt.h>
16#include <linux/mfd/tc3589x.h>
17
18/*
19 * These registers are modified under the irq bus lock and cached to avoid
20 * unnecessary writes in bus_sync_unlock.
21 */
22enum { REG_IBE, REG_IEV, REG_IS, REG_IE };
23
24#define CACHE_NR_REGS 4
25#define CACHE_NR_BANKS 3
26
27struct tc3589x_gpio {
28 struct gpio_chip chip;
29 struct tc3589x *tc3589x;
30 struct device *dev;
31 struct mutex irq_lock;
32
33 int irq_base;
34
35 /* Caches of interrupt control registers for bus_lock */
36 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
37 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
38};
39
40static inline struct tc3589x_gpio *to_tc3589x_gpio(struct gpio_chip *chip)
41{
42 return container_of(chip, struct tc3589x_gpio, chip);
43}
44
45static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset)
46{
47 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
48 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
49 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
50 u8 mask = 1 << (offset % 8);
51 int ret;
52
53 ret = tc3589x_reg_read(tc3589x, reg);
54 if (ret < 0)
55 return ret;
56
57 return ret & mask;
58}
59
60static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
61{
62 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
63 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
64 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
65 unsigned pos = offset % 8;
66 u8 data[] = {!!val << pos, 1 << pos};
67
68 tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
69}
70
71static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
72 unsigned offset, int val)
73{
74 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
75 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
76 u8 reg = TC3589x_GPIODIR0 + offset / 8;
77 unsigned pos = offset % 8;
78
79 tc3589x_gpio_set(chip, offset, val);
80
81 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos);
82}
83
84static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
85 unsigned offset)
86{
87 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
88 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
89 u8 reg = TC3589x_GPIODIR0 + offset / 8;
90 unsigned pos = offset % 8;
91
92 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0);
93}
94
95static int tc3589x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
96{
97 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
98
99 return tc3589x_gpio->irq_base + offset;
100}
101
102static struct gpio_chip template_chip = {
103 .label = "tc3589x",
104 .owner = THIS_MODULE,
105 .direction_input = tc3589x_gpio_direction_input,
106 .get = tc3589x_gpio_get,
107 .direction_output = tc3589x_gpio_direction_output,
108 .set = tc3589x_gpio_set,
109 .to_irq = tc3589x_gpio_to_irq,
110 .can_sleep = 1,
111};
112
113static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
114{
115 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
116 int offset = d->irq - tc3589x_gpio->irq_base;
117 int regoffset = offset / 8;
118 int mask = 1 << (offset % 8);
119
120 if (type == IRQ_TYPE_EDGE_BOTH) {
121 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
122 return 0;
123 }
124
125 tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask;
126
127 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
128 tc3589x_gpio->regs[REG_IS][regoffset] |= mask;
129 else
130 tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask;
131
132 if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)
133 tc3589x_gpio->regs[REG_IEV][regoffset] |= mask;
134 else
135 tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask;
136
137 return 0;
138}
139
140static void tc3589x_gpio_irq_lock(struct irq_data *d)
141{
142 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
143
144 mutex_lock(&tc3589x_gpio->irq_lock);
145}
146
147static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d)
148{
149 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
150 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
151 static const u8 regmap[] = {
152 [REG_IBE] = TC3589x_GPIOIBE0,
153 [REG_IEV] = TC3589x_GPIOIEV0,
154 [REG_IS] = TC3589x_GPIOIS0,
155 [REG_IE] = TC3589x_GPIOIE0,
156 };
157 int i, j;
158
159 for (i = 0; i < CACHE_NR_REGS; i++) {
160 for (j = 0; j < CACHE_NR_BANKS; j++) {
161 u8 old = tc3589x_gpio->oldregs[i][j];
162 u8 new = tc3589x_gpio->regs[i][j];
163
164 if (new == old)
165 continue;
166
167 tc3589x_gpio->oldregs[i][j] = new;
168 tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
169 }
170 }
171
172 mutex_unlock(&tc3589x_gpio->irq_lock);
173}
174
175static void tc3589x_gpio_irq_mask(struct irq_data *d)
176{
177 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
178 int offset = d->irq - tc3589x_gpio->irq_base;
179 int regoffset = offset / 8;
180 int mask = 1 << (offset % 8);
181
182 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
183}
184
185static void tc3589x_gpio_irq_unmask(struct irq_data *d)
186{
187 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
188 int offset = d->irq - tc3589x_gpio->irq_base;
189 int regoffset = offset / 8;
190 int mask = 1 << (offset % 8);
191
192 tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
193}
194
195static struct irq_chip tc3589x_gpio_irq_chip = {
196 .name = "tc3589x-gpio",
197 .irq_bus_lock = tc3589x_gpio_irq_lock,
198 .irq_bus_sync_unlock = tc3589x_gpio_irq_sync_unlock,
199 .irq_mask = tc3589x_gpio_irq_mask,
200 .irq_unmask = tc3589x_gpio_irq_unmask,
201 .irq_set_type = tc3589x_gpio_irq_set_type,
202};
203
204static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
205{
206 struct tc3589x_gpio *tc3589x_gpio = dev;
207 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
208 u8 status[CACHE_NR_BANKS];
209 int ret;
210 int i;
211
212 ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0,
213 ARRAY_SIZE(status), status);
214 if (ret < 0)
215 return IRQ_NONE;
216
217 for (i = 0; i < ARRAY_SIZE(status); i++) {
218 unsigned int stat = status[i];
219 if (!stat)
220 continue;
221
222 while (stat) {
223 int bit = __ffs(stat);
224 int line = i * 8 + bit;
225
226 handle_nested_irq(tc3589x_gpio->irq_base + line);
227 stat &= ~(1 << bit);
228 }
229
230 tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]);
231 }
232
233 return IRQ_HANDLED;
234}
235
236static int tc3589x_gpio_irq_init(struct tc3589x_gpio *tc3589x_gpio)
237{
238 int base = tc3589x_gpio->irq_base;
239 int irq;
240
241 for (irq = base; irq < base + tc3589x_gpio->chip.ngpio; irq++) {
242 irq_set_chip_data(irq, tc3589x_gpio);
243 irq_set_chip_and_handler(irq, &tc3589x_gpio_irq_chip,
244 handle_simple_irq);
245 irq_set_nested_thread(irq, 1);
246#ifdef CONFIG_ARM
247 set_irq_flags(irq, IRQF_VALID);
248#else
249 irq_set_noprobe(irq);
250#endif
251 }
252
253 return 0;
254}
255
256static void tc3589x_gpio_irq_remove(struct tc3589x_gpio *tc3589x_gpio)
257{
258 int base = tc3589x_gpio->irq_base;
259 int irq;
260
261 for (irq = base; irq < base + tc3589x_gpio->chip.ngpio; irq++) {
262#ifdef CONFIG_ARM
263 set_irq_flags(irq, 0);
264#endif
265 irq_set_chip_and_handler(irq, NULL, NULL);
266 irq_set_chip_data(irq, NULL);
267 }
268}
269
270static int __devinit tc3589x_gpio_probe(struct platform_device *pdev)
271{
272 struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
273 struct tc3589x_gpio_platform_data *pdata;
274 struct tc3589x_gpio *tc3589x_gpio;
275 int ret;
276 int irq;
277
278 pdata = tc3589x->pdata->gpio;
279 if (!pdata)
280 return -ENODEV;
281
282 irq = platform_get_irq(pdev, 0);
283 if (irq < 0)
284 return irq;
285
286 tc3589x_gpio = kzalloc(sizeof(struct tc3589x_gpio), GFP_KERNEL);
287 if (!tc3589x_gpio)
288 return -ENOMEM;
289
290 mutex_init(&tc3589x_gpio->irq_lock);
291
292 tc3589x_gpio->dev = &pdev->dev;
293 tc3589x_gpio->tc3589x = tc3589x;
294
295 tc3589x_gpio->chip = template_chip;
296 tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
297 tc3589x_gpio->chip.dev = &pdev->dev;
298 tc3589x_gpio->chip.base = pdata->gpio_base;
299
300 tc3589x_gpio->irq_base = tc3589x->irq_base + TC3589x_INT_GPIO(0);
301
302 /* Bring the GPIO module out of reset */
303 ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL,
304 TC3589x_RSTCTRL_GPIRST, 0);
305 if (ret < 0)
306 goto out_free;
307
308 ret = tc3589x_gpio_irq_init(tc3589x_gpio);
309 if (ret)
310 goto out_free;
311
312 ret = request_threaded_irq(irq, NULL, tc3589x_gpio_irq, IRQF_ONESHOT,
313 "tc3589x-gpio", tc3589x_gpio);
314 if (ret) {
315 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
316 goto out_removeirq;
317 }
318
319 ret = gpiochip_add(&tc3589x_gpio->chip);
320 if (ret) {
321 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
322 goto out_freeirq;
323 }
324
325 if (pdata->setup)
326 pdata->setup(tc3589x, tc3589x_gpio->chip.base);
327
328 platform_set_drvdata(pdev, tc3589x_gpio);
329
330 return 0;
331
332out_freeirq:
333 free_irq(irq, tc3589x_gpio);
334out_removeirq:
335 tc3589x_gpio_irq_remove(tc3589x_gpio);
336out_free:
337 kfree(tc3589x_gpio);
338 return ret;
339}
340
341static int __devexit tc3589x_gpio_remove(struct platform_device *pdev)
342{
343 struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev);
344 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
345 struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio;
346 int irq = platform_get_irq(pdev, 0);
347 int ret;
348
349 if (pdata->remove)
350 pdata->remove(tc3589x, tc3589x_gpio->chip.base);
351
352 ret = gpiochip_remove(&tc3589x_gpio->chip);
353 if (ret < 0) {
354 dev_err(tc3589x_gpio->dev,
355 "unable to remove gpiochip: %d\n", ret);
356 return ret;
357 }
358
359 free_irq(irq, tc3589x_gpio);
360 tc3589x_gpio_irq_remove(tc3589x_gpio);
361
362 platform_set_drvdata(pdev, NULL);
363 kfree(tc3589x_gpio);
364
365 return 0;
366}
367
368static struct platform_driver tc3589x_gpio_driver = {
369 .driver.name = "tc3589x-gpio",
370 .driver.owner = THIS_MODULE,
371 .probe = tc3589x_gpio_probe,
372 .remove = __devexit_p(tc3589x_gpio_remove),
373};
374
375static int __init tc3589x_gpio_init(void)
376{
377 return platform_driver_register(&tc3589x_gpio_driver);
378}
379subsys_initcall(tc3589x_gpio_init);
380
381static void __exit tc3589x_gpio_exit(void)
382{
383 platform_driver_unregister(&tc3589x_gpio_driver);
384}
385module_exit(tc3589x_gpio_exit);
386
387MODULE_LICENSE("GPL v2");
388MODULE_DESCRIPTION("TC3589x GPIO driver");
389MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
7 */
8
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/slab.h>
13#include <linux/gpio.h>
14#include <linux/of.h>
15#include <linux/irq.h>
16#include <linux/irqdomain.h>
17#include <linux/interrupt.h>
18#include <linux/mfd/tc3589x.h>
19
20/*
21 * These registers are modified under the irq bus lock and cached to avoid
22 * unnecessary writes in bus_sync_unlock.
23 */
24enum { REG_IBE, REG_IEV, REG_IS, REG_IE };
25
26#define CACHE_NR_REGS 4
27#define CACHE_NR_BANKS 3
28
29struct tc3589x_gpio {
30 struct gpio_chip chip;
31 struct tc3589x *tc3589x;
32 struct device *dev;
33 struct mutex irq_lock;
34 struct irq_domain *domain;
35
36 int irq_base;
37
38 /* Caches of interrupt control registers for bus_lock */
39 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
40 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
41};
42
43static inline struct tc3589x_gpio *to_tc3589x_gpio(struct gpio_chip *chip)
44{
45 return container_of(chip, struct tc3589x_gpio, chip);
46}
47
48static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset)
49{
50 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
51 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
52 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
53 u8 mask = 1 << (offset % 8);
54 int ret;
55
56 ret = tc3589x_reg_read(tc3589x, reg);
57 if (ret < 0)
58 return ret;
59
60 return ret & mask;
61}
62
63static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
64{
65 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
66 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
67 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
68 unsigned pos = offset % 8;
69 u8 data[] = {!!val << pos, 1 << pos};
70
71 tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
72}
73
74static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
75 unsigned offset, int val)
76{
77 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
78 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
79 u8 reg = TC3589x_GPIODIR0 + offset / 8;
80 unsigned pos = offset % 8;
81
82 tc3589x_gpio_set(chip, offset, val);
83
84 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos);
85}
86
87static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
88 unsigned offset)
89{
90 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
91 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
92 u8 reg = TC3589x_GPIODIR0 + offset / 8;
93 unsigned pos = offset % 8;
94
95 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0);
96}
97
98/**
99 * tc3589x_gpio_irq_get_irq(): Map a hardware IRQ on a chip to a Linux IRQ
100 *
101 * @tc3589x_gpio: tc3589x_gpio_irq controller to operate on.
102 * @irq: index of the hardware interrupt requested in the chip IRQs
103 *
104 * Useful for drivers to request their own IRQs.
105 */
106static int tc3589x_gpio_irq_get_irq(struct tc3589x_gpio *tc3589x_gpio,
107 int hwirq)
108{
109 if (!tc3589x_gpio)
110 return -EINVAL;
111
112 return irq_create_mapping(tc3589x_gpio->domain, hwirq);
113}
114
115static int tc3589x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
116{
117 struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
118
119 return tc3589x_gpio_irq_get_irq(tc3589x_gpio, offset);
120}
121
122static struct gpio_chip template_chip = {
123 .label = "tc3589x",
124 .owner = THIS_MODULE,
125 .direction_input = tc3589x_gpio_direction_input,
126 .get = tc3589x_gpio_get,
127 .direction_output = tc3589x_gpio_direction_output,
128 .set = tc3589x_gpio_set,
129 .to_irq = tc3589x_gpio_to_irq,
130 .can_sleep = true,
131};
132
133static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
134{
135 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
136 int offset = d->hwirq;
137 int regoffset = offset / 8;
138 int mask = 1 << (offset % 8);
139
140 if (type == IRQ_TYPE_EDGE_BOTH) {
141 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
142 return 0;
143 }
144
145 tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask;
146
147 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
148 tc3589x_gpio->regs[REG_IS][regoffset] |= mask;
149 else
150 tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask;
151
152 if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)
153 tc3589x_gpio->regs[REG_IEV][regoffset] |= mask;
154 else
155 tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask;
156
157 return 0;
158}
159
160static void tc3589x_gpio_irq_lock(struct irq_data *d)
161{
162 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
163
164 mutex_lock(&tc3589x_gpio->irq_lock);
165}
166
167static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d)
168{
169 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
170 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
171 static const u8 regmap[] = {
172 [REG_IBE] = TC3589x_GPIOIBE0,
173 [REG_IEV] = TC3589x_GPIOIEV0,
174 [REG_IS] = TC3589x_GPIOIS0,
175 [REG_IE] = TC3589x_GPIOIE0,
176 };
177 int i, j;
178
179 for (i = 0; i < CACHE_NR_REGS; i++) {
180 for (j = 0; j < CACHE_NR_BANKS; j++) {
181 u8 old = tc3589x_gpio->oldregs[i][j];
182 u8 new = tc3589x_gpio->regs[i][j];
183
184 if (new == old)
185 continue;
186
187 tc3589x_gpio->oldregs[i][j] = new;
188 tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
189 }
190 }
191
192 mutex_unlock(&tc3589x_gpio->irq_lock);
193}
194
195static void tc3589x_gpio_irq_mask(struct irq_data *d)
196{
197 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
198 int offset = d->hwirq;
199 int regoffset = offset / 8;
200 int mask = 1 << (offset % 8);
201
202 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
203}
204
205static void tc3589x_gpio_irq_unmask(struct irq_data *d)
206{
207 struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
208 int offset = d->hwirq;
209 int regoffset = offset / 8;
210 int mask = 1 << (offset % 8);
211
212 tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
213}
214
215static struct irq_chip tc3589x_gpio_irq_chip = {
216 .name = "tc3589x-gpio",
217 .irq_bus_lock = tc3589x_gpio_irq_lock,
218 .irq_bus_sync_unlock = tc3589x_gpio_irq_sync_unlock,
219 .irq_mask = tc3589x_gpio_irq_mask,
220 .irq_unmask = tc3589x_gpio_irq_unmask,
221 .irq_set_type = tc3589x_gpio_irq_set_type,
222};
223
224static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
225{
226 struct tc3589x_gpio *tc3589x_gpio = dev;
227 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
228 u8 status[CACHE_NR_BANKS];
229 int ret;
230 int i;
231
232 ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0,
233 ARRAY_SIZE(status), status);
234 if (ret < 0)
235 return IRQ_NONE;
236
237 for (i = 0; i < ARRAY_SIZE(status); i++) {
238 unsigned int stat = status[i];
239 if (!stat)
240 continue;
241
242 while (stat) {
243 int bit = __ffs(stat);
244 int line = i * 8 + bit;
245 int irq = tc3589x_gpio_irq_get_irq(tc3589x_gpio, line);
246
247 handle_nested_irq(irq);
248 stat &= ~(1 << bit);
249 }
250
251 tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]);
252 }
253
254 return IRQ_HANDLED;
255}
256
257static int tc3589x_gpio_irq_map(struct irq_domain *d, unsigned int irq,
258 irq_hw_number_t hwirq)
259{
260 struct tc3589x *tc3589x_gpio = d->host_data;
261
262 irq_set_chip_data(irq, tc3589x_gpio);
263 irq_set_chip_and_handler(irq, &tc3589x_gpio_irq_chip,
264 handle_simple_irq);
265 irq_set_nested_thread(irq, 1);
266#ifdef CONFIG_ARM
267 set_irq_flags(irq, IRQF_VALID);
268#else
269 irq_set_noprobe(irq);
270#endif
271
272 return 0;
273}
274
275static void tc3589x_gpio_irq_unmap(struct irq_domain *d, unsigned int irq)
276{
277#ifdef CONFIG_ARM
278 set_irq_flags(irq, 0);
279#endif
280 irq_set_chip_and_handler(irq, NULL, NULL);
281 irq_set_chip_data(irq, NULL);
282}
283
284static struct irq_domain_ops tc3589x_irq_ops = {
285 .map = tc3589x_gpio_irq_map,
286 .unmap = tc3589x_gpio_irq_unmap,
287 .xlate = irq_domain_xlate_twocell,
288};
289
290static int tc3589x_gpio_irq_init(struct tc3589x_gpio *tc3589x_gpio,
291 struct device_node *np)
292{
293 int base = tc3589x_gpio->irq_base;
294
295 /*
296 * If this results in a linear domain, irq_create_mapping() will
297 * take care of allocating IRQ descriptors at runtime. When a base
298 * is provided, the IRQ descriptors will be allocated when the
299 * domain is instantiated.
300 */
301 tc3589x_gpio->domain = irq_domain_add_simple(np,
302 tc3589x_gpio->chip.ngpio, base, &tc3589x_irq_ops,
303 tc3589x_gpio);
304 if (!tc3589x_gpio->domain) {
305 dev_err(tc3589x_gpio->dev, "Failed to create irqdomain\n");
306 return -ENOSYS;
307 }
308
309 return 0;
310}
311
312static int tc3589x_gpio_probe(struct platform_device *pdev)
313{
314 struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
315 struct tc3589x_gpio_platform_data *pdata;
316 struct device_node *np = pdev->dev.of_node;
317 struct tc3589x_gpio *tc3589x_gpio;
318 int ret;
319 int irq;
320
321 pdata = tc3589x->pdata->gpio;
322
323 if (!(pdata || np)) {
324 dev_err(&pdev->dev, "No platform data or Device Tree found\n");
325 return -EINVAL;
326 }
327
328 irq = platform_get_irq(pdev, 0);
329 if (irq < 0)
330 return irq;
331
332 tc3589x_gpio = kzalloc(sizeof(struct tc3589x_gpio), GFP_KERNEL);
333 if (!tc3589x_gpio)
334 return -ENOMEM;
335
336 mutex_init(&tc3589x_gpio->irq_lock);
337
338 tc3589x_gpio->dev = &pdev->dev;
339 tc3589x_gpio->tc3589x = tc3589x;
340
341 tc3589x_gpio->chip = template_chip;
342 tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
343 tc3589x_gpio->chip.dev = &pdev->dev;
344 tc3589x_gpio->chip.base = (pdata) ? pdata->gpio_base : -1;
345
346#ifdef CONFIG_OF_GPIO
347 tc3589x_gpio->chip.of_node = np;
348#endif
349
350 tc3589x_gpio->irq_base = tc3589x->irq_base ?
351 tc3589x->irq_base + TC3589x_INT_GPIO(0) : 0;
352
353 /* Bring the GPIO module out of reset */
354 ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL,
355 TC3589x_RSTCTRL_GPIRST, 0);
356 if (ret < 0)
357 goto out_free;
358
359 ret = tc3589x_gpio_irq_init(tc3589x_gpio, np);
360 if (ret)
361 goto out_free;
362
363 ret = request_threaded_irq(irq, NULL, tc3589x_gpio_irq, IRQF_ONESHOT,
364 "tc3589x-gpio", tc3589x_gpio);
365 if (ret) {
366 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
367 goto out_free;
368 }
369
370 ret = gpiochip_add(&tc3589x_gpio->chip);
371 if (ret) {
372 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
373 goto out_freeirq;
374 }
375
376 if (pdata && pdata->setup)
377 pdata->setup(tc3589x, tc3589x_gpio->chip.base);
378
379 platform_set_drvdata(pdev, tc3589x_gpio);
380
381 return 0;
382
383out_freeirq:
384 free_irq(irq, tc3589x_gpio);
385out_free:
386 kfree(tc3589x_gpio);
387 return ret;
388}
389
390static int tc3589x_gpio_remove(struct platform_device *pdev)
391{
392 struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev);
393 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
394 struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio;
395 int irq = platform_get_irq(pdev, 0);
396 int ret;
397
398 if (pdata && pdata->remove)
399 pdata->remove(tc3589x, tc3589x_gpio->chip.base);
400
401 ret = gpiochip_remove(&tc3589x_gpio->chip);
402 if (ret < 0) {
403 dev_err(tc3589x_gpio->dev,
404 "unable to remove gpiochip: %d\n", ret);
405 return ret;
406 }
407
408 free_irq(irq, tc3589x_gpio);
409
410 kfree(tc3589x_gpio);
411
412 return 0;
413}
414
415static struct platform_driver tc3589x_gpio_driver = {
416 .driver.name = "tc3589x-gpio",
417 .driver.owner = THIS_MODULE,
418 .probe = tc3589x_gpio_probe,
419 .remove = tc3589x_gpio_remove,
420};
421
422static int __init tc3589x_gpio_init(void)
423{
424 return platform_driver_register(&tc3589x_gpio_driver);
425}
426subsys_initcall(tc3589x_gpio_init);
427
428static void __exit tc3589x_gpio_exit(void)
429{
430 platform_driver_unregister(&tc3589x_gpio_driver);
431}
432module_exit(tc3589x_gpio_exit);
433
434MODULE_LICENSE("GPL v2");
435MODULE_DESCRIPTION("TC3589x GPIO driver");
436MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");