1/*
  2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
  3 *
  4 * The OPP code in function cpu0_set_target() is reused from
  5 * drivers/cpufreq/omap-cpufreq.c
  6 *
  7 * This program is free software; you can redistribute it and/or modify
  8 * it under the terms of the GNU General Public License version 2 as
  9 * published by the Free Software Foundation.
 10 */
 11
 12#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
 13
 14#include <linux/clk.h>
 15#include <linux/cpu.h>
 16#include <linux/cpu_cooling.h>
 17#include <linux/cpufreq.h>
 18#include <linux/cpumask.h>
 19#include <linux/err.h>
 20#include <linux/module.h>
 21#include <linux/of.h>
 22#include <linux/pm_opp.h>
 23#include <linux/platform_device.h>
 24#include <linux/regulator/consumer.h>
 25#include <linux/slab.h>
 26#include <linux/thermal.h>
 27
 28static unsigned int transition_latency;
 29static unsigned int voltage_tolerance; /* in percentage */
 30
 31static struct device *cpu_dev;
 32static struct clk *cpu_clk;
 33static struct regulator *cpu_reg;
 34static struct cpufreq_frequency_table *freq_table;
 35static struct thermal_cooling_device *cdev;
 36
 37static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
 38{
 39	struct dev_pm_opp *opp;
 40	unsigned long volt = 0, volt_old = 0, tol = 0;
 41	unsigned int old_freq, new_freq;
 42	long freq_Hz, freq_exact;
 43	int ret;
 44
 45	freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
 46	if (freq_Hz <= 0)
 47		freq_Hz = freq_table[index].frequency * 1000;
 48
 49	freq_exact = freq_Hz;
 50	new_freq = freq_Hz / 1000;
 51	old_freq = clk_get_rate(cpu_clk) / 1000;
 52
 53	if (!IS_ERR(cpu_reg)) {
 54		rcu_read_lock();
 55		opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
 56		if (IS_ERR(opp)) {
 57			rcu_read_unlock();
 58			pr_err("failed to find OPP for %ld\n", freq_Hz);
 59			return PTR_ERR(opp);
 60		}
 61		volt = dev_pm_opp_get_voltage(opp);
 62		rcu_read_unlock();
 63		tol = volt * voltage_tolerance / 100;
 64		volt_old = regulator_get_voltage(cpu_reg);
 65	}
 66
 67	pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
 68		 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
 69		 new_freq / 1000, volt ? volt / 1000 : -1);
 70
 71	/* scaling up?  scale voltage before frequency */
 72	if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
 73		ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
 74		if (ret) {
 75			pr_err("failed to scale voltage up: %d\n", ret);
 76			return ret;
 77		}
 78	}
 79
 80	ret = clk_set_rate(cpu_clk, freq_exact);
 81	if (ret) {
 82		pr_err("failed to set clock rate: %d\n", ret);
 83		if (!IS_ERR(cpu_reg))
 84			regulator_set_voltage_tol(cpu_reg, volt_old, tol);
 85		return ret;
 86	}
 87
 88	/* scaling down?  scale voltage after frequency */
 89	if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
 90		ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
 91		if (ret) {
 92			pr_err("failed to scale voltage down: %d\n", ret);
 93			clk_set_rate(cpu_clk, old_freq * 1000);
 94		}
 95	}
 96
 97	return ret;
 98}
 99
100static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
101{
102	policy->clk = cpu_clk;
103	return cpufreq_generic_init(policy, freq_table, transition_latency);
104}
105
106static struct cpufreq_driver cpu0_cpufreq_driver = {
107	.flags = CPUFREQ_STICKY,
108	.verify = cpufreq_generic_frequency_table_verify,
109	.target_index = cpu0_set_target,
110	.get = cpufreq_generic_get,
111	.init = cpu0_cpufreq_init,
112	.name = "generic_cpu0",
113	.attr = cpufreq_generic_attr,
114};
115
116static int cpu0_cpufreq_probe(struct platform_device *pdev)
117{
118	struct device_node *np;
119	int ret;
120
121	cpu_dev = get_cpu_device(0);
122	if (!cpu_dev) {
123		pr_err("failed to get cpu0 device\n");
124		return -ENODEV;
125	}
126
127	np = of_node_get(cpu_dev->of_node);
128	if (!np) {
129		pr_err("failed to find cpu0 node\n");
130		return -ENOENT;
131	}
132
133	cpu_reg = regulator_get_optional(cpu_dev, "cpu0");
134	if (IS_ERR(cpu_reg)) {
135		/*
136		 * If cpu0 regulator supply node is present, but regulator is
137		 * not yet registered, we should try defering probe.
138		 */
139		if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
140			dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
141			ret = -EPROBE_DEFER;
142			goto out_put_node;
143		}
144		pr_warn("failed to get cpu0 regulator: %ld\n",
145			PTR_ERR(cpu_reg));
146	}
147
148	cpu_clk = clk_get(cpu_dev, NULL);
149	if (IS_ERR(cpu_clk)) {
150		ret = PTR_ERR(cpu_clk);
151		pr_err("failed to get cpu0 clock: %d\n", ret);
152		goto out_put_reg;
153	}
154
155	ret = of_init_opp_table(cpu_dev);
156	if (ret) {
157		pr_err("failed to init OPP table: %d\n", ret);
158		goto out_put_clk;
159	}
160
161	ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
162	if (ret) {
163		pr_err("failed to init cpufreq table: %d\n", ret);
164		goto out_put_clk;
165	}
166
167	of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
168
169	if (of_property_read_u32(np, "clock-latency", &transition_latency))
170		transition_latency = CPUFREQ_ETERNAL;
171
172	if (!IS_ERR(cpu_reg)) {
173		struct dev_pm_opp *opp;
174		unsigned long min_uV, max_uV;
175		int i;
176
177		/*
178		 * OPP is maintained in order of increasing frequency, and
179		 * freq_table initialised from OPP is therefore sorted in the
180		 * same order.
181		 */
182		for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
183			;
184		rcu_read_lock();
185		opp = dev_pm_opp_find_freq_exact(cpu_dev,
186				freq_table[0].frequency * 1000, true);
187		min_uV = dev_pm_opp_get_voltage(opp);
188		opp = dev_pm_opp_find_freq_exact(cpu_dev,
189				freq_table[i-1].frequency * 1000, true);
190		max_uV = dev_pm_opp_get_voltage(opp);
191		rcu_read_unlock();
192		ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
193		if (ret > 0)
194			transition_latency += ret * 1000;
195	}
196
197	ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
198	if (ret) {
199		pr_err("failed register driver: %d\n", ret);
200		goto out_free_table;
201	}
202
203	/*
204	 * For now, just loading the cooling device;
205	 * thermal DT code takes care of matching them.
206	 */
207	if (of_find_property(np, "#cooling-cells", NULL)) {
208		cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
209		if (IS_ERR(cdev))
210			pr_err("running cpufreq without cooling device: %ld\n",
211			       PTR_ERR(cdev));
212	}
213
214	of_node_put(np);
215	return 0;
216
217out_free_table:
218	dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
219out_put_clk:
220	if (!IS_ERR(cpu_clk))
221		clk_put(cpu_clk);
222out_put_reg:
223	if (!IS_ERR(cpu_reg))
224		regulator_put(cpu_reg);
225out_put_node:
226	of_node_put(np);
227	return ret;
228}
229
230static int cpu0_cpufreq_remove(struct platform_device *pdev)
231{
232	cpufreq_cooling_unregister(cdev);
233	cpufreq_unregister_driver(&cpu0_cpufreq_driver);
234	dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
235
236	return 0;
237}
238
239static struct platform_driver cpu0_cpufreq_platdrv = {
240	.driver = {
241		.name	= "cpufreq-cpu0",
242		.owner	= THIS_MODULE,
243	},
244	.probe		= cpu0_cpufreq_probe,
245	.remove		= cpu0_cpufreq_remove,
246};
247module_platform_driver(cpu0_cpufreq_platdrv);
248
249MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
250MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
251MODULE_LICENSE("GPL");