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1/* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
2 *
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
8 */
9
10#include <linux/errno.h>
11
12#include <asm/head.h>
13#include <asm/asi.h>
14#include <asm/smp.h>
15#include <asm/contregs.h>
16#include <asm/ptrace.h>
17#include <asm/asm-offsets.h>
18#include <asm/psr.h>
19#include <asm/vaddrs.h>
20#include <asm/memreg.h>
21#include <asm/page.h>
22#include <asm/pgtable.h>
23#include <asm/pgtsun4c.h>
24#include <asm/winmacro.h>
25#include <asm/signal.h>
26#include <asm/obio.h>
27#include <asm/mxcc.h>
28#include <asm/thread_info.h>
29#include <asm/param.h>
30#include <asm/unistd.h>
31
32#include <asm/asmmacro.h>
33
34#define curptr g6
35
36/* These are just handy. */
37#define _SV save %sp, -STACKFRAME_SZ, %sp
38#define _RS restore
39
40#define FLUSH_ALL_KERNEL_WINDOWS \
41 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
42 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
43
44 .text
45
46#ifdef CONFIG_KGDB
47 .align 4
48 .globl arch_kgdb_breakpoint
49 .type arch_kgdb_breakpoint,#function
50arch_kgdb_breakpoint:
51 ta 0x7d
52 retl
53 nop
54 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
55#endif
56
57#if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
58 .align 4
59 .globl floppy_hardint
60floppy_hardint:
61 /*
62 * This code cannot touch registers %l0 %l1 and %l2
63 * because SAVE_ALL depends on their values. It depends
64 * on %l3 also, but we regenerate it before a call.
65 * Other registers are:
66 * %l3 -- base address of fdc registers
67 * %l4 -- pdma_vaddr
68 * %l5 -- scratch for ld/st address
69 * %l6 -- pdma_size
70 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
71 */
72
73 /* Do we have work to do? */
74 sethi %hi(doing_pdma), %l7
75 ld [%l7 + %lo(doing_pdma)], %l7
76 cmp %l7, 0
77 be floppy_dosoftint
78 nop
79
80 /* Load fdc register base */
81 sethi %hi(fdc_status), %l3
82 ld [%l3 + %lo(fdc_status)], %l3
83
84 /* Setup register addresses */
85 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
86 ld [%l5 + %lo(pdma_vaddr)], %l4
87 sethi %hi(pdma_size), %l5 ! bytes to go
88 ld [%l5 + %lo(pdma_size)], %l6
89next_byte:
90 ldub [%l3], %l7
91
92 andcc %l7, 0x80, %g0 ! Does fifo still have data
93 bz floppy_fifo_emptied ! fifo has been emptied...
94 andcc %l7, 0x20, %g0 ! in non-dma mode still?
95 bz floppy_overrun ! nope, overrun
96 andcc %l7, 0x40, %g0 ! 0=write 1=read
97 bz floppy_write
98 sub %l6, 0x1, %l6
99
100 /* Ok, actually read this byte */
101 ldub [%l3 + 1], %l7
102 orcc %g0, %l6, %g0
103 stb %l7, [%l4]
104 bne next_byte
105 add %l4, 0x1, %l4
106
107 b floppy_tdone
108 nop
109
110floppy_write:
111 /* Ok, actually write this byte */
112 ldub [%l4], %l7
113 orcc %g0, %l6, %g0
114 stb %l7, [%l3 + 1]
115 bne next_byte
116 add %l4, 0x1, %l4
117
118 /* fall through... */
119floppy_tdone:
120 sethi %hi(pdma_vaddr), %l5
121 st %l4, [%l5 + %lo(pdma_vaddr)]
122 sethi %hi(pdma_size), %l5
123 st %l6, [%l5 + %lo(pdma_size)]
124 /* Flip terminal count pin */
125 set auxio_register, %l7
126 ld [%l7], %l7
127
128 set sparc_cpu_model, %l5
129 ld [%l5], %l5
130 subcc %l5, 1, %g0 /* enum { sun4c = 1 }; */
131 be 1f
132 ldub [%l7], %l5
133
134 or %l5, 0xc2, %l5
135 stb %l5, [%l7]
136 andn %l5, 0x02, %l5
137 b 2f
138 nop
139
1401:
141 or %l5, 0xf4, %l5
142 stb %l5, [%l7]
143 andn %l5, 0x04, %l5
144
1452:
146 /* Kill some time so the bits set */
147 WRITE_PAUSE
148 WRITE_PAUSE
149
150 stb %l5, [%l7]
151
152 /* Prevent recursion */
153 sethi %hi(doing_pdma), %l7
154 b floppy_dosoftint
155 st %g0, [%l7 + %lo(doing_pdma)]
156
157 /* We emptied the FIFO, but we haven't read everything
158 * as of yet. Store the current transfer address and
159 * bytes left to read so we can continue when the next
160 * fast IRQ comes in.
161 */
162floppy_fifo_emptied:
163 sethi %hi(pdma_vaddr), %l5
164 st %l4, [%l5 + %lo(pdma_vaddr)]
165 sethi %hi(pdma_size), %l7
166 st %l6, [%l7 + %lo(pdma_size)]
167
168 /* Restore condition codes */
169 wr %l0, 0x0, %psr
170 WRITE_PAUSE
171
172 jmp %l1
173 rett %l2
174
175floppy_overrun:
176 sethi %hi(pdma_vaddr), %l5
177 st %l4, [%l5 + %lo(pdma_vaddr)]
178 sethi %hi(pdma_size), %l5
179 st %l6, [%l5 + %lo(pdma_size)]
180 /* Prevent recursion */
181 sethi %hi(doing_pdma), %l7
182 st %g0, [%l7 + %lo(doing_pdma)]
183
184 /* fall through... */
185floppy_dosoftint:
186 rd %wim, %l3
187 SAVE_ALL
188
189 /* Set all IRQs off. */
190 or %l0, PSR_PIL, %l4
191 wr %l4, 0x0, %psr
192 WRITE_PAUSE
193 wr %l4, PSR_ET, %psr
194 WRITE_PAUSE
195
196 mov 11, %o0 ! floppy irq level (unused anyway)
197 mov %g0, %o1 ! devid is not used in fast interrupts
198 call sparc_floppy_irq
199 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
200
201 RESTORE_ALL
202
203#endif /* (CONFIG_BLK_DEV_FD) */
204
205 /* Bad trap handler */
206 .globl bad_trap_handler
207bad_trap_handler:
208 SAVE_ALL
209
210 wr %l0, PSR_ET, %psr
211 WRITE_PAUSE
212
213 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
214 call do_hw_interrupt
215 mov %l7, %o1 ! trap number
216
217 RESTORE_ALL
218
219/* For now all IRQ's not registered get sent here. handler_irq() will
220 * see if a routine is registered to handle this interrupt and if not
221 * it will say so on the console.
222 */
223
224 .align 4
225 .globl real_irq_entry, patch_handler_irq
226real_irq_entry:
227 SAVE_ALL
228
229#ifdef CONFIG_SMP
230 .globl patchme_maybe_smp_msg
231
232 cmp %l7, 11
233patchme_maybe_smp_msg:
234 bgu maybe_smp4m_msg
235 nop
236#endif
237
238real_irq_continue:
239 or %l0, PSR_PIL, %g2
240 wr %g2, 0x0, %psr
241 WRITE_PAUSE
242 wr %g2, PSR_ET, %psr
243 WRITE_PAUSE
244 mov %l7, %o0 ! irq level
245patch_handler_irq:
246 call handler_irq
247 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
248 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
249 wr %g2, PSR_ET, %psr ! keep ET up
250 WRITE_PAUSE
251
252 RESTORE_ALL
253
254#ifdef CONFIG_SMP
255 /* SMP per-cpu ticker interrupts are handled specially. */
256smp4m_ticker:
257 bne real_irq_continue+4
258 or %l0, PSR_PIL, %g2
259 wr %g2, 0x0, %psr
260 WRITE_PAUSE
261 wr %g2, PSR_ET, %psr
262 WRITE_PAUSE
263 call smp4m_percpu_timer_interrupt
264 add %sp, STACKFRAME_SZ, %o0
265 wr %l0, PSR_ET, %psr
266 WRITE_PAUSE
267 RESTORE_ALL
268
269 /* Here is where we check for possible SMP IPI passed to us
270 * on some level other than 15 which is the NMI and only used
271 * for cross calls. That has a separate entry point below.
272 *
273 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
274 */
275maybe_smp4m_msg:
276 GET_PROCESSOR4M_ID(o3)
277 sethi %hi(sun4m_irq_percpu), %l5
278 sll %o3, 2, %o3
279 or %l5, %lo(sun4m_irq_percpu), %o5
280 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
281 ld [%o5 + %o3], %o1
282 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
283 andcc %o3, %o2, %g0
284 be,a smp4m_ticker
285 cmp %l7, 14
286 /* Soft-IRQ IPI */
287 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
288 WRITE_PAUSE
289 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
290 WRITE_PAUSE
291 or %l0, PSR_PIL, %l4
292 wr %l4, 0x0, %psr
293 WRITE_PAUSE
294 wr %l4, PSR_ET, %psr
295 WRITE_PAUSE
296 srl %o3, 28, %o2 ! shift for simpler checks below
297maybe_smp4m_msg_check_single:
298 andcc %o2, 0x1, %g0
299 beq,a maybe_smp4m_msg_check_mask
300 andcc %o2, 0x2, %g0
301 call smp_call_function_single_interrupt
302 nop
303 andcc %o2, 0x2, %g0
304maybe_smp4m_msg_check_mask:
305 beq,a maybe_smp4m_msg_check_resched
306 andcc %o2, 0x4, %g0
307 call smp_call_function_interrupt
308 nop
309 andcc %o2, 0x4, %g0
310maybe_smp4m_msg_check_resched:
311 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
312 beq,a maybe_smp4m_msg_out
313 nop
314 call smp_resched_interrupt
315 nop
316maybe_smp4m_msg_out:
317 RESTORE_ALL
318
319 .align 4
320 .globl linux_trap_ipi15_sun4m
321linux_trap_ipi15_sun4m:
322 SAVE_ALL
323 sethi %hi(0x80000000), %o2
324 GET_PROCESSOR4M_ID(o0)
325 sethi %hi(sun4m_irq_percpu), %l5
326 or %l5, %lo(sun4m_irq_percpu), %o5
327 sll %o0, 2, %o0
328 ld [%o5 + %o0], %o5
329 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
330 andcc %o3, %o2, %g0
331 be 1f ! Must be an NMI async memory error
332 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
333 WRITE_PAUSE
334 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
335 WRITE_PAUSE
336 or %l0, PSR_PIL, %l4
337 wr %l4, 0x0, %psr
338 WRITE_PAUSE
339 wr %l4, PSR_ET, %psr
340 WRITE_PAUSE
341 call smp4m_cross_call_irq
342 nop
343 b ret_trap_lockless_ipi
344 clr %l6
3451:
346 /* NMI async memory error handling. */
347 sethi %hi(0x80000000), %l4
348 sethi %hi(sun4m_irq_global), %o5
349 ld [%o5 + %lo(sun4m_irq_global)], %l5
350 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
351 WRITE_PAUSE
352 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
353 WRITE_PAUSE
354 or %l0, PSR_PIL, %l4
355 wr %l4, 0x0, %psr
356 WRITE_PAUSE
357 wr %l4, PSR_ET, %psr
358 WRITE_PAUSE
359 call sun4m_nmi
360 nop
361 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
362 WRITE_PAUSE
363 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
364 WRITE_PAUSE
365 RESTORE_ALL
366
367 .globl smp4d_ticker
368 /* SMP per-cpu ticker interrupts are handled specially. */
369smp4d_ticker:
370 SAVE_ALL
371 or %l0, PSR_PIL, %g2
372 sethi %hi(CC_ICLR), %o0
373 sethi %hi(1 << 14), %o1
374 or %o0, %lo(CC_ICLR), %o0
375 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
376 wr %g2, 0x0, %psr
377 WRITE_PAUSE
378 wr %g2, PSR_ET, %psr
379 WRITE_PAUSE
380 call smp4d_percpu_timer_interrupt
381 add %sp, STACKFRAME_SZ, %o0
382 wr %l0, PSR_ET, %psr
383 WRITE_PAUSE
384 RESTORE_ALL
385
386 .align 4
387 .globl linux_trap_ipi15_sun4d
388linux_trap_ipi15_sun4d:
389 SAVE_ALL
390 sethi %hi(CC_BASE), %o4
391 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
392 or %o4, (CC_EREG - CC_BASE), %o0
393 ldda [%o0] ASI_M_MXCC, %o0
394 andcc %o0, %o2, %g0
395 bne 1f
396 sethi %hi(BB_STAT2), %o2
397 lduba [%o2] ASI_M_CTL, %o2
398 andcc %o2, BB_STAT2_MASK, %g0
399 bne 2f
400 or %o4, (CC_ICLR - CC_BASE), %o0
401 sethi %hi(1 << 15), %o1
402 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
403 or %l0, PSR_PIL, %l4
404 wr %l4, 0x0, %psr
405 WRITE_PAUSE
406 wr %l4, PSR_ET, %psr
407 WRITE_PAUSE
408 call smp4d_cross_call_irq
409 nop
410 b ret_trap_lockless_ipi
411 clr %l6
412
4131: /* MXCC error */
4142: /* BB error */
415 /* Disable PIL 15 */
416 set CC_IMSK, %l4
417 lduha [%l4] ASI_M_MXCC, %l5
418 sethi %hi(1 << 15), %l7
419 or %l5, %l7, %l5
420 stha %l5, [%l4] ASI_M_MXCC
421 /* FIXME */
4221: b,a 1b
423
424#ifdef CONFIG_SPARC_LEON
425 .globl smpleon_ipi
426 .extern leon_ipi_interrupt
427 /* SMP per-cpu IPI interrupts are handled specially. */
428smpleon_ipi:
429 SAVE_ALL
430 or %l0, PSR_PIL, %g2
431 wr %g2, 0x0, %psr
432 WRITE_PAUSE
433 wr %g2, PSR_ET, %psr
434 WRITE_PAUSE
435 call leonsmp_ipi_interrupt
436 add %sp, STACKFRAME_SZ, %o1 ! pt_regs
437 wr %l0, PSR_ET, %psr
438 WRITE_PAUSE
439 RESTORE_ALL
440
441 .align 4
442 .globl linux_trap_ipi15_leon
443linux_trap_ipi15_leon:
444 SAVE_ALL
445 or %l0, PSR_PIL, %l4
446 wr %l4, 0x0, %psr
447 WRITE_PAUSE
448 wr %l4, PSR_ET, %psr
449 WRITE_PAUSE
450 call leon_cross_call_irq
451 nop
452 b ret_trap_lockless_ipi
453 clr %l6
454
455#endif /* CONFIG_SPARC_LEON */
456
457#endif /* CONFIG_SMP */
458
459 /* This routine handles illegal instructions and privileged
460 * instruction attempts from user code.
461 */
462 .align 4
463 .globl bad_instruction
464bad_instruction:
465 sethi %hi(0xc1f80000), %l4
466 ld [%l1], %l5
467 sethi %hi(0x81d80000), %l7
468 and %l5, %l4, %l5
469 cmp %l5, %l7
470 be 1f
471 SAVE_ALL
472
473 wr %l0, PSR_ET, %psr ! re-enable traps
474 WRITE_PAUSE
475
476 add %sp, STACKFRAME_SZ, %o0
477 mov %l1, %o1
478 mov %l2, %o2
479 call do_illegal_instruction
480 mov %l0, %o3
481
482 RESTORE_ALL
483
4841: /* unimplemented flush - just skip */
485 jmpl %l2, %g0
486 rett %l2 + 4
487
488 .align 4
489 .globl priv_instruction
490priv_instruction:
491 SAVE_ALL
492
493 wr %l0, PSR_ET, %psr
494 WRITE_PAUSE
495
496 add %sp, STACKFRAME_SZ, %o0
497 mov %l1, %o1
498 mov %l2, %o2
499 call do_priv_instruction
500 mov %l0, %o3
501
502 RESTORE_ALL
503
504 /* This routine handles unaligned data accesses. */
505 .align 4
506 .globl mna_handler
507mna_handler:
508 andcc %l0, PSR_PS, %g0
509 be mna_fromuser
510 nop
511
512 SAVE_ALL
513
514 wr %l0, PSR_ET, %psr
515 WRITE_PAUSE
516
517 ld [%l1], %o1
518 call kernel_unaligned_trap
519 add %sp, STACKFRAME_SZ, %o0
520
521 RESTORE_ALL
522
523mna_fromuser:
524 SAVE_ALL
525
526 wr %l0, PSR_ET, %psr ! re-enable traps
527 WRITE_PAUSE
528
529 ld [%l1], %o1
530 call user_unaligned_trap
531 add %sp, STACKFRAME_SZ, %o0
532
533 RESTORE_ALL
534
535 /* This routine handles floating point disabled traps. */
536 .align 4
537 .globl fpd_trap_handler
538fpd_trap_handler:
539 SAVE_ALL
540
541 wr %l0, PSR_ET, %psr ! re-enable traps
542 WRITE_PAUSE
543
544 add %sp, STACKFRAME_SZ, %o0
545 mov %l1, %o1
546 mov %l2, %o2
547 call do_fpd_trap
548 mov %l0, %o3
549
550 RESTORE_ALL
551
552 /* This routine handles Floating Point Exceptions. */
553 .align 4
554 .globl fpe_trap_handler
555fpe_trap_handler:
556 set fpsave_magic, %l5
557 cmp %l1, %l5
558 be 1f
559 sethi %hi(fpsave), %l5
560 or %l5, %lo(fpsave), %l5
561 cmp %l1, %l5
562 bne 2f
563 sethi %hi(fpsave_catch2), %l5
564 or %l5, %lo(fpsave_catch2), %l5
565 wr %l0, 0x0, %psr
566 WRITE_PAUSE
567 jmp %l5
568 rett %l5 + 4
5691:
570 sethi %hi(fpsave_catch), %l5
571 or %l5, %lo(fpsave_catch), %l5
572 wr %l0, 0x0, %psr
573 WRITE_PAUSE
574 jmp %l5
575 rett %l5 + 4
576
5772:
578 SAVE_ALL
579
580 wr %l0, PSR_ET, %psr ! re-enable traps
581 WRITE_PAUSE
582
583 add %sp, STACKFRAME_SZ, %o0
584 mov %l1, %o1
585 mov %l2, %o2
586 call do_fpe_trap
587 mov %l0, %o3
588
589 RESTORE_ALL
590
591 /* This routine handles Tag Overflow Exceptions. */
592 .align 4
593 .globl do_tag_overflow
594do_tag_overflow:
595 SAVE_ALL
596
597 wr %l0, PSR_ET, %psr ! re-enable traps
598 WRITE_PAUSE
599
600 add %sp, STACKFRAME_SZ, %o0
601 mov %l1, %o1
602 mov %l2, %o2
603 call handle_tag_overflow
604 mov %l0, %o3
605
606 RESTORE_ALL
607
608 /* This routine handles Watchpoint Exceptions. */
609 .align 4
610 .globl do_watchpoint
611do_watchpoint:
612 SAVE_ALL
613
614 wr %l0, PSR_ET, %psr ! re-enable traps
615 WRITE_PAUSE
616
617 add %sp, STACKFRAME_SZ, %o0
618 mov %l1, %o1
619 mov %l2, %o2
620 call handle_watchpoint
621 mov %l0, %o3
622
623 RESTORE_ALL
624
625 /* This routine handles Register Access Exceptions. */
626 .align 4
627 .globl do_reg_access
628do_reg_access:
629 SAVE_ALL
630
631 wr %l0, PSR_ET, %psr ! re-enable traps
632 WRITE_PAUSE
633
634 add %sp, STACKFRAME_SZ, %o0
635 mov %l1, %o1
636 mov %l2, %o2
637 call handle_reg_access
638 mov %l0, %o3
639
640 RESTORE_ALL
641
642 /* This routine handles Co-Processor Disabled Exceptions. */
643 .align 4
644 .globl do_cp_disabled
645do_cp_disabled:
646 SAVE_ALL
647
648 wr %l0, PSR_ET, %psr ! re-enable traps
649 WRITE_PAUSE
650
651 add %sp, STACKFRAME_SZ, %o0
652 mov %l1, %o1
653 mov %l2, %o2
654 call handle_cp_disabled
655 mov %l0, %o3
656
657 RESTORE_ALL
658
659 /* This routine handles Co-Processor Exceptions. */
660 .align 4
661 .globl do_cp_exception
662do_cp_exception:
663 SAVE_ALL
664
665 wr %l0, PSR_ET, %psr ! re-enable traps
666 WRITE_PAUSE
667
668 add %sp, STACKFRAME_SZ, %o0
669 mov %l1, %o1
670 mov %l2, %o2
671 call handle_cp_exception
672 mov %l0, %o3
673
674 RESTORE_ALL
675
676 /* This routine handles Hardware Divide By Zero Exceptions. */
677 .align 4
678 .globl do_hw_divzero
679do_hw_divzero:
680 SAVE_ALL
681
682 wr %l0, PSR_ET, %psr ! re-enable traps
683 WRITE_PAUSE
684
685 add %sp, STACKFRAME_SZ, %o0
686 mov %l1, %o1
687 mov %l2, %o2
688 call handle_hw_divzero
689 mov %l0, %o3
690
691 RESTORE_ALL
692
693 .align 4
694 .globl do_flush_windows
695do_flush_windows:
696 SAVE_ALL
697
698 wr %l0, PSR_ET, %psr
699 WRITE_PAUSE
700
701 andcc %l0, PSR_PS, %g0
702 bne dfw_kernel
703 nop
704
705 call flush_user_windows
706 nop
707
708 /* Advance over the trap instruction. */
709 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
710 add %l1, 0x4, %l2
711 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
712 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
713
714 RESTORE_ALL
715
716 .globl flush_patch_one
717
718 /* We get these for debugging routines using __builtin_return_address() */
719dfw_kernel:
720flush_patch_one:
721 FLUSH_ALL_KERNEL_WINDOWS
722
723 /* Advance over the trap instruction. */
724 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
725 add %l1, 0x4, %l2
726 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
727 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
728
729 RESTORE_ALL
730
731 /* The getcc software trap. The user wants the condition codes from
732 * the %psr in register %g1.
733 */
734
735 .align 4
736 .globl getcc_trap_handler
737getcc_trap_handler:
738 srl %l0, 20, %g1 ! give user
739 and %g1, 0xf, %g1 ! only ICC bits in %psr
740 jmp %l2 ! advance over trap instruction
741 rett %l2 + 0x4 ! like this...
742
743 /* The setcc software trap. The user has condition codes in %g1
744 * that it would like placed in the %psr. Be careful not to flip
745 * any unintentional bits!
746 */
747
748 .align 4
749 .globl setcc_trap_handler
750setcc_trap_handler:
751 sll %g1, 0x14, %l4
752 set PSR_ICC, %l5
753 andn %l0, %l5, %l0 ! clear ICC bits in %psr
754 and %l4, %l5, %l4 ! clear non-ICC bits in user value
755 or %l4, %l0, %l4 ! or them in... mix mix mix
756
757 wr %l4, 0x0, %psr ! set new %psr
758 WRITE_PAUSE ! TI scumbags...
759
760 jmp %l2 ! advance over trap instruction
761 rett %l2 + 0x4 ! like this...
762
763 .align 4
764 .globl linux_trap_nmi_sun4c
765linux_trap_nmi_sun4c:
766 SAVE_ALL
767
768 /* Ugh, we need to clear the IRQ line. This is now
769 * a very sun4c specific trap handler...
770 */
771 sethi %hi(interrupt_enable), %l5
772 ld [%l5 + %lo(interrupt_enable)], %l5
773 ldub [%l5], %l6
774 andn %l6, INTS_ENAB, %l6
775 stb %l6, [%l5]
776
777 /* Now it is safe to re-enable traps without recursion. */
778 or %l0, PSR_PIL, %l0
779 wr %l0, PSR_ET, %psr
780 WRITE_PAUSE
781
782 /* Now call the c-code with the pt_regs frame ptr and the
783 * memory error registers as arguments. The ordering chosen
784 * here is due to unlatching semantics.
785 */
786 sethi %hi(AC_SYNC_ERR), %o0
787 add %o0, 0x4, %o0
788 lda [%o0] ASI_CONTROL, %o2 ! sync vaddr
789 sub %o0, 0x4, %o0
790 lda [%o0] ASI_CONTROL, %o1 ! sync error
791 add %o0, 0xc, %o0
792 lda [%o0] ASI_CONTROL, %o4 ! async vaddr
793 sub %o0, 0x4, %o0
794 lda [%o0] ASI_CONTROL, %o3 ! async error
795 call sparc_lvl15_nmi
796 add %sp, STACKFRAME_SZ, %o0
797
798 RESTORE_ALL
799
800 .align 4
801 .globl invalid_segment_patch1_ff
802 .globl invalid_segment_patch2_ff
803invalid_segment_patch1_ff: cmp %l4, 0xff
804invalid_segment_patch2_ff: mov 0xff, %l3
805
806 .align 4
807 .globl invalid_segment_patch1_1ff
808 .globl invalid_segment_patch2_1ff
809invalid_segment_patch1_1ff: cmp %l4, 0x1ff
810invalid_segment_patch2_1ff: mov 0x1ff, %l3
811
812 .align 4
813 .globl num_context_patch1_16, num_context_patch2_16
814num_context_patch1_16: mov 0x10, %l7
815num_context_patch2_16: mov 0x10, %l7
816
817 .align 4
818 .globl vac_linesize_patch_32
819vac_linesize_patch_32: subcc %l7, 32, %l7
820
821 .align 4
822 .globl vac_hwflush_patch1_on, vac_hwflush_patch2_on
823
824/*
825 * Ugly, but we can't use hardware flushing on the sun4 and we'd require
826 * two instructions (Anton)
827 */
828vac_hwflush_patch1_on: addcc %l7, -PAGE_SIZE, %l7
829
830vac_hwflush_patch2_on: sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
831
832 .globl invalid_segment_patch1, invalid_segment_patch2
833 .globl num_context_patch1
834 .globl vac_linesize_patch, vac_hwflush_patch1
835 .globl vac_hwflush_patch2
836
837 .align 4
838 .globl sun4c_fault
839
840! %l0 = %psr
841! %l1 = %pc
842! %l2 = %npc
843! %l3 = %wim
844! %l7 = 1 for textfault
845! We want error in %l5, vaddr in %l6
846sun4c_fault:
847 sethi %hi(AC_SYNC_ERR), %l4
848 add %l4, 0x4, %l6 ! AC_SYNC_VA in %l6
849 lda [%l6] ASI_CONTROL, %l5 ! Address
850 lda [%l4] ASI_CONTROL, %l6 ! Error, retained for a bit
851
852 andn %l5, 0xfff, %l5 ! Encode all info into l7
853 srl %l6, 14, %l4
854
855 and %l4, 2, %l4
856 or %l5, %l4, %l4
857
858 or %l4, %l7, %l7 ! l7 = [addr,write,txtfault]
859
860 andcc %l0, PSR_PS, %g0
861 be sun4c_fault_fromuser
862 andcc %l7, 1, %g0 ! Text fault?
863
864 be 1f
865 sethi %hi(KERNBASE), %l4
866
867 mov %l1, %l5 ! PC
868
8691:
870 cmp %l5, %l4
871 blu sun4c_fault_fromuser
872 sethi %hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4
873
874 /* If the kernel references a bum kernel pointer, or a pte which
875 * points to a non existent page in ram, we will run this code
876 * _forever_ and lock up the machine!!!!! So we must check for
877 * this condition, the AC_SYNC_ERR bits are what we must examine.
878 * Also a parity error would make this happen as well. So we just
879 * check that we are in fact servicing a tlb miss and not some
880 * other type of fault for the kernel.
881 */
882 andcc %l6, 0x80, %g0
883 be sun4c_fault_fromuser
884 and %l5, %l4, %l5
885
886 /* Test for NULL pte_t * in vmalloc area. */
887 sethi %hi(VMALLOC_START), %l4
888 cmp %l5, %l4
889 blu,a invalid_segment_patch1
890 lduXa [%l5] ASI_SEGMAP, %l4
891
892 sethi %hi(swapper_pg_dir), %l4
893 srl %l5, SUN4C_PGDIR_SHIFT, %l6
894 or %l4, %lo(swapper_pg_dir), %l4
895 sll %l6, 2, %l6
896 ld [%l4 + %l6], %l4
897 andcc %l4, PAGE_MASK, %g0
898 be sun4c_fault_fromuser
899 lduXa [%l5] ASI_SEGMAP, %l4
900
901invalid_segment_patch1:
902 cmp %l4, 0x7f
903 bne 1f
904 sethi %hi(sun4c_kfree_ring), %l4
905 or %l4, %lo(sun4c_kfree_ring), %l4
906 ld [%l4 + 0x18], %l3
907 deccc %l3 ! do we have a free entry?
908 bcs,a 2f ! no, unmap one.
909 sethi %hi(sun4c_kernel_ring), %l4
910
911 st %l3, [%l4 + 0x18] ! sun4c_kfree_ring.num_entries--
912
913 ld [%l4 + 0x00], %l6 ! entry = sun4c_kfree_ring.ringhd.next
914 st %l5, [%l6 + 0x08] ! entry->vaddr = address
915
916 ld [%l6 + 0x00], %l3 ! next = entry->next
917 ld [%l6 + 0x04], %l7 ! entry->prev
918
919 st %l7, [%l3 + 0x04] ! next->prev = entry->prev
920 st %l3, [%l7 + 0x00] ! entry->prev->next = next
921
922 sethi %hi(sun4c_kernel_ring), %l4
923 or %l4, %lo(sun4c_kernel_ring), %l4
924 ! head = &sun4c_kernel_ring.ringhd
925
926 ld [%l4 + 0x00], %l7 ! head->next
927
928 st %l4, [%l6 + 0x04] ! entry->prev = head
929 st %l7, [%l6 + 0x00] ! entry->next = head->next
930 st %l6, [%l7 + 0x04] ! head->next->prev = entry
931
932 st %l6, [%l4 + 0x00] ! head->next = entry
933
934 ld [%l4 + 0x18], %l3
935 inc %l3 ! sun4c_kernel_ring.num_entries++
936 st %l3, [%l4 + 0x18]
937 b 4f
938 ld [%l6 + 0x08], %l5
939
9402:
941 or %l4, %lo(sun4c_kernel_ring), %l4
942 ! head = &sun4c_kernel_ring.ringhd
943
944 ld [%l4 + 0x04], %l6 ! entry = head->prev
945
946 ld [%l6 + 0x08], %l3 ! tmp = entry->vaddr
947
948 ! Flush segment from the cache.
949 sethi %hi((64 * 1024)), %l7
9509:
951vac_hwflush_patch1:
952vac_linesize_patch:
953 subcc %l7, 16, %l7
954 bne 9b
955vac_hwflush_patch2:
956 sta %g0, [%l3 + %l7] ASI_FLUSHSEG
957
958 st %l5, [%l6 + 0x08] ! entry->vaddr = address
959
960 ld [%l6 + 0x00], %l5 ! next = entry->next
961 ld [%l6 + 0x04], %l7 ! entry->prev
962
963 st %l7, [%l5 + 0x04] ! next->prev = entry->prev
964 st %l5, [%l7 + 0x00] ! entry->prev->next = next
965 st %l4, [%l6 + 0x04] ! entry->prev = head
966
967 ld [%l4 + 0x00], %l7 ! head->next
968
969 st %l7, [%l6 + 0x00] ! entry->next = head->next
970 st %l6, [%l7 + 0x04] ! head->next->prev = entry
971 st %l6, [%l4 + 0x00] ! head->next = entry
972
973 mov %l3, %l5 ! address = tmp
974
9754:
976num_context_patch1:
977 mov 0x08, %l7
978
979 ld [%l6 + 0x08], %l4
980 ldub [%l6 + 0x0c], %l3
981 or %l4, %l3, %l4 ! encode new vaddr/pseg into l4
982
983 sethi %hi(AC_CONTEXT), %l3
984 lduba [%l3] ASI_CONTROL, %l6
985
986 /* Invalidate old mapping, instantiate new mapping,
987 * for each context. Registers l6/l7 are live across
988 * this loop.
989 */
9903: deccc %l7
991 sethi %hi(AC_CONTEXT), %l3
992 stba %l7, [%l3] ASI_CONTROL
993invalid_segment_patch2:
994 mov 0x7f, %l3
995 stXa %l3, [%l5] ASI_SEGMAP
996 andn %l4, 0x1ff, %l3
997 bne 3b
998 stXa %l4, [%l3] ASI_SEGMAP
999
1000 sethi %hi(AC_CONTEXT), %l3
1001 stba %l6, [%l3] ASI_CONTROL
1002
1003 andn %l4, 0x1ff, %l5
1004
10051:
1006 sethi %hi(VMALLOC_START), %l4
1007 cmp %l5, %l4
1008
1009 bgeu 1f
1010 mov 1 << (SUN4C_REAL_PGDIR_SHIFT - PAGE_SHIFT), %l7
1011
1012 sethi %hi(KERNBASE), %l6
1013
1014 sub %l5, %l6, %l4
1015 srl %l4, PAGE_SHIFT, %l4
1016 sethi %hi((SUN4C_PAGE_KERNEL & 0xf4000000)), %l3
1017 or %l3, %l4, %l3
1018
1019 sethi %hi(PAGE_SIZE), %l4
1020
10212:
1022 sta %l3, [%l5] ASI_PTE
1023 deccc %l7
1024 inc %l3
1025 bne 2b
1026 add %l5, %l4, %l5
1027
1028 b 7f
1029 sethi %hi(sun4c_kernel_faults), %l4
1030
10311:
1032 srl %l5, SUN4C_PGDIR_SHIFT, %l3
1033 sethi %hi(swapper_pg_dir), %l4
1034 or %l4, %lo(swapper_pg_dir), %l4
1035 sll %l3, 2, %l3
1036 ld [%l4 + %l3], %l4
1037 and %l4, PAGE_MASK, %l4
1038
1039 srl %l5, (PAGE_SHIFT - 2), %l6
1040 and %l6, ((SUN4C_PTRS_PER_PTE - 1) << 2), %l6
1041 add %l6, %l4, %l6
1042
1043 sethi %hi(PAGE_SIZE), %l4
1044
10452:
1046 ld [%l6], %l3
1047 deccc %l7
1048 sta %l3, [%l5] ASI_PTE
1049 add %l6, 0x4, %l6
1050 bne 2b
1051 add %l5, %l4, %l5
1052
1053 sethi %hi(sun4c_kernel_faults), %l4
10547:
1055 ld [%l4 + %lo(sun4c_kernel_faults)], %l3
1056 inc %l3
1057 st %l3, [%l4 + %lo(sun4c_kernel_faults)]
1058
1059 /* Restore condition codes */
1060 wr %l0, 0x0, %psr
1061 WRITE_PAUSE
1062 jmp %l1
1063 rett %l2
1064
1065sun4c_fault_fromuser:
1066 SAVE_ALL
1067 nop
1068
1069 mov %l7, %o1 ! Decode the info from %l7
1070 mov %l7, %o2
1071 and %o1, 1, %o1 ! arg2 = text_faultp
1072 mov %l7, %o3
1073 and %o2, 2, %o2 ! arg3 = writep
1074 andn %o3, 0xfff, %o3 ! arg4 = faulting address
1075
1076 wr %l0, PSR_ET, %psr
1077 WRITE_PAUSE
1078
1079 call do_sun4c_fault
1080 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
1081
1082 RESTORE_ALL
1083
1084 .align 4
1085 .globl srmmu_fault
1086srmmu_fault:
1087 mov 0x400, %l5
1088 mov 0x300, %l4
1089
1090 lda [%l5] ASI_M_MMUREGS, %l6 ! read sfar first
1091 lda [%l4] ASI_M_MMUREGS, %l5 ! read sfsr last
1092
1093 andn %l6, 0xfff, %l6
1094 srl %l5, 6, %l5 ! and encode all info into l7
1095
1096 and %l5, 2, %l5
1097 or %l5, %l6, %l6
1098
1099 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
1100
1101 SAVE_ALL
1102
1103 mov %l7, %o1
1104 mov %l7, %o2
1105 and %o1, 1, %o1 ! arg2 = text_faultp
1106 mov %l7, %o3
1107 and %o2, 2, %o2 ! arg3 = writep
1108 andn %o3, 0xfff, %o3 ! arg4 = faulting address
1109
1110 wr %l0, PSR_ET, %psr
1111 WRITE_PAUSE
1112
1113 call do_sparc_fault
1114 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
1115
1116 RESTORE_ALL
1117
1118 .align 4
1119 .globl sys_nis_syscall
1120sys_nis_syscall:
1121 mov %o7, %l5
1122 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1123 call c_sys_nis_syscall
1124 mov %l5, %o7
1125
1126 .align 4
1127 .globl sys_execve
1128sys_execve:
1129 mov %o7, %l5
1130 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1131 call sparc_execve
1132 mov %l5, %o7
1133
1134 .globl sunos_execv
1135sunos_execv:
1136 st %g0, [%sp + STACKFRAME_SZ + PT_I2]
1137
1138 call sparc_execve
1139 add %sp, STACKFRAME_SZ, %o0
1140
1141 b ret_sys_call
1142 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
1143
1144 .align 4
1145 .globl sys_sparc_pipe
1146sys_sparc_pipe:
1147 mov %o7, %l5
1148 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1149 call sparc_pipe
1150 mov %l5, %o7
1151
1152 .align 4
1153 .globl sys_sigaltstack
1154sys_sigaltstack:
1155 mov %o7, %l5
1156 mov %fp, %o2
1157 call do_sigaltstack
1158 mov %l5, %o7
1159
1160 .align 4
1161 .globl sys_sigstack
1162sys_sigstack:
1163 mov %o7, %l5
1164 mov %fp, %o2
1165 call do_sys_sigstack
1166 mov %l5, %o7
1167
1168 .align 4
1169 .globl sys_sigreturn
1170sys_sigreturn:
1171 call do_sigreturn
1172 add %sp, STACKFRAME_SZ, %o0
1173
1174 ld [%curptr + TI_FLAGS], %l5
1175 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1176 be 1f
1177 nop
1178
1179 call syscall_trace
1180 nop
1181
11821:
1183 /* We don't want to muck with user registers like a
1184 * normal syscall, just return.
1185 */
1186 RESTORE_ALL
1187
1188 .align 4
1189 .globl sys_rt_sigreturn
1190sys_rt_sigreturn:
1191 call do_rt_sigreturn
1192 add %sp, STACKFRAME_SZ, %o0
1193
1194 ld [%curptr + TI_FLAGS], %l5
1195 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1196 be 1f
1197 nop
1198
1199 add %sp, STACKFRAME_SZ, %o0
1200 call syscall_trace
1201 mov 1, %o1
1202
12031:
1204 /* We are returning to a signal handler. */
1205 RESTORE_ALL
1206
1207 /* Now that we have a real sys_clone, sys_fork() is
1208 * implemented in terms of it. Our _real_ implementation
1209 * of SunOS vfork() will use sys_vfork().
1210 *
1211 * XXX These three should be consolidated into mostly shared
1212 * XXX code just like on sparc64... -DaveM
1213 */
1214 .align 4
1215 .globl sys_fork, flush_patch_two
1216sys_fork:
1217 mov %o7, %l5
1218flush_patch_two:
1219 FLUSH_ALL_KERNEL_WINDOWS;
1220 ld [%curptr + TI_TASK], %o4
1221 rd %psr, %g4
1222 WRITE_PAUSE
1223 mov SIGCHLD, %o0 ! arg0: clone flags
1224 rd %wim, %g5
1225 WRITE_PAUSE
1226 mov %fp, %o1 ! arg1: usp
1227 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1228 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
1229 mov 0, %o3
1230 call sparc_do_fork
1231 mov %l5, %o7
1232
1233 /* Whee, kernel threads! */
1234 .globl sys_clone, flush_patch_three
1235sys_clone:
1236 mov %o7, %l5
1237flush_patch_three:
1238 FLUSH_ALL_KERNEL_WINDOWS;
1239 ld [%curptr + TI_TASK], %o4
1240 rd %psr, %g4
1241 WRITE_PAUSE
1242
1243 /* arg0,1: flags,usp -- loaded already */
1244 cmp %o1, 0x0 ! Is new_usp NULL?
1245 rd %wim, %g5
1246 WRITE_PAUSE
1247 be,a 1f
1248 mov %fp, %o1 ! yes, use callers usp
1249 andn %o1, 7, %o1 ! no, align to 8 bytes
12501:
1251 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1252 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
1253 mov 0, %o3
1254 call sparc_do_fork
1255 mov %l5, %o7
1256
1257 /* Whee, real vfork! */
1258 .globl sys_vfork, flush_patch_four
1259sys_vfork:
1260flush_patch_four:
1261 FLUSH_ALL_KERNEL_WINDOWS;
1262 ld [%curptr + TI_TASK], %o4
1263 rd %psr, %g4
1264 WRITE_PAUSE
1265 rd %wim, %g5
1266 WRITE_PAUSE
1267 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1268 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
1269 mov %fp, %o1
1270 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
1271 sethi %hi(sparc_do_fork), %l1
1272 mov 0, %o3
1273 jmpl %l1 + %lo(sparc_do_fork), %g0
1274 add %sp, STACKFRAME_SZ, %o2
1275
1276 .align 4
1277linux_sparc_ni_syscall:
1278 sethi %hi(sys_ni_syscall), %l7
1279 b syscall_is_too_hard
1280 or %l7, %lo(sys_ni_syscall), %l7
1281
1282linux_fast_syscall:
1283 andn %l7, 3, %l7
1284 mov %i0, %o0
1285 mov %i1, %o1
1286 mov %i2, %o2
1287 jmpl %l7 + %g0, %g0
1288 mov %i3, %o3
1289
1290linux_syscall_trace:
1291 add %sp, STACKFRAME_SZ, %o0
1292 call syscall_trace
1293 mov 0, %o1
1294 cmp %o0, 0
1295 bne 3f
1296 mov -ENOSYS, %o0
1297 mov %i0, %o0
1298 mov %i1, %o1
1299 mov %i2, %o2
1300 mov %i3, %o3
1301 b 2f
1302 mov %i4, %o4
1303
1304 .globl ret_from_fork
1305ret_from_fork:
1306 call schedule_tail
1307 ld [%g3 + TI_TASK], %o0
1308 b ret_sys_call
1309 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
1310
1311 /* Linux native system calls enter here... */
1312 .align 4
1313 .globl linux_sparc_syscall
1314linux_sparc_syscall:
1315 sethi %hi(PSR_SYSCALL), %l4
1316 or %l0, %l4, %l0
1317 /* Direct access to user regs, must faster. */
1318 cmp %g1, NR_syscalls
1319 bgeu linux_sparc_ni_syscall
1320 sll %g1, 2, %l4
1321 ld [%l7 + %l4], %l7
1322 andcc %l7, 1, %g0
1323 bne linux_fast_syscall
1324 /* Just do first insn from SAVE_ALL in the delay slot */
1325
1326syscall_is_too_hard:
1327 SAVE_ALL_HEAD
1328 rd %wim, %l3
1329
1330 wr %l0, PSR_ET, %psr
1331 mov %i0, %o0
1332 mov %i1, %o1
1333 mov %i2, %o2
1334
1335 ld [%curptr + TI_FLAGS], %l5
1336 mov %i3, %o3
1337 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1338 mov %i4, %o4
1339 bne linux_syscall_trace
1340 mov %i0, %l5
13412:
1342 call %l7
1343 mov %i5, %o5
1344
13453:
1346 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1347
1348ret_sys_call:
1349 ld [%curptr + TI_FLAGS], %l6
1350 cmp %o0, -ERESTART_RESTARTBLOCK
1351 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1352 set PSR_C, %g2
1353 bgeu 1f
1354 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1355
1356 /* System call success, clear Carry condition code. */
1357 andn %g3, %g2, %g3
1358 clr %l6
1359 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1360 bne linux_syscall_trace2
1361 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1362 add %l1, 0x4, %l2 /* npc = npc+4 */
1363 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1364 b ret_trap_entry
1365 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
13661:
1367 /* System call failure, set Carry condition code.
1368 * Also, get abs(errno) to return to the process.
1369 */
1370 sub %g0, %o0, %o0
1371 or %g3, %g2, %g3
1372 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1373 mov 1, %l6
1374 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1375 bne linux_syscall_trace2
1376 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1377 add %l1, 0x4, %l2 /* npc = npc+4 */
1378 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1379 b ret_trap_entry
1380 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1381
1382linux_syscall_trace2:
1383 add %sp, STACKFRAME_SZ, %o0
1384 mov 1, %o1
1385 call syscall_trace
1386 add %l1, 0x4, %l2 /* npc = npc+4 */
1387 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1388 b ret_trap_entry
1389 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1390
1391
1392/* Saving and restoring the FPU state is best done from lowlevel code.
1393 *
1394 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1395 * void *fpqueue, unsigned long *fpqdepth)
1396 */
1397
1398 .globl fpsave
1399fpsave:
1400 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1401 ld [%o1], %g1
1402 set 0x2000, %g4
1403 andcc %g1, %g4, %g0
1404 be 2f
1405 mov 0, %g2
1406
1407 /* We have an fpqueue to save. */
14081:
1409 std %fq, [%o2]
1410fpsave_magic:
1411 st %fsr, [%o1]
1412 ld [%o1], %g3
1413 andcc %g3, %g4, %g0
1414 add %g2, 1, %g2
1415 bne 1b
1416 add %o2, 8, %o2
1417
14182:
1419 st %g2, [%o3]
1420
1421 std %f0, [%o0 + 0x00]
1422 std %f2, [%o0 + 0x08]
1423 std %f4, [%o0 + 0x10]
1424 std %f6, [%o0 + 0x18]
1425 std %f8, [%o0 + 0x20]
1426 std %f10, [%o0 + 0x28]
1427 std %f12, [%o0 + 0x30]
1428 std %f14, [%o0 + 0x38]
1429 std %f16, [%o0 + 0x40]
1430 std %f18, [%o0 + 0x48]
1431 std %f20, [%o0 + 0x50]
1432 std %f22, [%o0 + 0x58]
1433 std %f24, [%o0 + 0x60]
1434 std %f26, [%o0 + 0x68]
1435 std %f28, [%o0 + 0x70]
1436 retl
1437 std %f30, [%o0 + 0x78]
1438
1439 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1440 * code for pointing out this possible deadlock, while we save state
1441 * above we could trap on the fsr store so our low level fpu trap
1442 * code has to know how to deal with this.
1443 */
1444fpsave_catch:
1445 b fpsave_magic + 4
1446 st %fsr, [%o1]
1447
1448fpsave_catch2:
1449 b fpsave + 4
1450 st %fsr, [%o1]
1451
1452 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1453
1454 .globl fpload
1455fpload:
1456 ldd [%o0 + 0x00], %f0
1457 ldd [%o0 + 0x08], %f2
1458 ldd [%o0 + 0x10], %f4
1459 ldd [%o0 + 0x18], %f6
1460 ldd [%o0 + 0x20], %f8
1461 ldd [%o0 + 0x28], %f10
1462 ldd [%o0 + 0x30], %f12
1463 ldd [%o0 + 0x38], %f14
1464 ldd [%o0 + 0x40], %f16
1465 ldd [%o0 + 0x48], %f18
1466 ldd [%o0 + 0x50], %f20
1467 ldd [%o0 + 0x58], %f22
1468 ldd [%o0 + 0x60], %f24
1469 ldd [%o0 + 0x68], %f26
1470 ldd [%o0 + 0x70], %f28
1471 ldd [%o0 + 0x78], %f30
1472 ld [%o1], %fsr
1473 retl
1474 nop
1475
1476 /* __ndelay and __udelay take two arguments:
1477 * 0 - nsecs or usecs to delay
1478 * 1 - per_cpu udelay_val (loops per jiffy)
1479 *
1480 * Note that ndelay gives HZ times higher resolution but has a 10ms
1481 * limit. udelay can handle up to 1s.
1482 */
1483 .globl __ndelay
1484__ndelay:
1485 save %sp, -STACKFRAME_SZ, %sp
1486 mov %i0, %o0
1487 call .umul ! round multiplier up so large ns ok
1488 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1489 call .umul
1490 mov %i1, %o1 ! udelay_val
1491 ba delay_continue
1492 mov %o1, %o0 ! >>32 later for better resolution
1493
1494 .globl __udelay
1495__udelay:
1496 save %sp, -STACKFRAME_SZ, %sp
1497 mov %i0, %o0
1498 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1499 call .umul
1500 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1501 call .umul
1502 mov %i1, %o1 ! udelay_val
1503 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1504 or %g0, %lo(0x028f4b62), %l0
1505 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1506 bcs,a 3f
1507 add %o1, 0x01, %o1
15083:
1509 call .umul
1510 mov HZ, %o0 ! >>32 earlier for wider range
1511
1512delay_continue:
1513 cmp %o0, 0x0
15141:
1515 bne 1b
1516 subcc %o0, 1, %o0
1517
1518 ret
1519 restore
1520
1521 /* Handle a software breakpoint */
1522 /* We have to inform parent that child has stopped */
1523 .align 4
1524 .globl breakpoint_trap
1525breakpoint_trap:
1526 rd %wim,%l3
1527 SAVE_ALL
1528 wr %l0, PSR_ET, %psr
1529 WRITE_PAUSE
1530
1531 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1532 call sparc_breakpoint
1533 add %sp, STACKFRAME_SZ, %o0
1534
1535 RESTORE_ALL
1536
1537#ifdef CONFIG_KGDB
1538 .align 4
1539 .globl kgdb_trap_low
1540 .type kgdb_trap_low,#function
1541kgdb_trap_low:
1542 rd %wim,%l3
1543 SAVE_ALL
1544 wr %l0, PSR_ET, %psr
1545 WRITE_PAUSE
1546
1547 call kgdb_trap
1548 add %sp, STACKFRAME_SZ, %o0
1549
1550 RESTORE_ALL
1551 .size kgdb_trap_low,.-kgdb_trap_low
1552#endif
1553
1554 .align 4
1555 .globl flush_patch_exception
1556flush_patch_exception:
1557 FLUSH_ALL_KERNEL_WINDOWS;
1558 ldd [%o0], %o6
1559 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1560 mov 1, %g1 ! signal EFAULT condition
1561
1562 .align 4
1563 .globl kill_user_windows, kuw_patch1_7win
1564 .globl kuw_patch1
1565kuw_patch1_7win: sll %o3, 6, %o3
1566
1567 /* No matter how much overhead this routine has in the worst
1568 * case scenerio, it is several times better than taking the
1569 * traps with the old method of just doing flush_user_windows().
1570 */
1571kill_user_windows:
1572 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1573 orcc %g0, %o0, %g0 ! if no bits set, we are done
1574 be 3f ! nothing to do
1575 rd %psr, %o5 ! must clear interrupts
1576 or %o5, PSR_PIL, %o4 ! or else that could change
1577 wr %o4, 0x0, %psr ! the uwinmask state
1578 WRITE_PAUSE ! burn them cycles
15791:
1580 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1581 orcc %g0, %o0, %g0 ! did an interrupt come in?
1582 be 4f ! yep, we are done
1583 rd %wim, %o3 ! get current wim
1584 srl %o3, 1, %o4 ! simulate a save
1585kuw_patch1:
1586 sll %o3, 7, %o3 ! compute next wim
1587 or %o4, %o3, %o3 ! result
1588 andncc %o0, %o3, %o0 ! clean this bit in umask
1589 bne kuw_patch1 ! not done yet
1590 srl %o3, 1, %o4 ! begin another save simulation
1591 wr %o3, 0x0, %wim ! set the new wim
1592 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
15934:
1594 wr %o5, 0x0, %psr ! re-enable interrupts
1595 WRITE_PAUSE ! burn baby burn
15963:
1597 retl ! return
1598 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1599
1600 .align 4
1601 .globl restore_current
1602restore_current:
1603 LOAD_CURRENT(g6, o0)
1604 retl
1605 nop
1606
1607#ifdef CONFIG_PCIC_PCI
1608#include <asm/pcic.h>
1609
1610 .align 4
1611 .globl linux_trap_ipi15_pcic
1612linux_trap_ipi15_pcic:
1613 rd %wim, %l3
1614 SAVE_ALL
1615
1616 /*
1617 * First deactivate NMI
1618 * or we cannot drop ET, cannot get window spill traps.
1619 * The busy loop is necessary because the PIO error
1620 * sometimes does not go away quickly and we trap again.
1621 */
1622 sethi %hi(pcic_regs), %o1
1623 ld [%o1 + %lo(pcic_regs)], %o2
1624
1625 ! Get pending status for printouts later.
1626 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1627
1628 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1629 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
16301:
1631 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1632 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1633 bne 1b
1634 nop
1635
1636 or %l0, PSR_PIL, %l4
1637 wr %l4, 0x0, %psr
1638 WRITE_PAUSE
1639 wr %l4, PSR_ET, %psr
1640 WRITE_PAUSE
1641
1642 call pcic_nmi
1643 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1644 RESTORE_ALL
1645
1646 .globl pcic_nmi_trap_patch
1647pcic_nmi_trap_patch:
1648 sethi %hi(linux_trap_ipi15_pcic), %l3
1649 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1650 rd %psr, %l0
1651 .word 0
1652
1653#endif /* CONFIG_PCIC_PCI */
1654
1655 .globl flushw_all
1656flushw_all:
1657 save %sp, -0x40, %sp
1658 save %sp, -0x40, %sp
1659 save %sp, -0x40, %sp
1660 save %sp, -0x40, %sp
1661 save %sp, -0x40, %sp
1662 save %sp, -0x40, %sp
1663 save %sp, -0x40, %sp
1664 restore
1665 restore
1666 restore
1667 restore
1668 restore
1669 restore
1670 ret
1671 restore
1672
1673/* End of entry.S */
1/* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
2 *
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
8 */
9
10#include <linux/linkage.h>
11#include <linux/errno.h>
12
13#include <asm/head.h>
14#include <asm/asi.h>
15#include <asm/smp.h>
16#include <asm/contregs.h>
17#include <asm/ptrace.h>
18#include <asm/asm-offsets.h>
19#include <asm/psr.h>
20#include <asm/vaddrs.h>
21#include <asm/page.h>
22#include <asm/pgtable.h>
23#include <asm/winmacro.h>
24#include <asm/signal.h>
25#include <asm/obio.h>
26#include <asm/mxcc.h>
27#include <asm/thread_info.h>
28#include <asm/param.h>
29#include <asm/unistd.h>
30
31#include <asm/asmmacro.h>
32
33#define curptr g6
34
35/* These are just handy. */
36#define _SV save %sp, -STACKFRAME_SZ, %sp
37#define _RS restore
38
39#define FLUSH_ALL_KERNEL_WINDOWS \
40 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
41 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
42
43 .text
44
45#ifdef CONFIG_KGDB
46 .align 4
47 .globl arch_kgdb_breakpoint
48 .type arch_kgdb_breakpoint,#function
49arch_kgdb_breakpoint:
50 ta 0x7d
51 retl
52 nop
53 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
54#endif
55
56#if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
57 .align 4
58 .globl floppy_hardint
59floppy_hardint:
60 /*
61 * This code cannot touch registers %l0 %l1 and %l2
62 * because SAVE_ALL depends on their values. It depends
63 * on %l3 also, but we regenerate it before a call.
64 * Other registers are:
65 * %l3 -- base address of fdc registers
66 * %l4 -- pdma_vaddr
67 * %l5 -- scratch for ld/st address
68 * %l6 -- pdma_size
69 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
70 */
71
72 /* Do we have work to do? */
73 sethi %hi(doing_pdma), %l7
74 ld [%l7 + %lo(doing_pdma)], %l7
75 cmp %l7, 0
76 be floppy_dosoftint
77 nop
78
79 /* Load fdc register base */
80 sethi %hi(fdc_status), %l3
81 ld [%l3 + %lo(fdc_status)], %l3
82
83 /* Setup register addresses */
84 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
85 ld [%l5 + %lo(pdma_vaddr)], %l4
86 sethi %hi(pdma_size), %l5 ! bytes to go
87 ld [%l5 + %lo(pdma_size)], %l6
88next_byte:
89 ldub [%l3], %l7
90
91 andcc %l7, 0x80, %g0 ! Does fifo still have data
92 bz floppy_fifo_emptied ! fifo has been emptied...
93 andcc %l7, 0x20, %g0 ! in non-dma mode still?
94 bz floppy_overrun ! nope, overrun
95 andcc %l7, 0x40, %g0 ! 0=write 1=read
96 bz floppy_write
97 sub %l6, 0x1, %l6
98
99 /* Ok, actually read this byte */
100 ldub [%l3 + 1], %l7
101 orcc %g0, %l6, %g0
102 stb %l7, [%l4]
103 bne next_byte
104 add %l4, 0x1, %l4
105
106 b floppy_tdone
107 nop
108
109floppy_write:
110 /* Ok, actually write this byte */
111 ldub [%l4], %l7
112 orcc %g0, %l6, %g0
113 stb %l7, [%l3 + 1]
114 bne next_byte
115 add %l4, 0x1, %l4
116
117 /* fall through... */
118floppy_tdone:
119 sethi %hi(pdma_vaddr), %l5
120 st %l4, [%l5 + %lo(pdma_vaddr)]
121 sethi %hi(pdma_size), %l5
122 st %l6, [%l5 + %lo(pdma_size)]
123 /* Flip terminal count pin */
124 set auxio_register, %l7
125 ld [%l7], %l7
126
127 ldub [%l7], %l5
128
129 or %l5, 0xc2, %l5
130 stb %l5, [%l7]
131 andn %l5, 0x02, %l5
132
1332:
134 /* Kill some time so the bits set */
135 WRITE_PAUSE
136 WRITE_PAUSE
137
138 stb %l5, [%l7]
139
140 /* Prevent recursion */
141 sethi %hi(doing_pdma), %l7
142 b floppy_dosoftint
143 st %g0, [%l7 + %lo(doing_pdma)]
144
145 /* We emptied the FIFO, but we haven't read everything
146 * as of yet. Store the current transfer address and
147 * bytes left to read so we can continue when the next
148 * fast IRQ comes in.
149 */
150floppy_fifo_emptied:
151 sethi %hi(pdma_vaddr), %l5
152 st %l4, [%l5 + %lo(pdma_vaddr)]
153 sethi %hi(pdma_size), %l7
154 st %l6, [%l7 + %lo(pdma_size)]
155
156 /* Restore condition codes */
157 wr %l0, 0x0, %psr
158 WRITE_PAUSE
159
160 jmp %l1
161 rett %l2
162
163floppy_overrun:
164 sethi %hi(pdma_vaddr), %l5
165 st %l4, [%l5 + %lo(pdma_vaddr)]
166 sethi %hi(pdma_size), %l5
167 st %l6, [%l5 + %lo(pdma_size)]
168 /* Prevent recursion */
169 sethi %hi(doing_pdma), %l7
170 st %g0, [%l7 + %lo(doing_pdma)]
171
172 /* fall through... */
173floppy_dosoftint:
174 rd %wim, %l3
175 SAVE_ALL
176
177 /* Set all IRQs off. */
178 or %l0, PSR_PIL, %l4
179 wr %l4, 0x0, %psr
180 WRITE_PAUSE
181 wr %l4, PSR_ET, %psr
182 WRITE_PAUSE
183
184 mov 11, %o0 ! floppy irq level (unused anyway)
185 mov %g0, %o1 ! devid is not used in fast interrupts
186 call sparc_floppy_irq
187 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
188
189 RESTORE_ALL
190
191#endif /* (CONFIG_BLK_DEV_FD) */
192
193 /* Bad trap handler */
194 .globl bad_trap_handler
195bad_trap_handler:
196 SAVE_ALL
197
198 wr %l0, PSR_ET, %psr
199 WRITE_PAUSE
200
201 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
202 call do_hw_interrupt
203 mov %l7, %o1 ! trap number
204
205 RESTORE_ALL
206
207/* For now all IRQ's not registered get sent here. handler_irq() will
208 * see if a routine is registered to handle this interrupt and if not
209 * it will say so on the console.
210 */
211
212 .align 4
213 .globl real_irq_entry, patch_handler_irq
214real_irq_entry:
215 SAVE_ALL
216
217#ifdef CONFIG_SMP
218 .globl patchme_maybe_smp_msg
219
220 cmp %l7, 11
221patchme_maybe_smp_msg:
222 bgu maybe_smp4m_msg
223 nop
224#endif
225
226real_irq_continue:
227 or %l0, PSR_PIL, %g2
228 wr %g2, 0x0, %psr
229 WRITE_PAUSE
230 wr %g2, PSR_ET, %psr
231 WRITE_PAUSE
232 mov %l7, %o0 ! irq level
233patch_handler_irq:
234 call handler_irq
235 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
236 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
237 wr %g2, PSR_ET, %psr ! keep ET up
238 WRITE_PAUSE
239
240 RESTORE_ALL
241
242#ifdef CONFIG_SMP
243 /* SMP per-cpu ticker interrupts are handled specially. */
244smp4m_ticker:
245 bne real_irq_continue+4
246 or %l0, PSR_PIL, %g2
247 wr %g2, 0x0, %psr
248 WRITE_PAUSE
249 wr %g2, PSR_ET, %psr
250 WRITE_PAUSE
251 call smp4m_percpu_timer_interrupt
252 add %sp, STACKFRAME_SZ, %o0
253 wr %l0, PSR_ET, %psr
254 WRITE_PAUSE
255 RESTORE_ALL
256
257#define GET_PROCESSOR4M_ID(reg) \
258 rd %tbr, %reg; \
259 srl %reg, 12, %reg; \
260 and %reg, 3, %reg;
261
262 /* Here is where we check for possible SMP IPI passed to us
263 * on some level other than 15 which is the NMI and only used
264 * for cross calls. That has a separate entry point below.
265 *
266 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
267 */
268maybe_smp4m_msg:
269 GET_PROCESSOR4M_ID(o3)
270 sethi %hi(sun4m_irq_percpu), %l5
271 sll %o3, 2, %o3
272 or %l5, %lo(sun4m_irq_percpu), %o5
273 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
274 ld [%o5 + %o3], %o1
275 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
276 andcc %o3, %o2, %g0
277 be,a smp4m_ticker
278 cmp %l7, 14
279 /* Soft-IRQ IPI */
280 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
281 WRITE_PAUSE
282 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
283 WRITE_PAUSE
284 or %l0, PSR_PIL, %l4
285 wr %l4, 0x0, %psr
286 WRITE_PAUSE
287 wr %l4, PSR_ET, %psr
288 WRITE_PAUSE
289 srl %o3, 28, %o2 ! shift for simpler checks below
290maybe_smp4m_msg_check_single:
291 andcc %o2, 0x1, %g0
292 beq,a maybe_smp4m_msg_check_mask
293 andcc %o2, 0x2, %g0
294 call smp_call_function_single_interrupt
295 nop
296 andcc %o2, 0x2, %g0
297maybe_smp4m_msg_check_mask:
298 beq,a maybe_smp4m_msg_check_resched
299 andcc %o2, 0x4, %g0
300 call smp_call_function_interrupt
301 nop
302 andcc %o2, 0x4, %g0
303maybe_smp4m_msg_check_resched:
304 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
305 beq,a maybe_smp4m_msg_out
306 nop
307 call smp_resched_interrupt
308 nop
309maybe_smp4m_msg_out:
310 RESTORE_ALL
311
312 .align 4
313 .globl linux_trap_ipi15_sun4m
314linux_trap_ipi15_sun4m:
315 SAVE_ALL
316 sethi %hi(0x80000000), %o2
317 GET_PROCESSOR4M_ID(o0)
318 sethi %hi(sun4m_irq_percpu), %l5
319 or %l5, %lo(sun4m_irq_percpu), %o5
320 sll %o0, 2, %o0
321 ld [%o5 + %o0], %o5
322 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
323 andcc %o3, %o2, %g0
324 be sun4m_nmi_error ! Must be an NMI async memory error
325 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
326 WRITE_PAUSE
327 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
328 WRITE_PAUSE
329 or %l0, PSR_PIL, %l4
330 wr %l4, 0x0, %psr
331 WRITE_PAUSE
332 wr %l4, PSR_ET, %psr
333 WRITE_PAUSE
334 call smp4m_cross_call_irq
335 nop
336 b ret_trap_lockless_ipi
337 clr %l6
338
339 .globl smp4d_ticker
340 /* SMP per-cpu ticker interrupts are handled specially. */
341smp4d_ticker:
342 SAVE_ALL
343 or %l0, PSR_PIL, %g2
344 sethi %hi(CC_ICLR), %o0
345 sethi %hi(1 << 14), %o1
346 or %o0, %lo(CC_ICLR), %o0
347 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
348 wr %g2, 0x0, %psr
349 WRITE_PAUSE
350 wr %g2, PSR_ET, %psr
351 WRITE_PAUSE
352 call smp4d_percpu_timer_interrupt
353 add %sp, STACKFRAME_SZ, %o0
354 wr %l0, PSR_ET, %psr
355 WRITE_PAUSE
356 RESTORE_ALL
357
358 .align 4
359 .globl linux_trap_ipi15_sun4d
360linux_trap_ipi15_sun4d:
361 SAVE_ALL
362 sethi %hi(CC_BASE), %o4
363 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
364 or %o4, (CC_EREG - CC_BASE), %o0
365 ldda [%o0] ASI_M_MXCC, %o0
366 andcc %o0, %o2, %g0
367 bne 1f
368 sethi %hi(BB_STAT2), %o2
369 lduba [%o2] ASI_M_CTL, %o2
370 andcc %o2, BB_STAT2_MASK, %g0
371 bne 2f
372 or %o4, (CC_ICLR - CC_BASE), %o0
373 sethi %hi(1 << 15), %o1
374 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
375 or %l0, PSR_PIL, %l4
376 wr %l4, 0x0, %psr
377 WRITE_PAUSE
378 wr %l4, PSR_ET, %psr
379 WRITE_PAUSE
380 call smp4d_cross_call_irq
381 nop
382 b ret_trap_lockless_ipi
383 clr %l6
384
3851: /* MXCC error */
3862: /* BB error */
387 /* Disable PIL 15 */
388 set CC_IMSK, %l4
389 lduha [%l4] ASI_M_MXCC, %l5
390 sethi %hi(1 << 15), %l7
391 or %l5, %l7, %l5
392 stha %l5, [%l4] ASI_M_MXCC
393 /* FIXME */
3941: b,a 1b
395
396 .globl smpleon_ipi
397 .extern leon_ipi_interrupt
398 /* SMP per-cpu IPI interrupts are handled specially. */
399smpleon_ipi:
400 SAVE_ALL
401 or %l0, PSR_PIL, %g2
402 wr %g2, 0x0, %psr
403 WRITE_PAUSE
404 wr %g2, PSR_ET, %psr
405 WRITE_PAUSE
406 call leonsmp_ipi_interrupt
407 add %sp, STACKFRAME_SZ, %o1 ! pt_regs
408 wr %l0, PSR_ET, %psr
409 WRITE_PAUSE
410 RESTORE_ALL
411
412 .align 4
413 .globl linux_trap_ipi15_leon
414linux_trap_ipi15_leon:
415 SAVE_ALL
416 or %l0, PSR_PIL, %l4
417 wr %l4, 0x0, %psr
418 WRITE_PAUSE
419 wr %l4, PSR_ET, %psr
420 WRITE_PAUSE
421 call leon_cross_call_irq
422 nop
423 b ret_trap_lockless_ipi
424 clr %l6
425
426#endif /* CONFIG_SMP */
427
428 /* This routine handles illegal instructions and privileged
429 * instruction attempts from user code.
430 */
431 .align 4
432 .globl bad_instruction
433bad_instruction:
434 sethi %hi(0xc1f80000), %l4
435 ld [%l1], %l5
436 sethi %hi(0x81d80000), %l7
437 and %l5, %l4, %l5
438 cmp %l5, %l7
439 be 1f
440 SAVE_ALL
441
442 wr %l0, PSR_ET, %psr ! re-enable traps
443 WRITE_PAUSE
444
445 add %sp, STACKFRAME_SZ, %o0
446 mov %l1, %o1
447 mov %l2, %o2
448 call do_illegal_instruction
449 mov %l0, %o3
450
451 RESTORE_ALL
452
4531: /* unimplemented flush - just skip */
454 jmpl %l2, %g0
455 rett %l2 + 4
456
457 .align 4
458 .globl priv_instruction
459priv_instruction:
460 SAVE_ALL
461
462 wr %l0, PSR_ET, %psr
463 WRITE_PAUSE
464
465 add %sp, STACKFRAME_SZ, %o0
466 mov %l1, %o1
467 mov %l2, %o2
468 call do_priv_instruction
469 mov %l0, %o3
470
471 RESTORE_ALL
472
473 /* This routine handles unaligned data accesses. */
474 .align 4
475 .globl mna_handler
476mna_handler:
477 andcc %l0, PSR_PS, %g0
478 be mna_fromuser
479 nop
480
481 SAVE_ALL
482
483 wr %l0, PSR_ET, %psr
484 WRITE_PAUSE
485
486 ld [%l1], %o1
487 call kernel_unaligned_trap
488 add %sp, STACKFRAME_SZ, %o0
489
490 RESTORE_ALL
491
492mna_fromuser:
493 SAVE_ALL
494
495 wr %l0, PSR_ET, %psr ! re-enable traps
496 WRITE_PAUSE
497
498 ld [%l1], %o1
499 call user_unaligned_trap
500 add %sp, STACKFRAME_SZ, %o0
501
502 RESTORE_ALL
503
504 /* This routine handles floating point disabled traps. */
505 .align 4
506 .globl fpd_trap_handler
507fpd_trap_handler:
508 SAVE_ALL
509
510 wr %l0, PSR_ET, %psr ! re-enable traps
511 WRITE_PAUSE
512
513 add %sp, STACKFRAME_SZ, %o0
514 mov %l1, %o1
515 mov %l2, %o2
516 call do_fpd_trap
517 mov %l0, %o3
518
519 RESTORE_ALL
520
521 /* This routine handles Floating Point Exceptions. */
522 .align 4
523 .globl fpe_trap_handler
524fpe_trap_handler:
525 set fpsave_magic, %l5
526 cmp %l1, %l5
527 be 1f
528 sethi %hi(fpsave), %l5
529 or %l5, %lo(fpsave), %l5
530 cmp %l1, %l5
531 bne 2f
532 sethi %hi(fpsave_catch2), %l5
533 or %l5, %lo(fpsave_catch2), %l5
534 wr %l0, 0x0, %psr
535 WRITE_PAUSE
536 jmp %l5
537 rett %l5 + 4
5381:
539 sethi %hi(fpsave_catch), %l5
540 or %l5, %lo(fpsave_catch), %l5
541 wr %l0, 0x0, %psr
542 WRITE_PAUSE
543 jmp %l5
544 rett %l5 + 4
545
5462:
547 SAVE_ALL
548
549 wr %l0, PSR_ET, %psr ! re-enable traps
550 WRITE_PAUSE
551
552 add %sp, STACKFRAME_SZ, %o0
553 mov %l1, %o1
554 mov %l2, %o2
555 call do_fpe_trap
556 mov %l0, %o3
557
558 RESTORE_ALL
559
560 /* This routine handles Tag Overflow Exceptions. */
561 .align 4
562 .globl do_tag_overflow
563do_tag_overflow:
564 SAVE_ALL
565
566 wr %l0, PSR_ET, %psr ! re-enable traps
567 WRITE_PAUSE
568
569 add %sp, STACKFRAME_SZ, %o0
570 mov %l1, %o1
571 mov %l2, %o2
572 call handle_tag_overflow
573 mov %l0, %o3
574
575 RESTORE_ALL
576
577 /* This routine handles Watchpoint Exceptions. */
578 .align 4
579 .globl do_watchpoint
580do_watchpoint:
581 SAVE_ALL
582
583 wr %l0, PSR_ET, %psr ! re-enable traps
584 WRITE_PAUSE
585
586 add %sp, STACKFRAME_SZ, %o0
587 mov %l1, %o1
588 mov %l2, %o2
589 call handle_watchpoint
590 mov %l0, %o3
591
592 RESTORE_ALL
593
594 /* This routine handles Register Access Exceptions. */
595 .align 4
596 .globl do_reg_access
597do_reg_access:
598 SAVE_ALL
599
600 wr %l0, PSR_ET, %psr ! re-enable traps
601 WRITE_PAUSE
602
603 add %sp, STACKFRAME_SZ, %o0
604 mov %l1, %o1
605 mov %l2, %o2
606 call handle_reg_access
607 mov %l0, %o3
608
609 RESTORE_ALL
610
611 /* This routine handles Co-Processor Disabled Exceptions. */
612 .align 4
613 .globl do_cp_disabled
614do_cp_disabled:
615 SAVE_ALL
616
617 wr %l0, PSR_ET, %psr ! re-enable traps
618 WRITE_PAUSE
619
620 add %sp, STACKFRAME_SZ, %o0
621 mov %l1, %o1
622 mov %l2, %o2
623 call handle_cp_disabled
624 mov %l0, %o3
625
626 RESTORE_ALL
627
628 /* This routine handles Co-Processor Exceptions. */
629 .align 4
630 .globl do_cp_exception
631do_cp_exception:
632 SAVE_ALL
633
634 wr %l0, PSR_ET, %psr ! re-enable traps
635 WRITE_PAUSE
636
637 add %sp, STACKFRAME_SZ, %o0
638 mov %l1, %o1
639 mov %l2, %o2
640 call handle_cp_exception
641 mov %l0, %o3
642
643 RESTORE_ALL
644
645 /* This routine handles Hardware Divide By Zero Exceptions. */
646 .align 4
647 .globl do_hw_divzero
648do_hw_divzero:
649 SAVE_ALL
650
651 wr %l0, PSR_ET, %psr ! re-enable traps
652 WRITE_PAUSE
653
654 add %sp, STACKFRAME_SZ, %o0
655 mov %l1, %o1
656 mov %l2, %o2
657 call handle_hw_divzero
658 mov %l0, %o3
659
660 RESTORE_ALL
661
662 .align 4
663 .globl do_flush_windows
664do_flush_windows:
665 SAVE_ALL
666
667 wr %l0, PSR_ET, %psr
668 WRITE_PAUSE
669
670 andcc %l0, PSR_PS, %g0
671 bne dfw_kernel
672 nop
673
674 call flush_user_windows
675 nop
676
677 /* Advance over the trap instruction. */
678 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
679 add %l1, 0x4, %l2
680 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
681 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
682
683 RESTORE_ALL
684
685 .globl flush_patch_one
686
687 /* We get these for debugging routines using __builtin_return_address() */
688dfw_kernel:
689flush_patch_one:
690 FLUSH_ALL_KERNEL_WINDOWS
691
692 /* Advance over the trap instruction. */
693 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
694 add %l1, 0x4, %l2
695 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
696 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
697
698 RESTORE_ALL
699
700 /* The getcc software trap. The user wants the condition codes from
701 * the %psr in register %g1.
702 */
703
704 .align 4
705 .globl getcc_trap_handler
706getcc_trap_handler:
707 srl %l0, 20, %g1 ! give user
708 and %g1, 0xf, %g1 ! only ICC bits in %psr
709 jmp %l2 ! advance over trap instruction
710 rett %l2 + 0x4 ! like this...
711
712 /* The setcc software trap. The user has condition codes in %g1
713 * that it would like placed in the %psr. Be careful not to flip
714 * any unintentional bits!
715 */
716
717 .align 4
718 .globl setcc_trap_handler
719setcc_trap_handler:
720 sll %g1, 0x14, %l4
721 set PSR_ICC, %l5
722 andn %l0, %l5, %l0 ! clear ICC bits in %psr
723 and %l4, %l5, %l4 ! clear non-ICC bits in user value
724 or %l4, %l0, %l4 ! or them in... mix mix mix
725
726 wr %l4, 0x0, %psr ! set new %psr
727 WRITE_PAUSE ! TI scumbags...
728
729 jmp %l2 ! advance over trap instruction
730 rett %l2 + 0x4 ! like this...
731
732sun4m_nmi_error:
733 /* NMI async memory error handling. */
734 sethi %hi(0x80000000), %l4
735 sethi %hi(sun4m_irq_global), %o5
736 ld [%o5 + %lo(sun4m_irq_global)], %l5
737 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
738 WRITE_PAUSE
739 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
740 WRITE_PAUSE
741 or %l0, PSR_PIL, %l4
742 wr %l4, 0x0, %psr
743 WRITE_PAUSE
744 wr %l4, PSR_ET, %psr
745 WRITE_PAUSE
746 call sun4m_nmi
747 nop
748 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
749 WRITE_PAUSE
750 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
751 WRITE_PAUSE
752 RESTORE_ALL
753
754#ifndef CONFIG_SMP
755 .align 4
756 .globl linux_trap_ipi15_sun4m
757linux_trap_ipi15_sun4m:
758 SAVE_ALL
759
760 ba sun4m_nmi_error
761 nop
762#endif /* CONFIG_SMP */
763
764 .align 4
765 .globl srmmu_fault
766srmmu_fault:
767 mov 0x400, %l5
768 mov 0x300, %l4
769
770LEON_PI(lda [%l5] ASI_LEON_MMUREGS, %l6) ! read sfar first
771SUN_PI_(lda [%l5] ASI_M_MMUREGS, %l6) ! read sfar first
772
773LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) ! read sfsr last
774SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) ! read sfsr last
775
776 andn %l6, 0xfff, %l6
777 srl %l5, 6, %l5 ! and encode all info into l7
778
779 and %l5, 2, %l5
780 or %l5, %l6, %l6
781
782 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
783
784 SAVE_ALL
785
786 mov %l7, %o1
787 mov %l7, %o2
788 and %o1, 1, %o1 ! arg2 = text_faultp
789 mov %l7, %o3
790 and %o2, 2, %o2 ! arg3 = writep
791 andn %o3, 0xfff, %o3 ! arg4 = faulting address
792
793 wr %l0, PSR_ET, %psr
794 WRITE_PAUSE
795
796 call do_sparc_fault
797 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
798
799 RESTORE_ALL
800
801 .align 4
802 .globl sys_nis_syscall
803sys_nis_syscall:
804 mov %o7, %l5
805 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
806 call c_sys_nis_syscall
807 mov %l5, %o7
808
809sunos_execv:
810 .globl sunos_execv
811 b sys_execve
812 clr %i2
813
814 .align 4
815 .globl sys_sparc_pipe
816sys_sparc_pipe:
817 mov %o7, %l5
818 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
819 call sparc_pipe
820 mov %l5, %o7
821
822 .align 4
823 .globl sys_sigstack
824sys_sigstack:
825 mov %o7, %l5
826 mov %fp, %o2
827 call do_sys_sigstack
828 mov %l5, %o7
829
830 .align 4
831 .globl sys_sigreturn
832sys_sigreturn:
833 call do_sigreturn
834 add %sp, STACKFRAME_SZ, %o0
835
836 ld [%curptr + TI_FLAGS], %l5
837 andcc %l5, _TIF_SYSCALL_TRACE, %g0
838 be 1f
839 nop
840
841 call syscall_trace
842 mov 1, %o1
843
8441:
845 /* We don't want to muck with user registers like a
846 * normal syscall, just return.
847 */
848 RESTORE_ALL
849
850 .align 4
851 .globl sys_rt_sigreturn
852sys_rt_sigreturn:
853 call do_rt_sigreturn
854 add %sp, STACKFRAME_SZ, %o0
855
856 ld [%curptr + TI_FLAGS], %l5
857 andcc %l5, _TIF_SYSCALL_TRACE, %g0
858 be 1f
859 nop
860
861 add %sp, STACKFRAME_SZ, %o0
862 call syscall_trace
863 mov 1, %o1
864
8651:
866 /* We are returning to a signal handler. */
867 RESTORE_ALL
868
869 /* Now that we have a real sys_clone, sys_fork() is
870 * implemented in terms of it. Our _real_ implementation
871 * of SunOS vfork() will use sys_vfork().
872 *
873 * XXX These three should be consolidated into mostly shared
874 * XXX code just like on sparc64... -DaveM
875 */
876 .align 4
877 .globl sys_fork, flush_patch_two
878sys_fork:
879 mov %o7, %l5
880flush_patch_two:
881 FLUSH_ALL_KERNEL_WINDOWS;
882 ld [%curptr + TI_TASK], %o4
883 rd %psr, %g4
884 WRITE_PAUSE
885 mov SIGCHLD, %o0 ! arg0: clone flags
886 rd %wim, %g5
887 WRITE_PAUSE
888 mov %fp, %o1 ! arg1: usp
889 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
890 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
891 mov 0, %o3
892 call sparc_do_fork
893 mov %l5, %o7
894
895 /* Whee, kernel threads! */
896 .globl sys_clone, flush_patch_three
897sys_clone:
898 mov %o7, %l5
899flush_patch_three:
900 FLUSH_ALL_KERNEL_WINDOWS;
901 ld [%curptr + TI_TASK], %o4
902 rd %psr, %g4
903 WRITE_PAUSE
904
905 /* arg0,1: flags,usp -- loaded already */
906 cmp %o1, 0x0 ! Is new_usp NULL?
907 rd %wim, %g5
908 WRITE_PAUSE
909 be,a 1f
910 mov %fp, %o1 ! yes, use callers usp
911 andn %o1, 7, %o1 ! no, align to 8 bytes
9121:
913 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
914 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
915 mov 0, %o3
916 call sparc_do_fork
917 mov %l5, %o7
918
919 /* Whee, real vfork! */
920 .globl sys_vfork, flush_patch_four
921sys_vfork:
922flush_patch_four:
923 FLUSH_ALL_KERNEL_WINDOWS;
924 ld [%curptr + TI_TASK], %o4
925 rd %psr, %g4
926 WRITE_PAUSE
927 rd %wim, %g5
928 WRITE_PAUSE
929 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
930 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
931 mov %fp, %o1
932 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
933 sethi %hi(sparc_do_fork), %l1
934 mov 0, %o3
935 jmpl %l1 + %lo(sparc_do_fork), %g0
936 add %sp, STACKFRAME_SZ, %o2
937
938 .align 4
939linux_sparc_ni_syscall:
940 sethi %hi(sys_ni_syscall), %l7
941 b do_syscall
942 or %l7, %lo(sys_ni_syscall), %l7
943
944linux_syscall_trace:
945 add %sp, STACKFRAME_SZ, %o0
946 call syscall_trace
947 mov 0, %o1
948 cmp %o0, 0
949 bne 3f
950 mov -ENOSYS, %o0
951 mov %i0, %o0
952 mov %i1, %o1
953 mov %i2, %o2
954 mov %i3, %o3
955 b 2f
956 mov %i4, %o4
957
958 .globl ret_from_fork
959ret_from_fork:
960 call schedule_tail
961 ld [%g3 + TI_TASK], %o0
962 b ret_sys_call
963 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
964
965 .globl ret_from_kernel_thread
966ret_from_kernel_thread:
967 call schedule_tail
968 ld [%g3 + TI_TASK], %o0
969 ld [%sp + STACKFRAME_SZ + PT_G1], %l0
970 call %l0
971 ld [%sp + STACKFRAME_SZ + PT_G2], %o0
972 rd %psr, %l1
973 ld [%sp + STACKFRAME_SZ + PT_PSR], %l0
974 andn %l0, PSR_CWP, %l0
975 nop
976 and %l1, PSR_CWP, %l1
977 or %l0, %l1, %l0
978 st %l0, [%sp + STACKFRAME_SZ + PT_PSR]
979 b ret_sys_call
980 mov 0, %o0
981
982 /* Linux native system calls enter here... */
983 .align 4
984 .globl linux_sparc_syscall
985linux_sparc_syscall:
986 sethi %hi(PSR_SYSCALL), %l4
987 or %l0, %l4, %l0
988 /* Direct access to user regs, must faster. */
989 cmp %g1, NR_syscalls
990 bgeu linux_sparc_ni_syscall
991 sll %g1, 2, %l4
992 ld [%l7 + %l4], %l7
993
994do_syscall:
995 SAVE_ALL_HEAD
996 rd %wim, %l3
997
998 wr %l0, PSR_ET, %psr
999 mov %i0, %o0
1000 mov %i1, %o1
1001 mov %i2, %o2
1002
1003 ld [%curptr + TI_FLAGS], %l5
1004 mov %i3, %o3
1005 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1006 mov %i4, %o4
1007 bne linux_syscall_trace
1008 mov %i0, %l5
10092:
1010 call %l7
1011 mov %i5, %o5
1012
10133:
1014 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1015
1016ret_sys_call:
1017 ld [%curptr + TI_FLAGS], %l6
1018 cmp %o0, -ERESTART_RESTARTBLOCK
1019 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1020 set PSR_C, %g2
1021 bgeu 1f
1022 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1023
1024 /* System call success, clear Carry condition code. */
1025 andn %g3, %g2, %g3
1026 clr %l6
1027 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1028 bne linux_syscall_trace2
1029 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1030 add %l1, 0x4, %l2 /* npc = npc+4 */
1031 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1032 b ret_trap_entry
1033 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
10341:
1035 /* System call failure, set Carry condition code.
1036 * Also, get abs(errno) to return to the process.
1037 */
1038 sub %g0, %o0, %o0
1039 or %g3, %g2, %g3
1040 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1041 mov 1, %l6
1042 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1043 bne linux_syscall_trace2
1044 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1045 add %l1, 0x4, %l2 /* npc = npc+4 */
1046 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1047 b ret_trap_entry
1048 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1049
1050linux_syscall_trace2:
1051 add %sp, STACKFRAME_SZ, %o0
1052 mov 1, %o1
1053 call syscall_trace
1054 add %l1, 0x4, %l2 /* npc = npc+4 */
1055 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1056 b ret_trap_entry
1057 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1058
1059
1060/* Saving and restoring the FPU state is best done from lowlevel code.
1061 *
1062 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1063 * void *fpqueue, unsigned long *fpqdepth)
1064 */
1065
1066 .globl fpsave
1067fpsave:
1068 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1069 ld [%o1], %g1
1070 set 0x2000, %g4
1071 andcc %g1, %g4, %g0
1072 be 2f
1073 mov 0, %g2
1074
1075 /* We have an fpqueue to save. */
10761:
1077 std %fq, [%o2]
1078fpsave_magic:
1079 st %fsr, [%o1]
1080 ld [%o1], %g3
1081 andcc %g3, %g4, %g0
1082 add %g2, 1, %g2
1083 bne 1b
1084 add %o2, 8, %o2
1085
10862:
1087 st %g2, [%o3]
1088
1089 std %f0, [%o0 + 0x00]
1090 std %f2, [%o0 + 0x08]
1091 std %f4, [%o0 + 0x10]
1092 std %f6, [%o0 + 0x18]
1093 std %f8, [%o0 + 0x20]
1094 std %f10, [%o0 + 0x28]
1095 std %f12, [%o0 + 0x30]
1096 std %f14, [%o0 + 0x38]
1097 std %f16, [%o0 + 0x40]
1098 std %f18, [%o0 + 0x48]
1099 std %f20, [%o0 + 0x50]
1100 std %f22, [%o0 + 0x58]
1101 std %f24, [%o0 + 0x60]
1102 std %f26, [%o0 + 0x68]
1103 std %f28, [%o0 + 0x70]
1104 retl
1105 std %f30, [%o0 + 0x78]
1106
1107 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1108 * code for pointing out this possible deadlock, while we save state
1109 * above we could trap on the fsr store so our low level fpu trap
1110 * code has to know how to deal with this.
1111 */
1112fpsave_catch:
1113 b fpsave_magic + 4
1114 st %fsr, [%o1]
1115
1116fpsave_catch2:
1117 b fpsave + 4
1118 st %fsr, [%o1]
1119
1120 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1121
1122 .globl fpload
1123fpload:
1124 ldd [%o0 + 0x00], %f0
1125 ldd [%o0 + 0x08], %f2
1126 ldd [%o0 + 0x10], %f4
1127 ldd [%o0 + 0x18], %f6
1128 ldd [%o0 + 0x20], %f8
1129 ldd [%o0 + 0x28], %f10
1130 ldd [%o0 + 0x30], %f12
1131 ldd [%o0 + 0x38], %f14
1132 ldd [%o0 + 0x40], %f16
1133 ldd [%o0 + 0x48], %f18
1134 ldd [%o0 + 0x50], %f20
1135 ldd [%o0 + 0x58], %f22
1136 ldd [%o0 + 0x60], %f24
1137 ldd [%o0 + 0x68], %f26
1138 ldd [%o0 + 0x70], %f28
1139 ldd [%o0 + 0x78], %f30
1140 ld [%o1], %fsr
1141 retl
1142 nop
1143
1144 /* __ndelay and __udelay take two arguments:
1145 * 0 - nsecs or usecs to delay
1146 * 1 - per_cpu udelay_val (loops per jiffy)
1147 *
1148 * Note that ndelay gives HZ times higher resolution but has a 10ms
1149 * limit. udelay can handle up to 1s.
1150 */
1151 .globl __ndelay
1152__ndelay:
1153 save %sp, -STACKFRAME_SZ, %sp
1154 mov %i0, %o0 ! round multiplier up so large ns ok
1155 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1156 umul %o0, %o1, %o0
1157 rd %y, %o1
1158 mov %i1, %o1 ! udelay_val
1159 umul %o0, %o1, %o0
1160 rd %y, %o1
1161 ba delay_continue
1162 mov %o1, %o0 ! >>32 later for better resolution
1163
1164 .globl __udelay
1165__udelay:
1166 save %sp, -STACKFRAME_SZ, %sp
1167 mov %i0, %o0
1168 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1169 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1170 umul %o0, %o1, %o0
1171 rd %y, %o1
1172 mov %i1, %o1 ! udelay_val
1173 umul %o0, %o1, %o0
1174 rd %y, %o1
1175 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1176 or %g0, %lo(0x028f4b62), %l0
1177 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1178 bcs,a 3f
1179 add %o1, 0x01, %o1
11803:
1181 mov HZ, %o0 ! >>32 earlier for wider range
1182 umul %o0, %o1, %o0
1183 rd %y, %o1
1184
1185delay_continue:
1186 cmp %o0, 0x0
11871:
1188 bne 1b
1189 subcc %o0, 1, %o0
1190
1191 ret
1192 restore
1193
1194 /* Handle a software breakpoint */
1195 /* We have to inform parent that child has stopped */
1196 .align 4
1197 .globl breakpoint_trap
1198breakpoint_trap:
1199 rd %wim,%l3
1200 SAVE_ALL
1201 wr %l0, PSR_ET, %psr
1202 WRITE_PAUSE
1203
1204 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1205 call sparc_breakpoint
1206 add %sp, STACKFRAME_SZ, %o0
1207
1208 RESTORE_ALL
1209
1210#ifdef CONFIG_KGDB
1211 .align 4
1212 .globl kgdb_trap_low
1213 .type kgdb_trap_low,#function
1214kgdb_trap_low:
1215 rd %wim,%l3
1216 SAVE_ALL
1217 wr %l0, PSR_ET, %psr
1218 WRITE_PAUSE
1219
1220 call kgdb_trap
1221 add %sp, STACKFRAME_SZ, %o0
1222
1223 RESTORE_ALL
1224 .size kgdb_trap_low,.-kgdb_trap_low
1225#endif
1226
1227 .align 4
1228 .globl flush_patch_exception
1229flush_patch_exception:
1230 FLUSH_ALL_KERNEL_WINDOWS;
1231 ldd [%o0], %o6
1232 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1233 mov 1, %g1 ! signal EFAULT condition
1234
1235 .align 4
1236 .globl kill_user_windows, kuw_patch1_7win
1237 .globl kuw_patch1
1238kuw_patch1_7win: sll %o3, 6, %o3
1239
1240 /* No matter how much overhead this routine has in the worst
1241 * case scenerio, it is several times better than taking the
1242 * traps with the old method of just doing flush_user_windows().
1243 */
1244kill_user_windows:
1245 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1246 orcc %g0, %o0, %g0 ! if no bits set, we are done
1247 be 3f ! nothing to do
1248 rd %psr, %o5 ! must clear interrupts
1249 or %o5, PSR_PIL, %o4 ! or else that could change
1250 wr %o4, 0x0, %psr ! the uwinmask state
1251 WRITE_PAUSE ! burn them cycles
12521:
1253 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1254 orcc %g0, %o0, %g0 ! did an interrupt come in?
1255 be 4f ! yep, we are done
1256 rd %wim, %o3 ! get current wim
1257 srl %o3, 1, %o4 ! simulate a save
1258kuw_patch1:
1259 sll %o3, 7, %o3 ! compute next wim
1260 or %o4, %o3, %o3 ! result
1261 andncc %o0, %o3, %o0 ! clean this bit in umask
1262 bne kuw_patch1 ! not done yet
1263 srl %o3, 1, %o4 ! begin another save simulation
1264 wr %o3, 0x0, %wim ! set the new wim
1265 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
12664:
1267 wr %o5, 0x0, %psr ! re-enable interrupts
1268 WRITE_PAUSE ! burn baby burn
12693:
1270 retl ! return
1271 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1272
1273 .align 4
1274 .globl restore_current
1275restore_current:
1276 LOAD_CURRENT(g6, o0)
1277 retl
1278 nop
1279
1280#ifdef CONFIG_PCIC_PCI
1281#include <asm/pcic.h>
1282
1283 .align 4
1284 .globl linux_trap_ipi15_pcic
1285linux_trap_ipi15_pcic:
1286 rd %wim, %l3
1287 SAVE_ALL
1288
1289 /*
1290 * First deactivate NMI
1291 * or we cannot drop ET, cannot get window spill traps.
1292 * The busy loop is necessary because the PIO error
1293 * sometimes does not go away quickly and we trap again.
1294 */
1295 sethi %hi(pcic_regs), %o1
1296 ld [%o1 + %lo(pcic_regs)], %o2
1297
1298 ! Get pending status for printouts later.
1299 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1300
1301 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1302 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
13031:
1304 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1305 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1306 bne 1b
1307 nop
1308
1309 or %l0, PSR_PIL, %l4
1310 wr %l4, 0x0, %psr
1311 WRITE_PAUSE
1312 wr %l4, PSR_ET, %psr
1313 WRITE_PAUSE
1314
1315 call pcic_nmi
1316 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1317 RESTORE_ALL
1318
1319 .globl pcic_nmi_trap_patch
1320pcic_nmi_trap_patch:
1321 sethi %hi(linux_trap_ipi15_pcic), %l3
1322 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1323 rd %psr, %l0
1324 .word 0
1325
1326#endif /* CONFIG_PCIC_PCI */
1327
1328 .globl flushw_all
1329flushw_all:
1330 save %sp, -0x40, %sp
1331 save %sp, -0x40, %sp
1332 save %sp, -0x40, %sp
1333 save %sp, -0x40, %sp
1334 save %sp, -0x40, %sp
1335 save %sp, -0x40, %sp
1336 save %sp, -0x40, %sp
1337 restore
1338 restore
1339 restore
1340 restore
1341 restore
1342 restore
1343 ret
1344 restore
1345
1346#ifdef CONFIG_SMP
1347ENTRY(hard_smp_processor_id)
1348661: rd %tbr, %g1
1349 srl %g1, 12, %o0
1350 and %o0, 3, %o0
1351 .section .cpuid_patch, "ax"
1352 /* Instruction location. */
1353 .word 661b
1354 /* SUN4D implementation. */
1355 lda [%g0] ASI_M_VIKING_TMP1, %o0
1356 nop
1357 nop
1358 /* LEON implementation. */
1359 rd %asr17, %o0
1360 srl %o0, 0x1c, %o0
1361 nop
1362 .previous
1363 retl
1364 nop
1365ENDPROC(hard_smp_processor_id)
1366#endif
1367
1368/* End of entry.S */