1/*
  2 *  CLPS711X SPI bus driver
  3 *
  4 *  Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License as published by
  8 * the Free Software Foundation; either version 2 of the License, or
  9 * (at your option) any later version.
 10 */
 11
 12#include <linux/io.h>
 13#include <linux/clk.h>
 14#include <linux/gpio.h>
 15#include <linux/delay.h>
 16#include <linux/module.h>
 17#include <linux/interrupt.h>
 18#include <linux/platform_device.h>
 19#include <linux/regmap.h>
 20#include <linux/mfd/syscon.h>
 21#include <linux/mfd/syscon/clps711x.h>
 22#include <linux/spi/spi.h>
 23#include <linux/platform_data/spi-clps711x.h>
 24
 25#define DRIVER_NAME	"spi-clps711x"
 26
 27#define SYNCIO_FRMLEN(x)	((x) << 8)
 28#define SYNCIO_TXFRMEN		(1 << 14)
 29
 30struct spi_clps711x_data {
 31	void __iomem		*syncio;
 32	struct regmap		*syscon;
 33	struct regmap		*syscon1;
 34	struct clk		*spi_clk;
 35
 36	u8			*tx_buf;
 37	u8			*rx_buf;
 38	unsigned int		bpw;
 39	int			len;
 40};
 41
 42static int spi_clps711x_setup(struct spi_device *spi)
 43{
 44	/* We are expect that SPI-device is not selected */
 45	gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
 46
 47	return 0;
 48}
 49
 50static void spi_clps711x_setup_xfer(struct spi_device *spi,
 51				    struct spi_transfer *xfer)
 52{
 53	struct spi_master *master = spi->master;
 54	struct spi_clps711x_data *hw = spi_master_get_devdata(master);
 55
 56	/* Setup SPI frequency divider */
 57	if (xfer->speed_hz >= master->max_speed_hz)
 58		regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
 59				   SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3));
 60	else if (xfer->speed_hz >= (master->max_speed_hz / 2))
 61		regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
 62				   SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2));
 63	else if (xfer->speed_hz >= (master->max_speed_hz / 8))
 64		regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
 65				   SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1));
 66	else
 67		regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
 68				   SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0));
 69}
 70
 71static int spi_clps711x_prepare_message(struct spi_master *master,
 72					struct spi_message *msg)
 73{
 74	struct spi_clps711x_data *hw = spi_master_get_devdata(master);
 75	struct spi_device *spi = msg->spi;
 76
 77	/* Setup mode for transfer */
 78	return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN,
 79				  (spi->mode & SPI_CPHA) ?
 80				  SYSCON3_ADCCKNSEN : 0);
 81}
 82
 83static int spi_clps711x_transfer_one(struct spi_master *master,
 84				     struct spi_device *spi,
 85				     struct spi_transfer *xfer)
 86{
 87	struct spi_clps711x_data *hw = spi_master_get_devdata(master);
 88	u8 data;
 89
 90	spi_clps711x_setup_xfer(spi, xfer);
 91
 92	hw->len = xfer->len;
 93	hw->bpw = xfer->bits_per_word;
 94	hw->tx_buf = (u8 *)xfer->tx_buf;
 95	hw->rx_buf = (u8 *)xfer->rx_buf;
 96
 97	/* Initiate transfer */
 98	data = hw->tx_buf ? *hw->tx_buf++ : 0;
 99	writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio);
100
101	return 1;
102}
103
104static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
105{
106	struct spi_master *master = dev_id;
107	struct spi_clps711x_data *hw = spi_master_get_devdata(master);
108	u8 data;
109
110	/* Handle RX */
111	data = readb(hw->syncio);
112	if (hw->rx_buf)
113		*hw->rx_buf++ = data;
114
115	/* Handle TX */
116	if (--hw->len > 0) {
117		data = hw->tx_buf ? *hw->tx_buf++ : 0;
118		writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
119		       hw->syncio);
120	} else
121		spi_finalize_current_transfer(master);
122
123	return IRQ_HANDLED;
124}
125
126static int spi_clps711x_probe(struct platform_device *pdev)
127{
128	struct spi_clps711x_data *hw;
129	struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
130	struct spi_master *master;
131	struct resource *res;
132	int i, irq, ret;
133
134	if (!pdata) {
135		dev_err(&pdev->dev, "No platform data supplied\n");
136		return -EINVAL;
137	}
138
139	if (pdata->num_chipselect < 1) {
140		dev_err(&pdev->dev, "At least one CS must be defined\n");
141		return -EINVAL;
142	}
143
144	irq = platform_get_irq(pdev, 0);
145	if (irq < 0)
146		return irq;
147
148	master = spi_alloc_master(&pdev->dev, sizeof(*hw));
149	if (!master)
150		return -ENOMEM;
151
152	master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) *
153					pdata->num_chipselect, GFP_KERNEL);
154	if (!master->cs_gpios) {
155		ret = -ENOMEM;
156		goto err_out;
157	}
158
159	master->bus_num = pdev->id;
160	master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
161	master->bits_per_word_mask =  SPI_BPW_RANGE_MASK(1, 8);
162	master->num_chipselect = pdata->num_chipselect;
163	master->setup = spi_clps711x_setup;
164	master->prepare_message = spi_clps711x_prepare_message;
165	master->transfer_one = spi_clps711x_transfer_one;
166
167	hw = spi_master_get_devdata(master);
168
169	for (i = 0; i < master->num_chipselect; i++) {
170		master->cs_gpios[i] = pdata->chipselect[i];
171		ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
172					DRIVER_NAME);
173		if (ret) {
174			dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
175			goto err_out;
176		}
177	}
178
179	hw->spi_clk = devm_clk_get(&pdev->dev, "spi");
180	if (IS_ERR(hw->spi_clk)) {
181		dev_err(&pdev->dev, "Can't get clocks\n");
182		ret = PTR_ERR(hw->spi_clk);
183		goto err_out;
184	}
185	master->max_speed_hz = clk_get_rate(hw->spi_clk);
186
187	platform_set_drvdata(pdev, master);
188
189	hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3");
190	if (IS_ERR(hw->syscon)) {
191		ret = PTR_ERR(hw->syscon);
192		goto err_out;
193	}
194
195	hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1");
196	if (IS_ERR(hw->syscon1)) {
197		ret = PTR_ERR(hw->syscon1);
198		goto err_out;
199	}
200
201	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
202	hw->syncio = devm_ioremap_resource(&pdev->dev, res);
203	if (IS_ERR(hw->syncio)) {
204		ret = PTR_ERR(hw->syncio);
205		goto err_out;
206	}
207
208	/* Disable extended mode due hardware problems */
209	regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0);
210
211	/* Clear possible pending interrupt */
212	readl(hw->syncio);
213
214	ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0,
215			       dev_name(&pdev->dev), master);
216	if (ret)
217		goto err_out;
218
219	ret = devm_spi_register_master(&pdev->dev, master);
220	if (!ret) {
221		dev_info(&pdev->dev,
222			 "SPI bus driver initialized. Master clock %u Hz\n",
223			 master->max_speed_hz);
224		return 0;
225	}
226
227	dev_err(&pdev->dev, "Failed to register master\n");
228
229err_out:
230	spi_master_put(master);
231
232	return ret;
233}
234
235static struct platform_driver clps711x_spi_driver = {
236	.driver	= {
237		.name	= DRIVER_NAME,
238		.owner	= THIS_MODULE,
239	},
240	.probe	= spi_clps711x_probe,
241};
242module_platform_driver(clps711x_spi_driver);
243
244MODULE_LICENSE("GPL");
245MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
246MODULE_DESCRIPTION("CLPS711X SPI bus driver");
247MODULE_ALIAS("platform:" DRIVER_NAME);