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v3.1
  1/*
  2 * Adaptec AIC79xx device driver for Linux.
  3 *
  4 * Copyright (c) 2000-2001 Adaptec Inc.
  5 * All rights reserved.
  6 *
  7 * Redistribution and use in source and binary forms, with or without
  8 * modification, are permitted provided that the following conditions
  9 * are met:
 10 * 1. Redistributions of source code must retain the above copyright
 11 *    notice, this list of conditions, and the following disclaimer,
 12 *    without modification.
 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
 14 *    substantially similar to the "NO WARRANTY" disclaimer below
 15 *    ("Disclaimer") and any redistribution must be conditioned upon
 16 *    including a substantially similar Disclaimer requirement for further
 17 *    binary redistribution.
 18 * 3. Neither the names of the above-listed copyright holders nor the names
 19 *    of any contributors may be used to endorse or promote products derived
 20 *    from this software without specific prior written permission.
 21 *
 22 * Alternatively, this software may be distributed under the terms of the
 23 * GNU General Public License ("GPL") version 2 as published by the Free
 24 * Software Foundation.
 25 *
 26 * NO WARRANTY
 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
 30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 37 * POSSIBILITY OF SUCH DAMAGES.
 38 *
 39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm.h#166 $
 40 *
 41 */
 42#ifndef _AIC79XX_LINUX_H_
 43#define _AIC79XX_LINUX_H_
 44
 45#include <linux/types.h>
 46#include <linux/blkdev.h>
 47#include <linux/delay.h>
 48#include <linux/ioport.h>
 49#include <linux/pci.h>
 50#include <linux/interrupt.h>
 51#include <linux/module.h>
 52#include <linux/slab.h>
 53#include <asm/byteorder.h>
 54#include <asm/io.h>
 55
 56#include <scsi/scsi.h>
 57#include <scsi/scsi_cmnd.h>
 58#include <scsi/scsi_eh.h>
 59#include <scsi/scsi_device.h>
 60#include <scsi/scsi_host.h>
 61#include <scsi/scsi_tcq.h>
 62#include <scsi/scsi_transport.h>
 63#include <scsi/scsi_transport_spi.h>
 64
 65/* Core SCSI definitions */
 66#define AIC_LIB_PREFIX ahd
 67
 68/* Name space conflict with BSD queue macros */
 69#ifdef LIST_HEAD
 70#undef LIST_HEAD
 71#endif
 72
 73#include "cam.h"
 74#include "queue.h"
 75#include "scsi_message.h"
 76#include "scsi_iu.h"
 77#include "aiclib.h"
 78
 79/*********************************** Debugging ********************************/
 80#ifdef CONFIG_AIC79XX_DEBUG_ENABLE
 81#ifdef CONFIG_AIC79XX_DEBUG_MASK
 82#define AHD_DEBUG 1
 83#define AHD_DEBUG_OPTS CONFIG_AIC79XX_DEBUG_MASK
 84#else
 85/*
 86 * Compile in debugging code, but do not enable any printfs.
 87 */
 88#define AHD_DEBUG 1
 89#define AHD_DEBUG_OPTS 0
 90#endif
 91/* No debugging code. */
 92#endif
 93
 94/********************************** Misc Macros *******************************/
 95#define	powerof2(x)	((((x)-1)&(x))==0)
 96
 97/************************* Forward Declarations *******************************/
 98struct ahd_softc;
 99typedef struct pci_dev *ahd_dev_softc_t;
100typedef struct scsi_cmnd      *ahd_io_ctx_t;
101
102/******************************* Byte Order ***********************************/
103#define ahd_htobe16(x)	cpu_to_be16(x)
104#define ahd_htobe32(x)	cpu_to_be32(x)
105#define ahd_htobe64(x)	cpu_to_be64(x)
106#define ahd_htole16(x)	cpu_to_le16(x)
107#define ahd_htole32(x)	cpu_to_le32(x)
108#define ahd_htole64(x)	cpu_to_le64(x)
109
110#define ahd_be16toh(x)	be16_to_cpu(x)
111#define ahd_be32toh(x)	be32_to_cpu(x)
112#define ahd_be64toh(x)	be64_to_cpu(x)
113#define ahd_le16toh(x)	le16_to_cpu(x)
114#define ahd_le32toh(x)	le32_to_cpu(x)
115#define ahd_le64toh(x)	le64_to_cpu(x)
116
117/************************* Configuration Data *********************************/
118extern uint32_t aic79xx_allow_memio;
119extern struct scsi_host_template aic79xx_driver_template;
120
121/***************************** Bus Space/DMA **********************************/
122
123typedef uint32_t bus_size_t;
124
125typedef enum {
126	BUS_SPACE_MEMIO,
127	BUS_SPACE_PIO
128} bus_space_tag_t;
129
130typedef union {
131	u_long		  ioport;
132	volatile uint8_t __iomem *maddr;
133} bus_space_handle_t;
134
135typedef struct bus_dma_segment
136{
137	dma_addr_t	ds_addr;
138	bus_size_t	ds_len;
139} bus_dma_segment_t;
140
141struct ahd_linux_dma_tag
142{
143	bus_size_t	alignment;
144	bus_size_t	boundary;
145	bus_size_t	maxsize;
146};
147typedef struct ahd_linux_dma_tag* bus_dma_tag_t;
148
149typedef dma_addr_t bus_dmamap_t;
150
151typedef int bus_dma_filter_t(void*, dma_addr_t);
152typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
153
154#define BUS_DMA_WAITOK		0x0
155#define BUS_DMA_NOWAIT		0x1
156#define BUS_DMA_ALLOCNOW	0x2
157#define BUS_DMA_LOAD_SEGS	0x4	/*
158					 * Argument is an S/G list not
159					 * a single buffer.
160					 */
161
162#define BUS_SPACE_MAXADDR	0xFFFFFFFF
163#define BUS_SPACE_MAXADDR_32BIT	0xFFFFFFFF
164#define BUS_SPACE_MAXSIZE_32BIT	0xFFFFFFFF
165
166int	ahd_dma_tag_create(struct ahd_softc *, bus_dma_tag_t /*parent*/,
167			   bus_size_t /*alignment*/, bus_size_t /*boundary*/,
168			   dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
169			   bus_dma_filter_t*/*filter*/, void */*filterarg*/,
170			   bus_size_t /*maxsize*/, int /*nsegments*/,
171			   bus_size_t /*maxsegsz*/, int /*flags*/,
172			   bus_dma_tag_t */*dma_tagp*/);
173
174void	ahd_dma_tag_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/);
175
176int	ahd_dmamem_alloc(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
177			 void** /*vaddr*/, int /*flags*/,
178			 bus_dmamap_t* /*mapp*/);
179
180void	ahd_dmamem_free(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
181			void* /*vaddr*/, bus_dmamap_t /*map*/);
182
183void	ahd_dmamap_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/,
184			   bus_dmamap_t /*map*/);
185
186int	ahd_dmamap_load(struct ahd_softc *ahd, bus_dma_tag_t /*dmat*/,
187			bus_dmamap_t /*map*/, void * /*buf*/,
188			bus_size_t /*buflen*/, bus_dmamap_callback_t *,
189			void */*callback_arg*/, int /*flags*/);
190
191int	ahd_dmamap_unload(struct ahd_softc *, bus_dma_tag_t, bus_dmamap_t);
192
193/*
194 * Operations performed by ahd_dmamap_sync().
195 */
196#define BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
197#define BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
198#define BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
199#define BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
200
201/*
202 * XXX
203 * ahd_dmamap_sync is only used on buffers allocated with
204 * the pci_alloc_consistent() API.  Although I'm not sure how
205 * this works on architectures with a write buffer, Linux does
206 * not have an API to sync "coherent" memory.  Perhaps we need
207 * to do an mb()?
208 */
209#define ahd_dmamap_sync(ahd, dma_tag, dmamap, offset, len, op)
210
211/************************** Timer DataStructures ******************************/
212typedef struct timer_list ahd_timer_t;
213
214/********************************** Includes **********************************/
215#ifdef CONFIG_AIC79XX_REG_PRETTY_PRINT
216#define AIC_DEBUG_REGISTERS 1
217#else
218#define AIC_DEBUG_REGISTERS 0
219#endif
220#include "aic79xx.h"
221
222/***************************** Timer Facilities *******************************/
223#define ahd_timer_init init_timer
224#define ahd_timer_stop del_timer_sync
225
226/***************************** SMP support ************************************/
227#include <linux/spinlock.h>
228
229#define AIC79XX_DRIVER_VERSION "3.0"
230
231/*************************** Device Data Structures ***************************/
232/*
233 * A per probed device structure used to deal with some error recovery
234 * scenarios that the Linux mid-layer code just doesn't know how to
235 * handle.  The structure allocated for a device only becomes persistent
236 * after a successfully completed inquiry command to the target when
237 * that inquiry data indicates a lun is present.
238 */
239
240typedef enum {
241	AHD_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
242	AHD_DEV_Q_BASIC		 = 0x10, /* Allow basic device queuing */
243	AHD_DEV_Q_TAGGED	 = 0x20, /* Allow full SCSI2 command queueing */
244	AHD_DEV_PERIODIC_OTAG	 = 0x40, /* Send OTAG to prevent starvation */
245} ahd_linux_dev_flags;
246
247struct ahd_linux_device {
248	TAILQ_ENTRY(ahd_linux_device) links;
249
250	/*
251	 * The number of transactions currently
252	 * queued to the device.
253	 */
254	int			active;
255
256	/*
257	 * The currently allowed number of 
258	 * transactions that can be queued to
259	 * the device.  Must be signed for
260	 * conversion from tagged to untagged
261	 * mode where the device may have more
262	 * than one outstanding active transaction.
263	 */
264	int			openings;
265
266	/*
267	 * A positive count indicates that this
268	 * device's queue is halted.
269	 */
270	u_int			qfrozen;
271	
272	/*
273	 * Cumulative command counter.
274	 */
275	u_long			commands_issued;
276
277	/*
278	 * The number of tagged transactions when
279	 * running at our current opening level
280	 * that have been successfully received by
281	 * this device since the last QUEUE FULL.
282	 */
283	u_int			tag_success_count;
284#define AHD_TAG_SUCCESS_INTERVAL 50
285
286	ahd_linux_dev_flags	flags;
287
288	/*
289	 * Per device timer.
290	 */
291	struct timer_list	timer;
292
293	/*
294	 * The high limit for the tags variable.
295	 */
296	u_int			maxtags;
297
298	/*
299	 * The computed number of tags outstanding
300	 * at the time of the last QUEUE FULL event.
301	 */
302	u_int			tags_on_last_queuefull;
303
304	/*
305	 * How many times we have seen a queue full
306	 * with the same number of tags.  This is used
307	 * to stop our adaptive queue depth algorithm
308	 * on devices with a fixed number of tags.
309	 */
310	u_int			last_queuefull_same_count;
311#define AHD_LOCK_TAGS_COUNT 50
312
313	/*
314	 * How many transactions have been queued
315	 * without the device going idle.  We use
316	 * this statistic to determine when to issue
317	 * an ordered tag to prevent transaction
318	 * starvation.  This statistic is only updated
319	 * if the AHD_DEV_PERIODIC_OTAG flag is set
320	 * on this device.
321	 */
322	u_int			commands_since_idle_or_otag;
323#define AHD_OTAG_THRESH	500
324};
325
326/********************* Definitions Required by the Core ***********************/
327/*
328 * Number of SG segments we require.  So long as the S/G segments for
329 * a particular transaction are allocated in a physically contiguous
330 * manner and are allocated below 4GB, the number of S/G segments is
331 * unrestricted.
332 */
333#define	AHD_NSEG 128
334
335/*
336 * Per-SCB OSM storage.
337 */
338struct scb_platform_data {
339	struct ahd_linux_device	*dev;
340	dma_addr_t		 buf_busaddr;
341	uint32_t		 xfer_len;
342	uint32_t		 sense_resid;	/* Auto-Sense residual */
343};
344
345/*
346 * Define a structure used for each host adapter.  All members are
347 * aligned on a boundary >= the size of the member to honor the
348 * alignment restrictions of the various platforms supported by
349 * this driver.
350 */
351struct ahd_platform_data {
352	/*
353	 * Fields accessed from interrupt context.
354	 */
355	struct scsi_target *starget[AHD_NUM_TARGETS]; 
356
357	spinlock_t		 spin_lock;
358	struct completion	*eh_done;
359	struct Scsi_Host        *host;		/* pointer to scsi host */
360#define AHD_LINUX_NOIRQ	((uint32_t)~0)
361	uint32_t		 irq;		/* IRQ for this adapter */
362	uint32_t		 bios_address;
363	resource_size_t		 mem_busaddr;	/* Mem Base Addr */
364};
365
366void ahd_delay(long);
367
368/***************************** Low Level I/O **********************************/
369uint8_t ahd_inb(struct ahd_softc * ahd, long port);
370void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
371void ahd_outw_atomic(struct ahd_softc * ahd,
372				     long port, uint16_t val);
373void ahd_outsb(struct ahd_softc * ahd, long port,
374			       uint8_t *, int count);
375void ahd_insb(struct ahd_softc * ahd, long port,
376			       uint8_t *, int count);
377
378/**************************** Initialization **********************************/
379int		ahd_linux_register_host(struct ahd_softc *,
380					struct scsi_host_template *);
381
382/*************************** Pretty Printing **********************************/
383struct info_str {
384	char *buffer;
385	int length;
386	off_t offset;
387	int pos;
388};
389
390/******************************** Locking *************************************/
391static inline void
392ahd_lockinit(struct ahd_softc *ahd)
393{
394	spin_lock_init(&ahd->platform_data->spin_lock);
395}
396
397static inline void
398ahd_lock(struct ahd_softc *ahd, unsigned long *flags)
399{
400	spin_lock_irqsave(&ahd->platform_data->spin_lock, *flags);
401}
402
403static inline void
404ahd_unlock(struct ahd_softc *ahd, unsigned long *flags)
405{
406	spin_unlock_irqrestore(&ahd->platform_data->spin_lock, *flags);
407}
408
409/******************************* PCI Definitions ******************************/
410/*
411 * PCIM_xxx: mask to locate subfield in register
412 * PCIR_xxx: config register offset
413 * PCIC_xxx: device class
414 * PCIS_xxx: device subclass
415 * PCIP_xxx: device programming interface
416 * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
417 * PCID_xxx: device ID
418 */
419#define PCIR_DEVVENDOR		0x00
420#define PCIR_VENDOR		0x00
421#define PCIR_DEVICE		0x02
422#define PCIR_COMMAND		0x04
423#define PCIM_CMD_PORTEN		0x0001
424#define PCIM_CMD_MEMEN		0x0002
425#define PCIM_CMD_BUSMASTEREN	0x0004
426#define PCIM_CMD_MWRICEN	0x0010
427#define PCIM_CMD_PERRESPEN	0x0040
428#define	PCIM_CMD_SERRESPEN	0x0100
429#define PCIR_STATUS		0x06
430#define PCIR_REVID		0x08
431#define PCIR_PROGIF		0x09
432#define PCIR_SUBCLASS		0x0a
433#define PCIR_CLASS		0x0b
434#define PCIR_CACHELNSZ		0x0c
435#define PCIR_LATTIMER		0x0d
436#define PCIR_HEADERTYPE		0x0e
437#define PCIM_MFDEV		0x80
438#define PCIR_BIST		0x0f
439#define PCIR_CAP_PTR		0x34
440
441/* config registers for header type 0 devices */
442#define PCIR_MAPS	0x10
443#define PCIR_SUBVEND_0	0x2c
444#define PCIR_SUBDEV_0	0x2e
445
446/****************************** PCI-X definitions *****************************/
447#define PCIXR_COMMAND	0x96
448#define PCIXR_DEVADDR	0x98
449#define PCIXM_DEVADDR_FNUM	0x0003	/* Function Number */
450#define PCIXM_DEVADDR_DNUM	0x00F8	/* Device Number */
451#define PCIXM_DEVADDR_BNUM	0xFF00	/* Bus Number */
452#define PCIXR_STATUS	0x9A
453#define PCIXM_STATUS_64BIT	0x0001	/* Active 64bit connection to device. */
454#define PCIXM_STATUS_133CAP	0x0002	/* Device is 133MHz capable */
455#define PCIXM_STATUS_SCDISC	0x0004	/* Split Completion Discarded */
456#define PCIXM_STATUS_UNEXPSC	0x0008	/* Unexpected Split Completion */
457#define PCIXM_STATUS_CMPLEXDEV	0x0010	/* Device Complexity (set == bridge) */
458#define PCIXM_STATUS_MAXMRDBC	0x0060	/* Maximum Burst Read Count */
459#define PCIXM_STATUS_MAXSPLITS	0x0380	/* Maximum Split Transactions */
460#define PCIXM_STATUS_MAXCRDS	0x1C00	/* Maximum Cumulative Read Size */
461#define PCIXM_STATUS_RCVDSCEM	0x2000	/* Received a Split Comp w/Error msg */
462
463typedef enum
464{
465	AHD_POWER_STATE_D0,
466	AHD_POWER_STATE_D1,
467	AHD_POWER_STATE_D2,
468	AHD_POWER_STATE_D3
469} ahd_power_state;
470
471void ahd_power_state_change(struct ahd_softc *ahd,
472			    ahd_power_state new_state);
473
474/******************************* PCI Routines *********************************/
475int			 ahd_linux_pci_init(void);
476void			 ahd_linux_pci_exit(void);
477int			 ahd_pci_map_registers(struct ahd_softc *ahd);
478int			 ahd_pci_map_int(struct ahd_softc *ahd);
479
480uint32_t		 ahd_pci_read_config(ahd_dev_softc_t pci,
481					     int reg, int width);
482void			 ahd_pci_write_config(ahd_dev_softc_t pci,
483					  int reg, uint32_t value,
484					  int width);
485
486static inline int ahd_get_pci_function(ahd_dev_softc_t);
487static inline int
488ahd_get_pci_function(ahd_dev_softc_t pci)
489{
490	return (PCI_FUNC(pci->devfn));
491}
492
493static inline int ahd_get_pci_slot(ahd_dev_softc_t);
494static inline int
495ahd_get_pci_slot(ahd_dev_softc_t pci)
496{
497	return (PCI_SLOT(pci->devfn));
498}
499
500static inline int ahd_get_pci_bus(ahd_dev_softc_t);
501static inline int
502ahd_get_pci_bus(ahd_dev_softc_t pci)
503{
504	return (pci->bus->number);
505}
506
507static inline void ahd_flush_device_writes(struct ahd_softc *);
508static inline void
509ahd_flush_device_writes(struct ahd_softc *ahd)
510{
511	/* XXX Is this sufficient for all architectures??? */
512	ahd_inb(ahd, INTSTAT);
513}
514
515/**************************** Proc FS Support *********************************/
516int	ahd_linux_proc_info(struct Scsi_Host *, char *, char **,
517			    off_t, int, int);
518
519/*********************** Transaction Access Wrappers **************************/
520static inline void ahd_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
521static inline void ahd_set_transaction_status(struct scb *, uint32_t);
522static inline void ahd_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t);
523static inline void ahd_set_scsi_status(struct scb *, uint32_t);
524static inline uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd);
525static inline uint32_t ahd_get_transaction_status(struct scb *);
526static inline uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd);
527static inline uint32_t ahd_get_scsi_status(struct scb *);
528static inline void ahd_set_transaction_tag(struct scb *, int, u_int);
529static inline u_long ahd_get_transfer_length(struct scb *);
530static inline int ahd_get_transfer_dir(struct scb *);
531static inline void ahd_set_residual(struct scb *, u_long);
532static inline void ahd_set_sense_residual(struct scb *scb, u_long resid);
533static inline u_long ahd_get_residual(struct scb *);
534static inline u_long ahd_get_sense_residual(struct scb *);
535static inline int ahd_perform_autosense(struct scb *);
536static inline uint32_t ahd_get_sense_bufsize(struct ahd_softc *,
537					       struct scb *);
538static inline void ahd_notify_xfer_settings_change(struct ahd_softc *,
539						     struct ahd_devinfo *);
540static inline void ahd_platform_scb_free(struct ahd_softc *ahd,
541					   struct scb *scb);
542static inline void ahd_freeze_scb(struct scb *scb);
543
544static inline
545void ahd_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
546{
547	cmd->result &= ~(CAM_STATUS_MASK << 16);
548	cmd->result |= status << 16;
549}
550
551static inline
552void ahd_set_transaction_status(struct scb *scb, uint32_t status)
553{
554	ahd_cmd_set_transaction_status(scb->io_ctx,status);
555}
556
557static inline
558void ahd_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
559{
560	cmd->result &= ~0xFFFF;
561	cmd->result |= status;
562}
563
564static inline
565void ahd_set_scsi_status(struct scb *scb, uint32_t status)
566{
567	ahd_cmd_set_scsi_status(scb->io_ctx, status);
568}
569
570static inline
571uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd)
572{
573	return ((cmd->result >> 16) & CAM_STATUS_MASK);
574}
575
576static inline
577uint32_t ahd_get_transaction_status(struct scb *scb)
578{
579	return (ahd_cmd_get_transaction_status(scb->io_ctx));
580}
581
582static inline
583uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd)
584{
585	return (cmd->result & 0xFFFF);
586}
587
588static inline
589uint32_t ahd_get_scsi_status(struct scb *scb)
590{
591	return (ahd_cmd_get_scsi_status(scb->io_ctx));
592}
593
594static inline
595void ahd_set_transaction_tag(struct scb *scb, int enabled, u_int type)
596{
597	/*
598	 * Nothing to do for linux as the incoming transaction
599	 * has no concept of tag/non tagged, etc.
600	 */
601}
602
603static inline
604u_long ahd_get_transfer_length(struct scb *scb)
605{
606	return (scb->platform_data->xfer_len);
607}
608
609static inline
610int ahd_get_transfer_dir(struct scb *scb)
611{
612	return (scb->io_ctx->sc_data_direction);
613}
614
615static inline
616void ahd_set_residual(struct scb *scb, u_long resid)
617{
618	scsi_set_resid(scb->io_ctx, resid);
619}
620
621static inline
622void ahd_set_sense_residual(struct scb *scb, u_long resid)
623{
624	scb->platform_data->sense_resid = resid;
625}
626
627static inline
628u_long ahd_get_residual(struct scb *scb)
629{
630	return scsi_get_resid(scb->io_ctx);
631}
632
633static inline
634u_long ahd_get_sense_residual(struct scb *scb)
635{
636	return (scb->platform_data->sense_resid);
637}
638
639static inline
640int ahd_perform_autosense(struct scb *scb)
641{
642	/*
643	 * We always perform autosense in Linux.
644	 * On other platforms this is set on a
645	 * per-transaction basis.
646	 */
647	return (1);
648}
649
650static inline uint32_t
651ahd_get_sense_bufsize(struct ahd_softc *ahd, struct scb *scb)
652{
653	return (sizeof(struct scsi_sense_data));
654}
655
656static inline void
657ahd_notify_xfer_settings_change(struct ahd_softc *ahd,
658				struct ahd_devinfo *devinfo)
659{
660	/* Nothing to do here for linux */
661}
662
663static inline void
664ahd_platform_scb_free(struct ahd_softc *ahd, struct scb *scb)
665{
666	ahd->flags &= ~AHD_RESOURCE_SHORTAGE;
667}
668
669int	ahd_platform_alloc(struct ahd_softc *ahd, void *platform_arg);
670void	ahd_platform_free(struct ahd_softc *ahd);
671void	ahd_platform_init(struct ahd_softc *ahd);
672void	ahd_platform_freeze_devq(struct ahd_softc *ahd, struct scb *scb);
673
674static inline void
675ahd_freeze_scb(struct scb *scb)
676{
677	if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
678                scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
679                scb->platform_data->dev->qfrozen++;
680        }
681}
682
683void	ahd_platform_set_tags(struct ahd_softc *ahd, struct scsi_device *sdev,
684			      struct ahd_devinfo *devinfo, ahd_queue_alg);
685int	ahd_platform_abort_scbs(struct ahd_softc *ahd, int target,
686				char channel, int lun, u_int tag,
687				role_t role, uint32_t status);
688irqreturn_t
689	ahd_linux_isr(int irq, void *dev_id);
690void	ahd_done(struct ahd_softc*, struct scb*);
691void	ahd_send_async(struct ahd_softc *, char channel,
692		       u_int target, u_int lun, ac_code);
693void	ahd_print_path(struct ahd_softc *, struct scb *);
694
695#ifdef CONFIG_PCI
696#define AHD_PCI_CONFIG 1
697#else
698#define AHD_PCI_CONFIG 0
699#endif
700#define bootverbose aic79xx_verbose
701extern uint32_t aic79xx_verbose;
702
703#endif /* _AIC79XX_LINUX_H_ */
v3.15
  1/*
  2 * Adaptec AIC79xx device driver for Linux.
  3 *
  4 * Copyright (c) 2000-2001 Adaptec Inc.
  5 * All rights reserved.
  6 *
  7 * Redistribution and use in source and binary forms, with or without
  8 * modification, are permitted provided that the following conditions
  9 * are met:
 10 * 1. Redistributions of source code must retain the above copyright
 11 *    notice, this list of conditions, and the following disclaimer,
 12 *    without modification.
 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
 14 *    substantially similar to the "NO WARRANTY" disclaimer below
 15 *    ("Disclaimer") and any redistribution must be conditioned upon
 16 *    including a substantially similar Disclaimer requirement for further
 17 *    binary redistribution.
 18 * 3. Neither the names of the above-listed copyright holders nor the names
 19 *    of any contributors may be used to endorse or promote products derived
 20 *    from this software without specific prior written permission.
 21 *
 22 * Alternatively, this software may be distributed under the terms of the
 23 * GNU General Public License ("GPL") version 2 as published by the Free
 24 * Software Foundation.
 25 *
 26 * NO WARRANTY
 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
 30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 37 * POSSIBILITY OF SUCH DAMAGES.
 38 *
 39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm.h#166 $
 40 *
 41 */
 42#ifndef _AIC79XX_LINUX_H_
 43#define _AIC79XX_LINUX_H_
 44
 45#include <linux/types.h>
 46#include <linux/blkdev.h>
 47#include <linux/delay.h>
 48#include <linux/ioport.h>
 49#include <linux/pci.h>
 50#include <linux/interrupt.h>
 51#include <linux/module.h>
 52#include <linux/slab.h>
 53#include <asm/byteorder.h>
 54#include <asm/io.h>
 55
 56#include <scsi/scsi.h>
 57#include <scsi/scsi_cmnd.h>
 58#include <scsi/scsi_eh.h>
 59#include <scsi/scsi_device.h>
 60#include <scsi/scsi_host.h>
 61#include <scsi/scsi_tcq.h>
 62#include <scsi/scsi_transport.h>
 63#include <scsi/scsi_transport_spi.h>
 64
 65/* Core SCSI definitions */
 66#define AIC_LIB_PREFIX ahd
 67
 68/* Name space conflict with BSD queue macros */
 69#ifdef LIST_HEAD
 70#undef LIST_HEAD
 71#endif
 72
 73#include "cam.h"
 74#include "queue.h"
 75#include "scsi_message.h"
 76#include "scsi_iu.h"
 77#include "aiclib.h"
 78
 79/*********************************** Debugging ********************************/
 80#ifdef CONFIG_AIC79XX_DEBUG_ENABLE
 81#ifdef CONFIG_AIC79XX_DEBUG_MASK
 82#define AHD_DEBUG 1
 83#define AHD_DEBUG_OPTS CONFIG_AIC79XX_DEBUG_MASK
 84#else
 85/*
 86 * Compile in debugging code, but do not enable any printfs.
 87 */
 88#define AHD_DEBUG 1
 89#define AHD_DEBUG_OPTS 0
 90#endif
 91/* No debugging code. */
 92#endif
 93
 94/********************************** Misc Macros *******************************/
 95#define	powerof2(x)	((((x)-1)&(x))==0)
 96
 97/************************* Forward Declarations *******************************/
 98struct ahd_softc;
 99typedef struct pci_dev *ahd_dev_softc_t;
100typedef struct scsi_cmnd      *ahd_io_ctx_t;
101
102/******************************* Byte Order ***********************************/
103#define ahd_htobe16(x)	cpu_to_be16(x)
104#define ahd_htobe32(x)	cpu_to_be32(x)
105#define ahd_htobe64(x)	cpu_to_be64(x)
106#define ahd_htole16(x)	cpu_to_le16(x)
107#define ahd_htole32(x)	cpu_to_le32(x)
108#define ahd_htole64(x)	cpu_to_le64(x)
109
110#define ahd_be16toh(x)	be16_to_cpu(x)
111#define ahd_be32toh(x)	be32_to_cpu(x)
112#define ahd_be64toh(x)	be64_to_cpu(x)
113#define ahd_le16toh(x)	le16_to_cpu(x)
114#define ahd_le32toh(x)	le32_to_cpu(x)
115#define ahd_le64toh(x)	le64_to_cpu(x)
116
117/************************* Configuration Data *********************************/
118extern uint32_t aic79xx_allow_memio;
119extern struct scsi_host_template aic79xx_driver_template;
120
121/***************************** Bus Space/DMA **********************************/
122
123typedef uint32_t bus_size_t;
124
125typedef enum {
126	BUS_SPACE_MEMIO,
127	BUS_SPACE_PIO
128} bus_space_tag_t;
129
130typedef union {
131	u_long		  ioport;
132	volatile uint8_t __iomem *maddr;
133} bus_space_handle_t;
134
135typedef struct bus_dma_segment
136{
137	dma_addr_t	ds_addr;
138	bus_size_t	ds_len;
139} bus_dma_segment_t;
140
141struct ahd_linux_dma_tag
142{
143	bus_size_t	alignment;
144	bus_size_t	boundary;
145	bus_size_t	maxsize;
146};
147typedef struct ahd_linux_dma_tag* bus_dma_tag_t;
148
149typedef dma_addr_t bus_dmamap_t;
150
151typedef int bus_dma_filter_t(void*, dma_addr_t);
152typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
153
154#define BUS_DMA_WAITOK		0x0
155#define BUS_DMA_NOWAIT		0x1
156#define BUS_DMA_ALLOCNOW	0x2
157#define BUS_DMA_LOAD_SEGS	0x4	/*
158					 * Argument is an S/G list not
159					 * a single buffer.
160					 */
161
162#define BUS_SPACE_MAXADDR	0xFFFFFFFF
163#define BUS_SPACE_MAXADDR_32BIT	0xFFFFFFFF
164#define BUS_SPACE_MAXSIZE_32BIT	0xFFFFFFFF
165
166int	ahd_dma_tag_create(struct ahd_softc *, bus_dma_tag_t /*parent*/,
167			   bus_size_t /*alignment*/, bus_size_t /*boundary*/,
168			   dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
169			   bus_dma_filter_t*/*filter*/, void */*filterarg*/,
170			   bus_size_t /*maxsize*/, int /*nsegments*/,
171			   bus_size_t /*maxsegsz*/, int /*flags*/,
172			   bus_dma_tag_t */*dma_tagp*/);
173
174void	ahd_dma_tag_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/);
175
176int	ahd_dmamem_alloc(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
177			 void** /*vaddr*/, int /*flags*/,
178			 bus_dmamap_t* /*mapp*/);
179
180void	ahd_dmamem_free(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
181			void* /*vaddr*/, bus_dmamap_t /*map*/);
182
183void	ahd_dmamap_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/,
184			   bus_dmamap_t /*map*/);
185
186int	ahd_dmamap_load(struct ahd_softc *ahd, bus_dma_tag_t /*dmat*/,
187			bus_dmamap_t /*map*/, void * /*buf*/,
188			bus_size_t /*buflen*/, bus_dmamap_callback_t *,
189			void */*callback_arg*/, int /*flags*/);
190
191int	ahd_dmamap_unload(struct ahd_softc *, bus_dma_tag_t, bus_dmamap_t);
192
193/*
194 * Operations performed by ahd_dmamap_sync().
195 */
196#define BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
197#define BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
198#define BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
199#define BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
200
201/*
202 * XXX
203 * ahd_dmamap_sync is only used on buffers allocated with
204 * the pci_alloc_consistent() API.  Although I'm not sure how
205 * this works on architectures with a write buffer, Linux does
206 * not have an API to sync "coherent" memory.  Perhaps we need
207 * to do an mb()?
208 */
209#define ahd_dmamap_sync(ahd, dma_tag, dmamap, offset, len, op)
210
211/************************** Timer DataStructures ******************************/
212typedef struct timer_list ahd_timer_t;
213
214/********************************** Includes **********************************/
215#ifdef CONFIG_AIC79XX_REG_PRETTY_PRINT
216#define AIC_DEBUG_REGISTERS 1
217#else
218#define AIC_DEBUG_REGISTERS 0
219#endif
220#include "aic79xx.h"
221
222/***************************** Timer Facilities *******************************/
223#define ahd_timer_init init_timer
224#define ahd_timer_stop del_timer_sync
225
226/***************************** SMP support ************************************/
227#include <linux/spinlock.h>
228
229#define AIC79XX_DRIVER_VERSION "3.0"
230
231/*************************** Device Data Structures ***************************/
232/*
233 * A per probed device structure used to deal with some error recovery
234 * scenarios that the Linux mid-layer code just doesn't know how to
235 * handle.  The structure allocated for a device only becomes persistent
236 * after a successfully completed inquiry command to the target when
237 * that inquiry data indicates a lun is present.
238 */
239
240typedef enum {
241	AHD_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
242	AHD_DEV_Q_BASIC		 = 0x10, /* Allow basic device queuing */
243	AHD_DEV_Q_TAGGED	 = 0x20, /* Allow full SCSI2 command queueing */
244	AHD_DEV_PERIODIC_OTAG	 = 0x40, /* Send OTAG to prevent starvation */
245} ahd_linux_dev_flags;
246
247struct ahd_linux_device {
248	TAILQ_ENTRY(ahd_linux_device) links;
249
250	/*
251	 * The number of transactions currently
252	 * queued to the device.
253	 */
254	int			active;
255
256	/*
257	 * The currently allowed number of 
258	 * transactions that can be queued to
259	 * the device.  Must be signed for
260	 * conversion from tagged to untagged
261	 * mode where the device may have more
262	 * than one outstanding active transaction.
263	 */
264	int			openings;
265
266	/*
267	 * A positive count indicates that this
268	 * device's queue is halted.
269	 */
270	u_int			qfrozen;
271	
272	/*
273	 * Cumulative command counter.
274	 */
275	u_long			commands_issued;
276
277	/*
278	 * The number of tagged transactions when
279	 * running at our current opening level
280	 * that have been successfully received by
281	 * this device since the last QUEUE FULL.
282	 */
283	u_int			tag_success_count;
284#define AHD_TAG_SUCCESS_INTERVAL 50
285
286	ahd_linux_dev_flags	flags;
287
288	/*
289	 * Per device timer.
290	 */
291	struct timer_list	timer;
292
293	/*
294	 * The high limit for the tags variable.
295	 */
296	u_int			maxtags;
297
298	/*
299	 * The computed number of tags outstanding
300	 * at the time of the last QUEUE FULL event.
301	 */
302	u_int			tags_on_last_queuefull;
303
304	/*
305	 * How many times we have seen a queue full
306	 * with the same number of tags.  This is used
307	 * to stop our adaptive queue depth algorithm
308	 * on devices with a fixed number of tags.
309	 */
310	u_int			last_queuefull_same_count;
311#define AHD_LOCK_TAGS_COUNT 50
312
313	/*
314	 * How many transactions have been queued
315	 * without the device going idle.  We use
316	 * this statistic to determine when to issue
317	 * an ordered tag to prevent transaction
318	 * starvation.  This statistic is only updated
319	 * if the AHD_DEV_PERIODIC_OTAG flag is set
320	 * on this device.
321	 */
322	u_int			commands_since_idle_or_otag;
323#define AHD_OTAG_THRESH	500
324};
325
326/********************* Definitions Required by the Core ***********************/
327/*
328 * Number of SG segments we require.  So long as the S/G segments for
329 * a particular transaction are allocated in a physically contiguous
330 * manner and are allocated below 4GB, the number of S/G segments is
331 * unrestricted.
332 */
333#define	AHD_NSEG 128
334
335/*
336 * Per-SCB OSM storage.
337 */
338struct scb_platform_data {
339	struct ahd_linux_device	*dev;
340	dma_addr_t		 buf_busaddr;
341	uint32_t		 xfer_len;
342	uint32_t		 sense_resid;	/* Auto-Sense residual */
343};
344
345/*
346 * Define a structure used for each host adapter.  All members are
347 * aligned on a boundary >= the size of the member to honor the
348 * alignment restrictions of the various platforms supported by
349 * this driver.
350 */
351struct ahd_platform_data {
352	/*
353	 * Fields accessed from interrupt context.
354	 */
355	struct scsi_target *starget[AHD_NUM_TARGETS]; 
356
357	spinlock_t		 spin_lock;
358	struct completion	*eh_done;
359	struct Scsi_Host        *host;		/* pointer to scsi host */
360#define AHD_LINUX_NOIRQ	((uint32_t)~0)
361	uint32_t		 irq;		/* IRQ for this adapter */
362	uint32_t		 bios_address;
363	resource_size_t		 mem_busaddr;	/* Mem Base Addr */
364};
365
366void ahd_delay(long);
367
368/***************************** Low Level I/O **********************************/
369uint8_t ahd_inb(struct ahd_softc * ahd, long port);
370void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
371void ahd_outw_atomic(struct ahd_softc * ahd,
372				     long port, uint16_t val);
373void ahd_outsb(struct ahd_softc * ahd, long port,
374			       uint8_t *, int count);
375void ahd_insb(struct ahd_softc * ahd, long port,
376			       uint8_t *, int count);
377
378/**************************** Initialization **********************************/
379int		ahd_linux_register_host(struct ahd_softc *,
380					struct scsi_host_template *);
381
 
 
 
 
 
 
 
 
382/******************************** Locking *************************************/
383static inline void
384ahd_lockinit(struct ahd_softc *ahd)
385{
386	spin_lock_init(&ahd->platform_data->spin_lock);
387}
388
389static inline void
390ahd_lock(struct ahd_softc *ahd, unsigned long *flags)
391{
392	spin_lock_irqsave(&ahd->platform_data->spin_lock, *flags);
393}
394
395static inline void
396ahd_unlock(struct ahd_softc *ahd, unsigned long *flags)
397{
398	spin_unlock_irqrestore(&ahd->platform_data->spin_lock, *flags);
399}
400
401/******************************* PCI Definitions ******************************/
402/*
403 * PCIM_xxx: mask to locate subfield in register
404 * PCIR_xxx: config register offset
405 * PCIC_xxx: device class
406 * PCIS_xxx: device subclass
407 * PCIP_xxx: device programming interface
408 * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
409 * PCID_xxx: device ID
410 */
411#define PCIR_DEVVENDOR		0x00
412#define PCIR_VENDOR		0x00
413#define PCIR_DEVICE		0x02
414#define PCIR_COMMAND		0x04
415#define PCIM_CMD_PORTEN		0x0001
416#define PCIM_CMD_MEMEN		0x0002
417#define PCIM_CMD_BUSMASTEREN	0x0004
418#define PCIM_CMD_MWRICEN	0x0010
419#define PCIM_CMD_PERRESPEN	0x0040
420#define	PCIM_CMD_SERRESPEN	0x0100
421#define PCIR_STATUS		0x06
422#define PCIR_REVID		0x08
423#define PCIR_PROGIF		0x09
424#define PCIR_SUBCLASS		0x0a
425#define PCIR_CLASS		0x0b
426#define PCIR_CACHELNSZ		0x0c
427#define PCIR_LATTIMER		0x0d
428#define PCIR_HEADERTYPE		0x0e
429#define PCIM_MFDEV		0x80
430#define PCIR_BIST		0x0f
431#define PCIR_CAP_PTR		0x34
432
433/* config registers for header type 0 devices */
434#define PCIR_MAPS	0x10
435#define PCIR_SUBVEND_0	0x2c
436#define PCIR_SUBDEV_0	0x2e
437
438/****************************** PCI-X definitions *****************************/
439#define PCIXR_COMMAND	0x96
440#define PCIXR_DEVADDR	0x98
441#define PCIXM_DEVADDR_FNUM	0x0003	/* Function Number */
442#define PCIXM_DEVADDR_DNUM	0x00F8	/* Device Number */
443#define PCIXM_DEVADDR_BNUM	0xFF00	/* Bus Number */
444#define PCIXR_STATUS	0x9A
445#define PCIXM_STATUS_64BIT	0x0001	/* Active 64bit connection to device. */
446#define PCIXM_STATUS_133CAP	0x0002	/* Device is 133MHz capable */
447#define PCIXM_STATUS_SCDISC	0x0004	/* Split Completion Discarded */
448#define PCIXM_STATUS_UNEXPSC	0x0008	/* Unexpected Split Completion */
449#define PCIXM_STATUS_CMPLEXDEV	0x0010	/* Device Complexity (set == bridge) */
450#define PCIXM_STATUS_MAXMRDBC	0x0060	/* Maximum Burst Read Count */
451#define PCIXM_STATUS_MAXSPLITS	0x0380	/* Maximum Split Transactions */
452#define PCIXM_STATUS_MAXCRDS	0x1C00	/* Maximum Cumulative Read Size */
453#define PCIXM_STATUS_RCVDSCEM	0x2000	/* Received a Split Comp w/Error msg */
454
455typedef enum
456{
457	AHD_POWER_STATE_D0,
458	AHD_POWER_STATE_D1,
459	AHD_POWER_STATE_D2,
460	AHD_POWER_STATE_D3
461} ahd_power_state;
462
463void ahd_power_state_change(struct ahd_softc *ahd,
464			    ahd_power_state new_state);
465
466/******************************* PCI Routines *********************************/
467int			 ahd_linux_pci_init(void);
468void			 ahd_linux_pci_exit(void);
469int			 ahd_pci_map_registers(struct ahd_softc *ahd);
470int			 ahd_pci_map_int(struct ahd_softc *ahd);
471
472uint32_t		 ahd_pci_read_config(ahd_dev_softc_t pci,
473					     int reg, int width);
474void			 ahd_pci_write_config(ahd_dev_softc_t pci,
475					  int reg, uint32_t value,
476					  int width);
477
478static inline int ahd_get_pci_function(ahd_dev_softc_t);
479static inline int
480ahd_get_pci_function(ahd_dev_softc_t pci)
481{
482	return (PCI_FUNC(pci->devfn));
483}
484
485static inline int ahd_get_pci_slot(ahd_dev_softc_t);
486static inline int
487ahd_get_pci_slot(ahd_dev_softc_t pci)
488{
489	return (PCI_SLOT(pci->devfn));
490}
491
492static inline int ahd_get_pci_bus(ahd_dev_softc_t);
493static inline int
494ahd_get_pci_bus(ahd_dev_softc_t pci)
495{
496	return (pci->bus->number);
497}
498
499static inline void ahd_flush_device_writes(struct ahd_softc *);
500static inline void
501ahd_flush_device_writes(struct ahd_softc *ahd)
502{
503	/* XXX Is this sufficient for all architectures??? */
504	ahd_inb(ahd, INTSTAT);
505}
506
507/**************************** Proc FS Support *********************************/
508int	ahd_proc_write_seeprom(struct Scsi_Host *, char *, int);
509int	ahd_linux_show_info(struct seq_file *,struct Scsi_Host *);
510
511/*********************** Transaction Access Wrappers **************************/
512static inline void ahd_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
513static inline void ahd_set_transaction_status(struct scb *, uint32_t);
514static inline void ahd_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t);
515static inline void ahd_set_scsi_status(struct scb *, uint32_t);
516static inline uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd);
517static inline uint32_t ahd_get_transaction_status(struct scb *);
518static inline uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd);
519static inline uint32_t ahd_get_scsi_status(struct scb *);
520static inline void ahd_set_transaction_tag(struct scb *, int, u_int);
521static inline u_long ahd_get_transfer_length(struct scb *);
522static inline int ahd_get_transfer_dir(struct scb *);
523static inline void ahd_set_residual(struct scb *, u_long);
524static inline void ahd_set_sense_residual(struct scb *scb, u_long resid);
525static inline u_long ahd_get_residual(struct scb *);
526static inline u_long ahd_get_sense_residual(struct scb *);
527static inline int ahd_perform_autosense(struct scb *);
528static inline uint32_t ahd_get_sense_bufsize(struct ahd_softc *,
529					       struct scb *);
530static inline void ahd_notify_xfer_settings_change(struct ahd_softc *,
531						     struct ahd_devinfo *);
532static inline void ahd_platform_scb_free(struct ahd_softc *ahd,
533					   struct scb *scb);
534static inline void ahd_freeze_scb(struct scb *scb);
535
536static inline
537void ahd_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
538{
539	cmd->result &= ~(CAM_STATUS_MASK << 16);
540	cmd->result |= status << 16;
541}
542
543static inline
544void ahd_set_transaction_status(struct scb *scb, uint32_t status)
545{
546	ahd_cmd_set_transaction_status(scb->io_ctx,status);
547}
548
549static inline
550void ahd_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
551{
552	cmd->result &= ~0xFFFF;
553	cmd->result |= status;
554}
555
556static inline
557void ahd_set_scsi_status(struct scb *scb, uint32_t status)
558{
559	ahd_cmd_set_scsi_status(scb->io_ctx, status);
560}
561
562static inline
563uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd)
564{
565	return ((cmd->result >> 16) & CAM_STATUS_MASK);
566}
567
568static inline
569uint32_t ahd_get_transaction_status(struct scb *scb)
570{
571	return (ahd_cmd_get_transaction_status(scb->io_ctx));
572}
573
574static inline
575uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd)
576{
577	return (cmd->result & 0xFFFF);
578}
579
580static inline
581uint32_t ahd_get_scsi_status(struct scb *scb)
582{
583	return (ahd_cmd_get_scsi_status(scb->io_ctx));
584}
585
586static inline
587void ahd_set_transaction_tag(struct scb *scb, int enabled, u_int type)
588{
589	/*
590	 * Nothing to do for linux as the incoming transaction
591	 * has no concept of tag/non tagged, etc.
592	 */
593}
594
595static inline
596u_long ahd_get_transfer_length(struct scb *scb)
597{
598	return (scb->platform_data->xfer_len);
599}
600
601static inline
602int ahd_get_transfer_dir(struct scb *scb)
603{
604	return (scb->io_ctx->sc_data_direction);
605}
606
607static inline
608void ahd_set_residual(struct scb *scb, u_long resid)
609{
610	scsi_set_resid(scb->io_ctx, resid);
611}
612
613static inline
614void ahd_set_sense_residual(struct scb *scb, u_long resid)
615{
616	scb->platform_data->sense_resid = resid;
617}
618
619static inline
620u_long ahd_get_residual(struct scb *scb)
621{
622	return scsi_get_resid(scb->io_ctx);
623}
624
625static inline
626u_long ahd_get_sense_residual(struct scb *scb)
627{
628	return (scb->platform_data->sense_resid);
629}
630
631static inline
632int ahd_perform_autosense(struct scb *scb)
633{
634	/*
635	 * We always perform autosense in Linux.
636	 * On other platforms this is set on a
637	 * per-transaction basis.
638	 */
639	return (1);
640}
641
642static inline uint32_t
643ahd_get_sense_bufsize(struct ahd_softc *ahd, struct scb *scb)
644{
645	return (sizeof(struct scsi_sense_data));
646}
647
648static inline void
649ahd_notify_xfer_settings_change(struct ahd_softc *ahd,
650				struct ahd_devinfo *devinfo)
651{
652	/* Nothing to do here for linux */
653}
654
655static inline void
656ahd_platform_scb_free(struct ahd_softc *ahd, struct scb *scb)
657{
658	ahd->flags &= ~AHD_RESOURCE_SHORTAGE;
659}
660
661int	ahd_platform_alloc(struct ahd_softc *ahd, void *platform_arg);
662void	ahd_platform_free(struct ahd_softc *ahd);
663void	ahd_platform_init(struct ahd_softc *ahd);
664void	ahd_platform_freeze_devq(struct ahd_softc *ahd, struct scb *scb);
665
666static inline void
667ahd_freeze_scb(struct scb *scb)
668{
669	if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
670                scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
671                scb->platform_data->dev->qfrozen++;
672        }
673}
674
675void	ahd_platform_set_tags(struct ahd_softc *ahd, struct scsi_device *sdev,
676			      struct ahd_devinfo *devinfo, ahd_queue_alg);
677int	ahd_platform_abort_scbs(struct ahd_softc *ahd, int target,
678				char channel, int lun, u_int tag,
679				role_t role, uint32_t status);
680irqreturn_t
681	ahd_linux_isr(int irq, void *dev_id);
682void	ahd_done(struct ahd_softc*, struct scb*);
683void	ahd_send_async(struct ahd_softc *, char channel,
684		       u_int target, u_int lun, ac_code);
685void	ahd_print_path(struct ahd_softc *, struct scb *);
686
687#ifdef CONFIG_PCI
688#define AHD_PCI_CONFIG 1
689#else
690#define AHD_PCI_CONFIG 0
691#endif
692#define bootverbose aic79xx_verbose
693extern uint32_t aic79xx_verbose;
694
695#endif /* _AIC79XX_LINUX_H_ */