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1/*
2 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Driver for the ARC EMAC 10100 (hardware revision 5)
9 *
10 * Contributors:
11 * Amit Bhor
12 * Sameer Dhavale
13 * Vineet Gupta
14 */
15
16#include <linux/etherdevice.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/module.h>
20#include <linux/of_address.h>
21#include <linux/of_irq.h>
22#include <linux/of_mdio.h>
23#include <linux/of_net.h>
24#include <linux/of_platform.h>
25
26#include "emac.h"
27
28#define DRV_NAME "arc_emac"
29#define DRV_VERSION "1.0"
30
31/**
32 * arc_emac_adjust_link - Adjust the PHY link duplex.
33 * @ndev: Pointer to the net_device structure.
34 *
35 * This function is called to change the duplex setting after auto negotiation
36 * is done by the PHY.
37 */
38static void arc_emac_adjust_link(struct net_device *ndev)
39{
40 struct arc_emac_priv *priv = netdev_priv(ndev);
41 struct phy_device *phy_dev = priv->phy_dev;
42 unsigned int reg, state_changed = 0;
43
44 if (priv->link != phy_dev->link) {
45 priv->link = phy_dev->link;
46 state_changed = 1;
47 }
48
49 if (priv->speed != phy_dev->speed) {
50 priv->speed = phy_dev->speed;
51 state_changed = 1;
52 }
53
54 if (priv->duplex != phy_dev->duplex) {
55 reg = arc_reg_get(priv, R_CTRL);
56
57 if (DUPLEX_FULL == phy_dev->duplex)
58 reg |= ENFL_MASK;
59 else
60 reg &= ~ENFL_MASK;
61
62 arc_reg_set(priv, R_CTRL, reg);
63 priv->duplex = phy_dev->duplex;
64 state_changed = 1;
65 }
66
67 if (state_changed)
68 phy_print_status(phy_dev);
69}
70
71/**
72 * arc_emac_get_settings - Get PHY settings.
73 * @ndev: Pointer to net_device structure.
74 * @cmd: Pointer to ethtool_cmd structure.
75 *
76 * This implements ethtool command for getting PHY settings. If PHY could
77 * not be found, the function returns -ENODEV. This function calls the
78 * relevant PHY ethtool API to get the PHY settings.
79 * Issue "ethtool ethX" under linux prompt to execute this function.
80 */
81static int arc_emac_get_settings(struct net_device *ndev,
82 struct ethtool_cmd *cmd)
83{
84 struct arc_emac_priv *priv = netdev_priv(ndev);
85
86 return phy_ethtool_gset(priv->phy_dev, cmd);
87}
88
89/**
90 * arc_emac_set_settings - Set PHY settings as passed in the argument.
91 * @ndev: Pointer to net_device structure.
92 * @cmd: Pointer to ethtool_cmd structure.
93 *
94 * This implements ethtool command for setting various PHY settings. If PHY
95 * could not be found, the function returns -ENODEV. This function calls the
96 * relevant PHY ethtool API to set the PHY.
97 * Issue e.g. "ethtool -s ethX speed 1000" under linux prompt to execute this
98 * function.
99 */
100static int arc_emac_set_settings(struct net_device *ndev,
101 struct ethtool_cmd *cmd)
102{
103 struct arc_emac_priv *priv = netdev_priv(ndev);
104
105 if (!capable(CAP_NET_ADMIN))
106 return -EPERM;
107
108 return phy_ethtool_sset(priv->phy_dev, cmd);
109}
110
111/**
112 * arc_emac_get_drvinfo - Get EMAC driver information.
113 * @ndev: Pointer to net_device structure.
114 * @info: Pointer to ethtool_drvinfo structure.
115 *
116 * This implements ethtool command for getting the driver information.
117 * Issue "ethtool -i ethX" under linux prompt to execute this function.
118 */
119static void arc_emac_get_drvinfo(struct net_device *ndev,
120 struct ethtool_drvinfo *info)
121{
122 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
123 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
124}
125
126static const struct ethtool_ops arc_emac_ethtool_ops = {
127 .get_settings = arc_emac_get_settings,
128 .set_settings = arc_emac_set_settings,
129 .get_drvinfo = arc_emac_get_drvinfo,
130 .get_link = ethtool_op_get_link,
131};
132
133#define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
134
135/**
136 * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
137 * @ndev: Pointer to the network device.
138 */
139static void arc_emac_tx_clean(struct net_device *ndev)
140{
141 struct arc_emac_priv *priv = netdev_priv(ndev);
142 struct net_device_stats *stats = &priv->stats;
143 unsigned int i;
144
145 for (i = 0; i < TX_BD_NUM; i++) {
146 unsigned int *txbd_dirty = &priv->txbd_dirty;
147 struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
148 struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
149 struct sk_buff *skb = tx_buff->skb;
150 unsigned int info = le32_to_cpu(txbd->info);
151
152 if ((info & FOR_EMAC) || !txbd->data)
153 break;
154
155 if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
156 stats->tx_errors++;
157 stats->tx_dropped++;
158
159 if (info & DEFR)
160 stats->tx_carrier_errors++;
161
162 if (info & LTCL)
163 stats->collisions++;
164
165 if (info & UFLO)
166 stats->tx_fifo_errors++;
167 } else if (likely(info & FIRST_OR_LAST_MASK)) {
168 stats->tx_packets++;
169 stats->tx_bytes += skb->len;
170 }
171
172 dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
173 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
174
175 /* return the sk_buff to system */
176 dev_kfree_skb_irq(skb);
177
178 txbd->data = 0;
179 txbd->info = 0;
180
181 *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
182
183 if (netif_queue_stopped(ndev))
184 netif_wake_queue(ndev);
185 }
186}
187
188/**
189 * arc_emac_rx - processing of Rx packets.
190 * @ndev: Pointer to the network device.
191 * @budget: How many BDs to process on 1 call.
192 *
193 * returns: Number of processed BDs
194 *
195 * Iterate through Rx BDs and deliver received packages to upper layer.
196 */
197static int arc_emac_rx(struct net_device *ndev, int budget)
198{
199 struct arc_emac_priv *priv = netdev_priv(ndev);
200 unsigned int work_done;
201
202 for (work_done = 0; work_done < budget; work_done++) {
203 unsigned int *last_rx_bd = &priv->last_rx_bd;
204 struct net_device_stats *stats = &priv->stats;
205 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
206 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
207 unsigned int pktlen, info = le32_to_cpu(rxbd->info);
208 struct sk_buff *skb;
209 dma_addr_t addr;
210
211 if (unlikely((info & OWN_MASK) == FOR_EMAC))
212 break;
213
214 /* Make a note that we saw a packet at this BD.
215 * So next time, driver starts from this + 1
216 */
217 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
218
219 if (unlikely((info & FIRST_OR_LAST_MASK) !=
220 FIRST_OR_LAST_MASK)) {
221 /* We pre-allocate buffers of MTU size so incoming
222 * packets won't be split/chained.
223 */
224 if (net_ratelimit())
225 netdev_err(ndev, "incomplete packet received\n");
226
227 /* Return ownership to EMAC */
228 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
229 stats->rx_errors++;
230 stats->rx_length_errors++;
231 continue;
232 }
233
234 pktlen = info & LEN_MASK;
235 stats->rx_packets++;
236 stats->rx_bytes += pktlen;
237 skb = rx_buff->skb;
238 skb_put(skb, pktlen);
239 skb->dev = ndev;
240 skb->protocol = eth_type_trans(skb, ndev);
241
242 dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
243 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
244
245 /* Prepare the BD for next cycle */
246 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
247 EMAC_BUFFER_SIZE);
248 if (unlikely(!rx_buff->skb)) {
249 stats->rx_errors++;
250 /* Because receive_skb is below, increment rx_dropped */
251 stats->rx_dropped++;
252 continue;
253 }
254
255 /* receive_skb only if new skb was allocated to avoid holes */
256 netif_receive_skb(skb);
257
258 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
259 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
260 if (dma_mapping_error(&ndev->dev, addr)) {
261 if (net_ratelimit())
262 netdev_err(ndev, "cannot dma map\n");
263 dev_kfree_skb(rx_buff->skb);
264 stats->rx_errors++;
265 continue;
266 }
267 dma_unmap_addr_set(rx_buff, addr, addr);
268 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
269
270 rxbd->data = cpu_to_le32(addr);
271
272 /* Make sure pointer to data buffer is set */
273 wmb();
274
275 /* Return ownership to EMAC */
276 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
277 }
278
279 return work_done;
280}
281
282/**
283 * arc_emac_poll - NAPI poll handler.
284 * @napi: Pointer to napi_struct structure.
285 * @budget: How many BDs to process on 1 call.
286 *
287 * returns: Number of processed BDs
288 */
289static int arc_emac_poll(struct napi_struct *napi, int budget)
290{
291 struct net_device *ndev = napi->dev;
292 struct arc_emac_priv *priv = netdev_priv(ndev);
293 unsigned int work_done;
294
295 arc_emac_tx_clean(ndev);
296
297 work_done = arc_emac_rx(ndev, budget);
298 if (work_done < budget) {
299 napi_complete(napi);
300 arc_reg_or(priv, R_ENABLE, RXINT_MASK);
301 }
302
303 return work_done;
304}
305
306/**
307 * arc_emac_intr - Global interrupt handler for EMAC.
308 * @irq: irq number.
309 * @dev_instance: device instance.
310 *
311 * returns: IRQ_HANDLED for all cases.
312 *
313 * ARC EMAC has only 1 interrupt line, and depending on bits raised in
314 * STATUS register we may tell what is a reason for interrupt to fire.
315 */
316static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
317{
318 struct net_device *ndev = dev_instance;
319 struct arc_emac_priv *priv = netdev_priv(ndev);
320 struct net_device_stats *stats = &priv->stats;
321 unsigned int status;
322
323 status = arc_reg_get(priv, R_STATUS);
324 status &= ~MDIO_MASK;
325
326 /* Reset all flags except "MDIO complete" */
327 arc_reg_set(priv, R_STATUS, status);
328
329 if (status & RXINT_MASK) {
330 if (likely(napi_schedule_prep(&priv->napi))) {
331 arc_reg_clr(priv, R_ENABLE, RXINT_MASK);
332 __napi_schedule(&priv->napi);
333 }
334 }
335
336 if (status & ERR_MASK) {
337 /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
338 * 8-bit error counter overrun.
339 */
340
341 if (status & MSER_MASK) {
342 stats->rx_missed_errors += 0x100;
343 stats->rx_errors += 0x100;
344 }
345
346 if (status & RXCR_MASK) {
347 stats->rx_crc_errors += 0x100;
348 stats->rx_errors += 0x100;
349 }
350
351 if (status & RXFR_MASK) {
352 stats->rx_frame_errors += 0x100;
353 stats->rx_errors += 0x100;
354 }
355
356 if (status & RXFL_MASK) {
357 stats->rx_over_errors += 0x100;
358 stats->rx_errors += 0x100;
359 }
360 }
361
362 return IRQ_HANDLED;
363}
364
365/**
366 * arc_emac_open - Open the network device.
367 * @ndev: Pointer to the network device.
368 *
369 * returns: 0, on success or non-zero error value on failure.
370 *
371 * This function sets the MAC address, requests and enables an IRQ
372 * for the EMAC device and starts the Tx queue.
373 * It also connects to the phy device.
374 */
375static int arc_emac_open(struct net_device *ndev)
376{
377 struct arc_emac_priv *priv = netdev_priv(ndev);
378 struct phy_device *phy_dev = priv->phy_dev;
379 int i;
380
381 phy_dev->autoneg = AUTONEG_ENABLE;
382 phy_dev->speed = 0;
383 phy_dev->duplex = 0;
384 phy_dev->advertising &= phy_dev->supported;
385
386 priv->last_rx_bd = 0;
387
388 /* Allocate and set buffers for Rx BD's */
389 for (i = 0; i < RX_BD_NUM; i++) {
390 dma_addr_t addr;
391 unsigned int *last_rx_bd = &priv->last_rx_bd;
392 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
393 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
394
395 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
396 EMAC_BUFFER_SIZE);
397 if (unlikely(!rx_buff->skb))
398 return -ENOMEM;
399
400 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
401 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
402 if (dma_mapping_error(&ndev->dev, addr)) {
403 netdev_err(ndev, "cannot dma map\n");
404 dev_kfree_skb(rx_buff->skb);
405 return -ENOMEM;
406 }
407 dma_unmap_addr_set(rx_buff, addr, addr);
408 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
409
410 rxbd->data = cpu_to_le32(addr);
411
412 /* Make sure pointer to data buffer is set */
413 wmb();
414
415 /* Return ownership to EMAC */
416 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
417
418 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
419 }
420
421 /* Clean Tx BD's */
422 memset(priv->txbd, 0, TX_RING_SZ);
423
424 /* Initialize logical address filter */
425 arc_reg_set(priv, R_LAFL, 0);
426 arc_reg_set(priv, R_LAFH, 0);
427
428 /* Set BD ring pointers for device side */
429 arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
430 arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
431
432 /* Enable interrupts */
433 arc_reg_set(priv, R_ENABLE, RXINT_MASK | ERR_MASK);
434
435 /* Set CONTROL */
436 arc_reg_set(priv, R_CTRL,
437 (RX_BD_NUM << 24) | /* RX BD table length */
438 (TX_BD_NUM << 16) | /* TX BD table length */
439 TXRN_MASK | RXRN_MASK);
440
441 napi_enable(&priv->napi);
442
443 /* Enable EMAC */
444 arc_reg_or(priv, R_CTRL, EN_MASK);
445
446 phy_start_aneg(priv->phy_dev);
447
448 netif_start_queue(ndev);
449
450 return 0;
451}
452
453/**
454 * arc_emac_stop - Close the network device.
455 * @ndev: Pointer to the network device.
456 *
457 * This function stops the Tx queue, disables interrupts and frees the IRQ for
458 * the EMAC device.
459 * It also disconnects the PHY device associated with the EMAC device.
460 */
461static int arc_emac_stop(struct net_device *ndev)
462{
463 struct arc_emac_priv *priv = netdev_priv(ndev);
464
465 napi_disable(&priv->napi);
466 netif_stop_queue(ndev);
467
468 /* Disable interrupts */
469 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | ERR_MASK);
470
471 /* Disable EMAC */
472 arc_reg_clr(priv, R_CTRL, EN_MASK);
473
474 return 0;
475}
476
477/**
478 * arc_emac_stats - Get system network statistics.
479 * @ndev: Pointer to net_device structure.
480 *
481 * Returns the address of the device statistics structure.
482 * Statistics are updated in interrupt handler.
483 */
484static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
485{
486 struct arc_emac_priv *priv = netdev_priv(ndev);
487 struct net_device_stats *stats = &priv->stats;
488 unsigned long miss, rxerr;
489 u8 rxcrc, rxfram, rxoflow;
490
491 rxerr = arc_reg_get(priv, R_RXERR);
492 miss = arc_reg_get(priv, R_MISS);
493
494 rxcrc = rxerr;
495 rxfram = rxerr >> 8;
496 rxoflow = rxerr >> 16;
497
498 stats->rx_errors += miss;
499 stats->rx_errors += rxcrc + rxfram + rxoflow;
500
501 stats->rx_over_errors += rxoflow;
502 stats->rx_frame_errors += rxfram;
503 stats->rx_crc_errors += rxcrc;
504 stats->rx_missed_errors += miss;
505
506 return stats;
507}
508
509/**
510 * arc_emac_tx - Starts the data transmission.
511 * @skb: sk_buff pointer that contains data to be Transmitted.
512 * @ndev: Pointer to net_device structure.
513 *
514 * returns: NETDEV_TX_OK, on success
515 * NETDEV_TX_BUSY, if any of the descriptors are not free.
516 *
517 * This function is invoked from upper layers to initiate transmission.
518 */
519static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
520{
521 struct arc_emac_priv *priv = netdev_priv(ndev);
522 unsigned int len, *txbd_curr = &priv->txbd_curr;
523 struct net_device_stats *stats = &priv->stats;
524 __le32 *info = &priv->txbd[*txbd_curr].info;
525 dma_addr_t addr;
526
527 if (skb_padto(skb, ETH_ZLEN))
528 return NETDEV_TX_OK;
529
530 len = max_t(unsigned int, ETH_ZLEN, skb->len);
531
532 /* EMAC still holds this buffer in its possession.
533 * CPU must not modify this buffer descriptor
534 */
535 if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC)) {
536 netif_stop_queue(ndev);
537 return NETDEV_TX_BUSY;
538 }
539
540 addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
541 DMA_TO_DEVICE);
542
543 if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
544 stats->tx_dropped++;
545 stats->tx_errors++;
546 dev_kfree_skb(skb);
547 return NETDEV_TX_OK;
548 }
549 dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
550 dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
551
552 priv->tx_buff[*txbd_curr].skb = skb;
553 priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
554
555 /* Make sure pointer to data buffer is set */
556 wmb();
557
558 skb_tx_timestamp(skb);
559
560 *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
561
562 /* Increment index to point to the next BD */
563 *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
564
565 /* Get "info" of the next BD */
566 info = &priv->txbd[*txbd_curr].info;
567
568 /* Check if if Tx BD ring is full - next BD is still owned by EMAC */
569 if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC))
570 netif_stop_queue(ndev);
571
572 arc_reg_set(priv, R_STATUS, TXPL_MASK);
573
574 return NETDEV_TX_OK;
575}
576
577static void arc_emac_set_address_internal(struct net_device *ndev)
578{
579 struct arc_emac_priv *priv = netdev_priv(ndev);
580 unsigned int addr_low, addr_hi;
581
582 addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]);
583 addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]);
584
585 arc_reg_set(priv, R_ADDRL, addr_low);
586 arc_reg_set(priv, R_ADDRH, addr_hi);
587}
588
589/**
590 * arc_emac_set_address - Set the MAC address for this device.
591 * @ndev: Pointer to net_device structure.
592 * @p: 6 byte Address to be written as MAC address.
593 *
594 * This function copies the HW address from the sockaddr structure to the
595 * net_device structure and updates the address in HW.
596 *
597 * returns: -EBUSY if the net device is busy or 0 if the address is set
598 * successfully.
599 */
600static int arc_emac_set_address(struct net_device *ndev, void *p)
601{
602 struct sockaddr *addr = p;
603
604 if (netif_running(ndev))
605 return -EBUSY;
606
607 if (!is_valid_ether_addr(addr->sa_data))
608 return -EADDRNOTAVAIL;
609
610 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
611
612 arc_emac_set_address_internal(ndev);
613
614 return 0;
615}
616
617static const struct net_device_ops arc_emac_netdev_ops = {
618 .ndo_open = arc_emac_open,
619 .ndo_stop = arc_emac_stop,
620 .ndo_start_xmit = arc_emac_tx,
621 .ndo_set_mac_address = arc_emac_set_address,
622 .ndo_get_stats = arc_emac_stats,
623};
624
625static int arc_emac_probe(struct platform_device *pdev)
626{
627 struct resource res_regs;
628 struct device_node *phy_node;
629 struct arc_emac_priv *priv;
630 struct net_device *ndev;
631 const char *mac_addr;
632 unsigned int id, clock_frequency, irq;
633 int err;
634
635 if (!pdev->dev.of_node)
636 return -ENODEV;
637
638 /* Get PHY from device tree */
639 phy_node = of_parse_phandle(pdev->dev.of_node, "phy", 0);
640 if (!phy_node) {
641 dev_err(&pdev->dev, "failed to retrieve phy description from device tree\n");
642 return -ENODEV;
643 }
644
645 /* Get EMAC registers base address from device tree */
646 err = of_address_to_resource(pdev->dev.of_node, 0, &res_regs);
647 if (err) {
648 dev_err(&pdev->dev, "failed to retrieve registers base from device tree\n");
649 return -ENODEV;
650 }
651
652 /* Get IRQ from device tree */
653 irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
654 if (!irq) {
655 dev_err(&pdev->dev, "failed to retrieve <irq> value from device tree\n");
656 return -ENODEV;
657 }
658
659 ndev = alloc_etherdev(sizeof(struct arc_emac_priv));
660 if (!ndev)
661 return -ENOMEM;
662
663 platform_set_drvdata(pdev, ndev);
664 SET_NETDEV_DEV(ndev, &pdev->dev);
665
666 ndev->netdev_ops = &arc_emac_netdev_ops;
667 ndev->ethtool_ops = &arc_emac_ethtool_ops;
668 ndev->watchdog_timeo = TX_TIMEOUT;
669 /* FIXME :: no multicast support yet */
670 ndev->flags &= ~IFF_MULTICAST;
671
672 priv = netdev_priv(ndev);
673 priv->dev = &pdev->dev;
674 priv->ndev = ndev;
675
676 priv->regs = devm_ioremap_resource(&pdev->dev, &res_regs);
677 if (IS_ERR(priv->regs)) {
678 err = PTR_ERR(priv->regs);
679 goto out_netdev;
680 }
681 dev_dbg(&pdev->dev, "Registers base address is 0x%p\n", priv->regs);
682
683 priv->clk = of_clk_get(pdev->dev.of_node, 0);
684 if (IS_ERR(priv->clk)) {
685 /* Get CPU clock frequency from device tree */
686 if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
687 &clock_frequency)) {
688 dev_err(&pdev->dev, "failed to retrieve <clock-frequency> from device tree\n");
689 err = -EINVAL;
690 goto out_netdev;
691 }
692 } else {
693 err = clk_prepare_enable(priv->clk);
694 if (err) {
695 dev_err(&pdev->dev, "failed to enable clock\n");
696 goto out_clkget;
697 }
698
699 clock_frequency = clk_get_rate(priv->clk);
700 }
701
702 id = arc_reg_get(priv, R_ID);
703
704 /* Check for EMAC revision 5 or 7, magic number */
705 if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
706 dev_err(&pdev->dev, "ARC EMAC not detected, id=0x%x\n", id);
707 err = -ENODEV;
708 goto out_clken;
709 }
710 dev_info(&pdev->dev, "ARC EMAC detected with id: 0x%x\n", id);
711
712 /* Set poll rate so that it polls every 1 ms */
713 arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
714
715 ndev->irq = irq;
716 dev_info(&pdev->dev, "IRQ is %d\n", ndev->irq);
717
718 /* Register interrupt handler for device */
719 err = devm_request_irq(&pdev->dev, ndev->irq, arc_emac_intr, 0,
720 ndev->name, ndev);
721 if (err) {
722 dev_err(&pdev->dev, "could not allocate IRQ\n");
723 goto out_clken;
724 }
725
726 /* Get MAC address from device tree */
727 mac_addr = of_get_mac_address(pdev->dev.of_node);
728
729 if (mac_addr)
730 memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
731 else
732 eth_hw_addr_random(ndev);
733
734 arc_emac_set_address_internal(ndev);
735 dev_info(&pdev->dev, "MAC address is now %pM\n", ndev->dev_addr);
736
737 /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
738 priv->rxbd = dmam_alloc_coherent(&pdev->dev, RX_RING_SZ + TX_RING_SZ,
739 &priv->rxbd_dma, GFP_KERNEL);
740
741 if (!priv->rxbd) {
742 dev_err(&pdev->dev, "failed to allocate data buffers\n");
743 err = -ENOMEM;
744 goto out_clken;
745 }
746
747 priv->txbd = priv->rxbd + RX_BD_NUM;
748
749 priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
750 dev_dbg(&pdev->dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
751 (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
752
753 err = arc_mdio_probe(pdev, priv);
754 if (err) {
755 dev_err(&pdev->dev, "failed to probe MII bus\n");
756 goto out_clken;
757 }
758
759 priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
760 PHY_INTERFACE_MODE_MII);
761 if (!priv->phy_dev) {
762 dev_err(&pdev->dev, "of_phy_connect() failed\n");
763 err = -ENODEV;
764 goto out_mdio;
765 }
766
767 dev_info(&pdev->dev, "connected to %s phy with id 0x%x\n",
768 priv->phy_dev->drv->name, priv->phy_dev->phy_id);
769
770 netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
771
772 err = register_netdev(ndev);
773 if (err) {
774 dev_err(&pdev->dev, "failed to register network device\n");
775 goto out_netif_api;
776 }
777
778 return 0;
779
780out_netif_api:
781 netif_napi_del(&priv->napi);
782 phy_disconnect(priv->phy_dev);
783 priv->phy_dev = NULL;
784out_mdio:
785 arc_mdio_remove(priv);
786out_clken:
787 if (!IS_ERR(priv->clk))
788 clk_disable_unprepare(priv->clk);
789out_clkget:
790 if (!IS_ERR(priv->clk))
791 clk_put(priv->clk);
792out_netdev:
793 free_netdev(ndev);
794 return err;
795}
796
797static int arc_emac_remove(struct platform_device *pdev)
798{
799 struct net_device *ndev = platform_get_drvdata(pdev);
800 struct arc_emac_priv *priv = netdev_priv(ndev);
801
802 phy_disconnect(priv->phy_dev);
803 priv->phy_dev = NULL;
804 arc_mdio_remove(priv);
805 unregister_netdev(ndev);
806 netif_napi_del(&priv->napi);
807
808 if (!IS_ERR(priv->clk)) {
809 clk_disable_unprepare(priv->clk);
810 clk_put(priv->clk);
811 }
812
813 free_netdev(ndev);
814
815 return 0;
816}
817
818static const struct of_device_id arc_emac_dt_ids[] = {
819 { .compatible = "snps,arc-emac" },
820 { /* Sentinel */ }
821};
822MODULE_DEVICE_TABLE(of, arc_emac_dt_ids);
823
824static struct platform_driver arc_emac_driver = {
825 .probe = arc_emac_probe,
826 .remove = arc_emac_remove,
827 .driver = {
828 .name = DRV_NAME,
829 .owner = THIS_MODULE,
830 .of_match_table = arc_emac_dt_ids,
831 },
832};
833
834module_platform_driver(arc_emac_driver);
835
836MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
837MODULE_DESCRIPTION("ARC EMAC driver");
838MODULE_LICENSE("GPL");