1/*
 2 *
 3 * Intel Management Engine Interface (Intel MEI) Linux driver
 4 * Copyright (c) 2013-2014, Intel Corporation.
 5 *
 6 * This program is free software; you can redistribute it and/or modify it
 7 * under the terms and conditions of the GNU General Public License,
 8 * version 2, as published by the Free Software Foundation.
 9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#ifndef _MEI_HW_TXE_H_
18#define _MEI_HW_TXE_H_
19
20#include <linux/irqreturn.h>
21
22#include "hw.h"
23#include "hw-txe-regs.h"
24
25/* Flatten Hierarchy interrupt cause */
26#define TXE_INTR_READINESS_BIT  0 /* HISR_INT_0_STS */
27#define TXE_INTR_READINESS      HISR_INT_0_STS
28#define TXE_INTR_ALIVENESS_BIT  1 /* HISR_INT_1_STS */
29#define TXE_INTR_ALIVENESS      HISR_INT_1_STS
30#define TXE_INTR_OUT_DB_BIT     2 /* HISR_INT_2_STS */
31#define TXE_INTR_OUT_DB         HISR_INT_2_STS
32#define TXE_INTR_IN_READY_BIT   8 /* beyond HISR */
33#define TXE_INTR_IN_READY       BIT(8)
34
35/**
36 * struct mei_txe_hw - txe hardware specifics
37 *
38 * @mem_addr:        SeC and BRIDGE bars
39 * @aliveness:       aliveness (power gating) state of the hardware
40 * @readiness:       readiness state of the hardware
41 * @wait_aliveness:  aliveness wait queue
42 * @recvd_aliveness: aliveness interrupt was recived
43 * @intr_cause:      translated interrupt cause
44 */
45struct mei_txe_hw {
46	void __iomem *mem_addr[NUM_OF_MEM_BARS];
47	u32 aliveness;
48	u32 readiness;
49	u32 slots;
50
51	wait_queue_head_t wait_aliveness;
52	bool recvd_aliveness;
53
54	unsigned long intr_cause;
55};
56
57#define to_txe_hw(dev) (struct mei_txe_hw *)((dev)->hw)
58
59static inline struct mei_device *hw_txe_to_mei(struct mei_txe_hw *hw)
60{
61	return container_of((void *)hw, struct mei_device, hw);
62}
63
64struct mei_device *mei_txe_dev_init(struct pci_dev *pdev);
65
66irqreturn_t mei_txe_irq_quick_handler(int irq, void *dev_id);
67irqreturn_t mei_txe_irq_thread_handler(int irq, void *dev_id);
68
69int mei_txe_aliveness_set_sync(struct mei_device *dev, u32 req);
70
71int mei_txe_setup_satt2(struct mei_device *dev, phys_addr_t addr, u32 range);
72
73
74#endif /* _MEI_HW_TXE_H_ */