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v3.1
 
 
 
 1config CLKSRC_I8253
 2	bool
 3
 4config CLKEVT_I8253
 5	bool
 6
 7config I8253_LOCK
 8	bool
 9
10config CLKBLD_I8253
11	def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
12
13config CLKSRC_MMIO
14	bool
15
16config DW_APB_TIMER
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
17	bool
v3.15
  1config CLKSRC_OF
  2	bool
  3
  4config CLKSRC_I8253
  5	bool
  6
  7config CLKEVT_I8253
  8	bool
  9
 10config I8253_LOCK
 11	bool
 12
 13config CLKBLD_I8253
 14	def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
 15
 16config CLKSRC_MMIO
 17	bool
 18
 19config DW_APB_TIMER
 20	bool
 21
 22config DW_APB_TIMER_OF
 23	bool
 24	select DW_APB_TIMER
 25	select CLKSRC_OF
 26
 27config ARMADA_370_XP_TIMER
 28	bool
 29	select CLKSRC_OF
 30
 31config ORION_TIMER
 32	select CLKSRC_OF
 33	select CLKSRC_MMIO
 34	bool
 35
 36config SUN4I_TIMER
 37	select CLKSRC_MMIO
 38	bool
 39
 40config SUN5I_HSTIMER
 41	select CLKSRC_MMIO
 42	bool
 43
 44config VT8500_TIMER
 45	bool
 46
 47config CADENCE_TTC_TIMER
 48	bool
 49
 50config CLKSRC_NOMADIK_MTU
 51	bool
 52	depends on (ARCH_NOMADIK || ARCH_U8500)
 53	select CLKSRC_MMIO
 54	help
 55	  Support for Multi Timer Unit. MTU provides access
 56	  to multiple interrupt generating programmable
 57	  32-bit free running decrementing counters.
 58
 59config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
 60	bool
 61	depends on CLKSRC_NOMADIK_MTU
 62	help
 63	  Use the Multi Timer Unit as the sched_clock.
 64
 65config CLKSRC_DBX500_PRCMU
 66	bool "Clocksource PRCMU Timer"
 67	depends on UX500_SOC_DB8500
 68	default y
 69	help
 70	  Use the always on PRCMU Timer as clocksource
 71
 72config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
 73	bool "Clocksource PRCMU Timer sched_clock"
 74	depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
 75	default y
 76	help
 77	  Use the always on PRCMU Timer as sched_clock
 78
 79config CLKSRC_EFM32
 80	bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
 81	depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
 82	select CLKSRC_MMIO
 83	default ARCH_EFM32
 84	help
 85	  Support to use the timers of EFM32 SoCs as clock source and clock
 86	  event device.
 87
 88config ARM_ARCH_TIMER
 89	bool
 90	select CLKSRC_OF if OF
 91
 92config ARM_ARCH_TIMER_EVTSTREAM
 93	bool "Support for ARM architected timer event stream generation"
 94	default y if ARM_ARCH_TIMER
 95	depends on ARM_ARCH_TIMER
 96	help
 97	  This option enables support for event stream generation based on
 98	  the ARM architected timer. It is used for waking up CPUs executing
 99	  the wfe instruction at a frequency represented as a power-of-2
100	  divisor of the clock rate.
101	  The main use of the event stream is wfe-based timeouts of userspace
102	  locking implementations. It might also be useful for imposing timeout
103	  on wfe to safeguard against any programming errors in case an expected
104	  event is not generated.
105	  This must be disabled for hardware validation purposes to detect any
106	  hardware anomalies of missing events.
107
108config ARM_GLOBAL_TIMER
109	bool
110	select CLKSRC_OF if OF
111	help
112	  This options enables support for the ARM global timer unit
113
114config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
115	bool
116	depends on ARM_GLOBAL_TIMER
117	default y
118	help
119	 Use ARM global timer clock source as sched_clock
120
121config CLKSRC_METAG_GENERIC
122	def_bool y if METAG
123	help
124	  This option enables support for the Meta per-thread timers.
125
126config CLKSRC_EXYNOS_MCT
127	def_bool y if ARCH_EXYNOS
128	help
129	  Support for Multi Core Timer controller on Exynos SoCs.
130
131config CLKSRC_SAMSUNG_PWM
132	bool
133	help
134	  This is a new clocksource driver for the PWM timer found in
135	  Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
136	  for all devicetree enabled platforms. This driver will be
137	  needed only on systems that do not have the Exynos MCT available.
138
139config VF_PIT_TIMER
140	bool
141	help
142	  Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
143
144config SYS_SUPPORTS_SH_CMT
145        bool
146
147config SYS_SUPPORTS_SH_MTU2
148        bool
149
150config SYS_SUPPORTS_SH_TMU
151        bool
152
153config SYS_SUPPORTS_EM_STI
154        bool
155
156config SH_TIMER_CMT
157	bool "Renesas CMT timer driver" if COMPILE_TEST
158	depends on GENERIC_CLOCKEVENTS
159	default SYS_SUPPORTS_SH_CMT
160	help
161	  This enables build of a clocksource and clockevent driver for
162	  the Compare Match Timer (CMT) hardware available in 16/32/48-bit
163	  variants on a wide range of Mobile and Automotive SoCs from Renesas.
164
165config SH_TIMER_MTU2
166	bool "Renesas MTU2 timer driver" if COMPILE_TEST
167	depends on GENERIC_CLOCKEVENTS
168	default SYS_SUPPORTS_SH_MTU2
169	help
170	  This enables build of a clockevent driver for the Multi-Function
171	  Timer Pulse Unit 2 (TMU2) hardware available on SoCs from Renesas.
172	  This hardware comes with 16 bit-timer registers.
173
174config SH_TIMER_TMU
175	bool "Renesas TMU timer driver" if COMPILE_TEST
176	depends on GENERIC_CLOCKEVENTS
177	default SYS_SUPPORTS_SH_TMU
178	help
179	  This enables build of a clocksource and clockevent driver for
180	  the 32-bit Timer Unit (TMU) hardware available on a wide range
181	  SoCs from Renesas.
182
183config EM_TIMER_STI
184	bool "Renesas STI timer driver" if COMPILE_TEST
185	depends on GENERIC_CLOCKEVENTS
186	default SYS_SUPPORTS_EM_STI
187	help
188	  This enables build of a clocksource and clockevent driver for
189	  the 48-bit System Timer (STI) hardware available on a SoCs
190	  such as EMEV2 from former NEC Electronics.
191
192config CLKSRC_QCOM
193	bool