Loading...
1/*
2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
6 * 0xcf8 PCI configuration read/write.
7 *
8 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
9 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
10 * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
11 */
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <linux/acpi.h>
16
17#include <linux/io.h>
18#include <asm/io_apic.h>
19#include <asm/pci_x86.h>
20
21#include <asm/xen/hypervisor.h>
22
23#include <xen/features.h>
24#include <xen/events.h>
25#include <asm/xen/pci.h>
26
27static int xen_pcifront_enable_irq(struct pci_dev *dev)
28{
29 int rc;
30 int share = 1;
31 int pirq;
32 u8 gsi;
33
34 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
35 if (rc < 0) {
36 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
37 rc);
38 return rc;
39 }
40 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
41 pirq = gsi;
42
43 if (gsi < NR_IRQS_LEGACY)
44 share = 0;
45
46 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
47 if (rc < 0) {
48 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
49 gsi, pirq, rc);
50 return rc;
51 }
52
53 dev->irq = rc;
54 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
55 return 0;
56}
57
58#ifdef CONFIG_ACPI
59static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
60 bool set_pirq)
61{
62 int rc, pirq = -1, irq = -1;
63 struct physdev_map_pirq map_irq;
64 int shareable = 0;
65 char *name;
66
67 if (set_pirq)
68 pirq = gsi;
69
70 map_irq.domid = DOMID_SELF;
71 map_irq.type = MAP_PIRQ_TYPE_GSI;
72 map_irq.index = gsi;
73 map_irq.pirq = pirq;
74
75 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
76 if (rc) {
77 printk(KERN_WARNING "xen map irq failed %d\n", rc);
78 return -1;
79 }
80
81 if (triggering == ACPI_EDGE_SENSITIVE) {
82 shareable = 0;
83 name = "ioapic-edge";
84 } else {
85 shareable = 1;
86 name = "ioapic-level";
87 }
88
89 if (gsi_override >= 0)
90 gsi = gsi_override;
91
92 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
93 if (irq < 0)
94 goto out;
95
96 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
97out:
98 return irq;
99}
100
101static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
102 int trigger, int polarity)
103{
104 if (!xen_hvm_domain())
105 return -1;
106
107 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
108 false /* no mapping of GSI to PIRQ */);
109}
110
111#ifdef CONFIG_XEN_DOM0
112static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
113{
114 int rc, irq;
115 struct physdev_setup_gsi setup_gsi;
116
117 if (!xen_pv_domain())
118 return -1;
119
120 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
121 gsi, triggering, polarity);
122
123 irq = xen_register_pirq(gsi, gsi_override, triggering, true);
124
125 setup_gsi.gsi = gsi;
126 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
127 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
128
129 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
130 if (rc == -EEXIST)
131 printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
132 else if (rc) {
133 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
134 gsi, rc);
135 }
136
137 return irq;
138}
139
140static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
141 int trigger, int polarity)
142{
143 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
144}
145#endif
146#endif
147
148#if defined(CONFIG_PCI_MSI)
149#include <linux/msi.h>
150#include <asm/msidef.h>
151
152struct xen_pci_frontend_ops *xen_pci_frontend;
153EXPORT_SYMBOL_GPL(xen_pci_frontend);
154
155static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
156{
157 int irq, ret, i;
158 struct msi_desc *msidesc;
159 int *v;
160
161 v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
162 if (!v)
163 return -ENOMEM;
164
165 if (type == PCI_CAP_ID_MSIX)
166 ret = xen_pci_frontend_enable_msix(dev, v, nvec);
167 else
168 ret = xen_pci_frontend_enable_msi(dev, v);
169 if (ret)
170 goto error;
171 i = 0;
172 list_for_each_entry(msidesc, &dev->msi_list, list) {
173 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0,
174 (type == PCI_CAP_ID_MSIX) ?
175 "pcifront-msi-x" :
176 "pcifront-msi",
177 DOMID_SELF);
178 if (irq < 0)
179 goto free;
180 i++;
181 }
182 kfree(v);
183 return 0;
184
185error:
186 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
187free:
188 kfree(v);
189 return ret;
190}
191
192#define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
193 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
194
195static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
196 struct msi_msg *msg)
197{
198 /* We set vector == 0 to tell the hypervisor we don't care about it,
199 * but we want a pirq setup instead.
200 * We use the dest_id field to pass the pirq that we want. */
201 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
202 msg->address_lo =
203 MSI_ADDR_BASE_LO |
204 MSI_ADDR_DEST_MODE_PHYSICAL |
205 MSI_ADDR_REDIRECTION_CPU |
206 MSI_ADDR_DEST_ID(pirq);
207
208 msg->data = XEN_PIRQ_MSI_DATA;
209}
210
211static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
212{
213 int irq, pirq;
214 struct msi_desc *msidesc;
215 struct msi_msg msg;
216
217 list_for_each_entry(msidesc, &dev->msi_list, list) {
218 __read_msi_msg(msidesc, &msg);
219 pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
220 ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
221 if (msg.data != XEN_PIRQ_MSI_DATA ||
222 xen_irq_from_pirq(pirq) < 0) {
223 pirq = xen_allocate_pirq_msi(dev, msidesc);
224 if (pirq < 0)
225 goto error;
226 xen_msi_compose_msg(dev, pirq, &msg);
227 __write_msi_msg(msidesc, &msg);
228 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
229 } else {
230 dev_dbg(&dev->dev,
231 "xen: msi already bound to pirq=%d\n", pirq);
232 }
233 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0,
234 (type == PCI_CAP_ID_MSIX) ?
235 "msi-x" : "msi",
236 DOMID_SELF);
237 if (irq < 0)
238 goto error;
239 dev_dbg(&dev->dev,
240 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
241 }
242 return 0;
243
244error:
245 dev_err(&dev->dev,
246 "Xen PCI frontend has not registered MSI/MSI-X support!\n");
247 return -ENODEV;
248}
249
250#ifdef CONFIG_XEN_DOM0
251static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
252{
253 int ret = 0;
254 struct msi_desc *msidesc;
255
256 list_for_each_entry(msidesc, &dev->msi_list, list) {
257 struct physdev_map_pirq map_irq;
258 domid_t domid;
259
260 domid = ret = xen_find_device_domain_owner(dev);
261 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
262 * hence check ret value for < 0. */
263 if (ret < 0)
264 domid = DOMID_SELF;
265
266 memset(&map_irq, 0, sizeof(map_irq));
267 map_irq.domid = domid;
268 map_irq.type = MAP_PIRQ_TYPE_MSI;
269 map_irq.index = -1;
270 map_irq.pirq = -1;
271 map_irq.bus = dev->bus->number;
272 map_irq.devfn = dev->devfn;
273
274 if (type == PCI_CAP_ID_MSIX) {
275 int pos;
276 u32 table_offset, bir;
277
278 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
279
280 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
281 &table_offset);
282 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
283
284 map_irq.table_base = pci_resource_start(dev, bir);
285 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
286 }
287
288 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
289 if (ret) {
290 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
291 ret, domid);
292 goto out;
293 }
294
295 ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
296 map_irq.pirq, map_irq.index,
297 (type == PCI_CAP_ID_MSIX) ?
298 "msi-x" : "msi",
299 domid);
300 if (ret < 0)
301 goto out;
302 }
303 ret = 0;
304out:
305 return ret;
306}
307#endif
308
309static void xen_teardown_msi_irqs(struct pci_dev *dev)
310{
311 struct msi_desc *msidesc;
312
313 msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
314 if (msidesc->msi_attrib.is_msix)
315 xen_pci_frontend_disable_msix(dev);
316 else
317 xen_pci_frontend_disable_msi(dev);
318
319 /* Free the IRQ's and the msidesc using the generic code. */
320 default_teardown_msi_irqs(dev);
321}
322
323static void xen_teardown_msi_irq(unsigned int irq)
324{
325 xen_destroy_irq(irq);
326}
327
328#endif
329
330int __init pci_xen_init(void)
331{
332 if (!xen_pv_domain() || xen_initial_domain())
333 return -ENODEV;
334
335 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
336
337 pcibios_set_cache_line_size();
338
339 pcibios_enable_irq = xen_pcifront_enable_irq;
340 pcibios_disable_irq = NULL;
341
342#ifdef CONFIG_ACPI
343 /* Keep ACPI out of the picture */
344 acpi_noirq = 1;
345#endif
346
347#ifdef CONFIG_PCI_MSI
348 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
349 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
350 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
351#endif
352 return 0;
353}
354
355int __init pci_xen_hvm_init(void)
356{
357 if (!xen_feature(XENFEAT_hvm_pirqs))
358 return 0;
359
360#ifdef CONFIG_ACPI
361 /*
362 * We don't want to change the actual ACPI delivery model,
363 * just how GSIs get registered.
364 */
365 __acpi_register_gsi = acpi_register_gsi_xen_hvm;
366#endif
367
368#ifdef CONFIG_PCI_MSI
369 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
370 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
371#endif
372 return 0;
373}
374
375#ifdef CONFIG_XEN_DOM0
376static __init void xen_setup_acpi_sci(void)
377{
378 int rc;
379 int trigger, polarity;
380 int gsi = acpi_sci_override_gsi;
381 int irq = -1;
382 int gsi_override = -1;
383
384 if (!gsi)
385 return;
386
387 rc = acpi_get_override_irq(gsi, &trigger, &polarity);
388 if (rc) {
389 printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
390 " sci, rc=%d\n", rc);
391 return;
392 }
393 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
394 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
395
396 printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
397 "polarity=%d\n", gsi, trigger, polarity);
398
399 /* Before we bind the GSI to a Linux IRQ, check whether
400 * we need to override it with bus_irq (IRQ) value. Usually for
401 * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
402 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
403 * but there are oddballs where the IRQ != GSI:
404 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
405 * which ends up being: gsi_to_irq[9] == 20
406 * (which is what acpi_gsi_to_irq ends up calling when starting the
407 * the ACPI interpreter and keels over since IRQ 9 has not been
408 * setup as we had setup IRQ 20 for it).
409 */
410 if (acpi_gsi_to_irq(gsi, &irq) == 0) {
411 /* Use the provided value if it's valid. */
412 if (irq >= 0)
413 gsi_override = irq;
414 }
415
416 gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
417 printk(KERN_INFO "xen: acpi sci %d\n", gsi);
418
419 return;
420}
421
422int __init pci_xen_initial_domain(void)
423{
424 int irq;
425
426#ifdef CONFIG_PCI_MSI
427 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
428 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
429#endif
430 xen_setup_acpi_sci();
431 __acpi_register_gsi = acpi_register_gsi_xen;
432 /* Pre-allocate legacy irqs */
433 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
434 int trigger, polarity;
435
436 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
437 continue;
438
439 xen_register_pirq(irq, -1 /* no GSI override */,
440 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
441 true /* Map GSI to PIRQ */);
442 }
443 if (0 == nr_ioapics) {
444 for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
445 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
446 }
447 return 0;
448}
449
450struct xen_device_domain_owner {
451 domid_t domain;
452 struct pci_dev *dev;
453 struct list_head list;
454};
455
456static DEFINE_SPINLOCK(dev_domain_list_spinlock);
457static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
458
459static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
460{
461 struct xen_device_domain_owner *owner;
462
463 list_for_each_entry(owner, &dev_domain_list, list) {
464 if (owner->dev == dev)
465 return owner;
466 }
467 return NULL;
468}
469
470int xen_find_device_domain_owner(struct pci_dev *dev)
471{
472 struct xen_device_domain_owner *owner;
473 int domain = -ENODEV;
474
475 spin_lock(&dev_domain_list_spinlock);
476 owner = find_device(dev);
477 if (owner)
478 domain = owner->domain;
479 spin_unlock(&dev_domain_list_spinlock);
480 return domain;
481}
482EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
483
484int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
485{
486 struct xen_device_domain_owner *owner;
487
488 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
489 if (!owner)
490 return -ENODEV;
491
492 spin_lock(&dev_domain_list_spinlock);
493 if (find_device(dev)) {
494 spin_unlock(&dev_domain_list_spinlock);
495 kfree(owner);
496 return -EEXIST;
497 }
498 owner->domain = domain;
499 owner->dev = dev;
500 list_add_tail(&owner->list, &dev_domain_list);
501 spin_unlock(&dev_domain_list_spinlock);
502 return 0;
503}
504EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
505
506int xen_unregister_device_domain_owner(struct pci_dev *dev)
507{
508 struct xen_device_domain_owner *owner;
509
510 spin_lock(&dev_domain_list_spinlock);
511 owner = find_device(dev);
512 if (!owner) {
513 spin_unlock(&dev_domain_list_spinlock);
514 return -ENODEV;
515 }
516 list_del(&owner->list);
517 spin_unlock(&dev_domain_list_spinlock);
518 kfree(owner);
519 return 0;
520}
521EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
522#endif
1/*
2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
6 * 0xcf8 PCI configuration read/write.
7 *
8 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
9 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
10 * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
11 */
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <linux/acpi.h>
16
17#include <linux/io.h>
18#include <asm/io_apic.h>
19#include <asm/pci_x86.h>
20
21#include <asm/xen/hypervisor.h>
22
23#include <xen/features.h>
24#include <xen/events.h>
25#include <asm/xen/pci.h>
26
27static int xen_pcifront_enable_irq(struct pci_dev *dev)
28{
29 int rc;
30 int share = 1;
31 int pirq;
32 u8 gsi;
33
34 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
35 if (rc < 0) {
36 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
37 rc);
38 return rc;
39 }
40 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
41 pirq = gsi;
42
43 if (gsi < NR_IRQS_LEGACY)
44 share = 0;
45
46 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
47 if (rc < 0) {
48 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
49 gsi, pirq, rc);
50 return rc;
51 }
52
53 dev->irq = rc;
54 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
55 return 0;
56}
57
58#ifdef CONFIG_ACPI
59static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
60 bool set_pirq)
61{
62 int rc, pirq = -1, irq = -1;
63 struct physdev_map_pirq map_irq;
64 int shareable = 0;
65 char *name;
66
67 irq = xen_irq_from_gsi(gsi);
68 if (irq > 0)
69 return irq;
70
71 if (set_pirq)
72 pirq = gsi;
73
74 map_irq.domid = DOMID_SELF;
75 map_irq.type = MAP_PIRQ_TYPE_GSI;
76 map_irq.index = gsi;
77 map_irq.pirq = pirq;
78
79 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
80 if (rc) {
81 printk(KERN_WARNING "xen map irq failed %d\n", rc);
82 return -1;
83 }
84
85 if (triggering == ACPI_EDGE_SENSITIVE) {
86 shareable = 0;
87 name = "ioapic-edge";
88 } else {
89 shareable = 1;
90 name = "ioapic-level";
91 }
92
93 if (gsi_override >= 0)
94 gsi = gsi_override;
95
96 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
97 if (irq < 0)
98 goto out;
99
100 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
101out:
102 return irq;
103}
104
105static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
106 int trigger, int polarity)
107{
108 if (!xen_hvm_domain())
109 return -1;
110
111 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
112 false /* no mapping of GSI to PIRQ */);
113}
114
115#ifdef CONFIG_XEN_DOM0
116static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
117{
118 int rc, irq;
119 struct physdev_setup_gsi setup_gsi;
120
121 if (!xen_pv_domain())
122 return -1;
123
124 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
125 gsi, triggering, polarity);
126
127 irq = xen_register_pirq(gsi, gsi_override, triggering, true);
128
129 setup_gsi.gsi = gsi;
130 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
131 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
132
133 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
134 if (rc == -EEXIST)
135 printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
136 else if (rc) {
137 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
138 gsi, rc);
139 }
140
141 return irq;
142}
143
144static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
145 int trigger, int polarity)
146{
147 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
148}
149#endif
150#endif
151
152#if defined(CONFIG_PCI_MSI)
153#include <linux/msi.h>
154#include <asm/msidef.h>
155
156struct xen_pci_frontend_ops *xen_pci_frontend;
157EXPORT_SYMBOL_GPL(xen_pci_frontend);
158
159static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
160{
161 int irq, ret, i;
162 struct msi_desc *msidesc;
163 int *v;
164
165 if (type == PCI_CAP_ID_MSI && nvec > 1)
166 return 1;
167
168 v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
169 if (!v)
170 return -ENOMEM;
171
172 if (type == PCI_CAP_ID_MSIX)
173 ret = xen_pci_frontend_enable_msix(dev, v, nvec);
174 else
175 ret = xen_pci_frontend_enable_msi(dev, v);
176 if (ret)
177 goto error;
178 i = 0;
179 list_for_each_entry(msidesc, &dev->msi_list, list) {
180 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
181 (type == PCI_CAP_ID_MSI) ? nvec : 1,
182 (type == PCI_CAP_ID_MSIX) ?
183 "pcifront-msi-x" :
184 "pcifront-msi",
185 DOMID_SELF);
186 if (irq < 0) {
187 ret = irq;
188 goto free;
189 }
190 i++;
191 }
192 kfree(v);
193 return 0;
194
195error:
196 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
197free:
198 kfree(v);
199 return ret;
200}
201
202#define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
203 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
204
205static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
206 struct msi_msg *msg)
207{
208 /* We set vector == 0 to tell the hypervisor we don't care about it,
209 * but we want a pirq setup instead.
210 * We use the dest_id field to pass the pirq that we want. */
211 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
212 msg->address_lo =
213 MSI_ADDR_BASE_LO |
214 MSI_ADDR_DEST_MODE_PHYSICAL |
215 MSI_ADDR_REDIRECTION_CPU |
216 MSI_ADDR_DEST_ID(pirq);
217
218 msg->data = XEN_PIRQ_MSI_DATA;
219}
220
221static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
222{
223 int irq, pirq;
224 struct msi_desc *msidesc;
225 struct msi_msg msg;
226
227 if (type == PCI_CAP_ID_MSI && nvec > 1)
228 return 1;
229
230 list_for_each_entry(msidesc, &dev->msi_list, list) {
231 __read_msi_msg(msidesc, &msg);
232 pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
233 ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
234 if (msg.data != XEN_PIRQ_MSI_DATA ||
235 xen_irq_from_pirq(pirq) < 0) {
236 pirq = xen_allocate_pirq_msi(dev, msidesc);
237 if (pirq < 0) {
238 irq = -ENODEV;
239 goto error;
240 }
241 xen_msi_compose_msg(dev, pirq, &msg);
242 __write_msi_msg(msidesc, &msg);
243 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
244 } else {
245 dev_dbg(&dev->dev,
246 "xen: msi already bound to pirq=%d\n", pirq);
247 }
248 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
249 (type == PCI_CAP_ID_MSI) ? nvec : 1,
250 (type == PCI_CAP_ID_MSIX) ?
251 "msi-x" : "msi",
252 DOMID_SELF);
253 if (irq < 0)
254 goto error;
255 dev_dbg(&dev->dev,
256 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
257 }
258 return 0;
259
260error:
261 dev_err(&dev->dev,
262 "Xen PCI frontend has not registered MSI/MSI-X support!\n");
263 return irq;
264}
265
266#ifdef CONFIG_XEN_DOM0
267static bool __read_mostly pci_seg_supported = true;
268
269static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
270{
271 int ret = 0;
272 struct msi_desc *msidesc;
273
274 list_for_each_entry(msidesc, &dev->msi_list, list) {
275 struct physdev_map_pirq map_irq;
276 domid_t domid;
277
278 domid = ret = xen_find_device_domain_owner(dev);
279 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
280 * hence check ret value for < 0. */
281 if (ret < 0)
282 domid = DOMID_SELF;
283
284 memset(&map_irq, 0, sizeof(map_irq));
285 map_irq.domid = domid;
286 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
287 map_irq.index = -1;
288 map_irq.pirq = -1;
289 map_irq.bus = dev->bus->number |
290 (pci_domain_nr(dev->bus) << 16);
291 map_irq.devfn = dev->devfn;
292
293 if (type == PCI_CAP_ID_MSI && nvec > 1) {
294 map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
295 map_irq.entry_nr = nvec;
296 } else if (type == PCI_CAP_ID_MSIX) {
297 int pos;
298 u32 table_offset, bir;
299
300 pos = dev->msix_cap;
301 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
302 &table_offset);
303 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
304
305 map_irq.table_base = pci_resource_start(dev, bir);
306 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
307 }
308
309 ret = -EINVAL;
310 if (pci_seg_supported)
311 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
312 &map_irq);
313 if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
314 /*
315 * If MAP_PIRQ_TYPE_MULTI_MSI is not available
316 * there's nothing else we can do in this case.
317 * Just set ret > 0 so driver can retry with
318 * single MSI.
319 */
320 ret = 1;
321 goto out;
322 }
323 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
324 map_irq.type = MAP_PIRQ_TYPE_MSI;
325 map_irq.index = -1;
326 map_irq.pirq = -1;
327 map_irq.bus = dev->bus->number;
328 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
329 &map_irq);
330 if (ret != -EINVAL)
331 pci_seg_supported = false;
332 }
333 if (ret) {
334 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
335 ret, domid);
336 goto out;
337 }
338
339 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
340 (type == PCI_CAP_ID_MSI) ? nvec : 1,
341 (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
342 domid);
343 if (ret < 0)
344 goto out;
345 }
346 ret = 0;
347out:
348 return ret;
349}
350
351static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
352{
353 int ret = 0;
354
355 if (pci_seg_supported) {
356 struct physdev_pci_device restore_ext;
357
358 restore_ext.seg = pci_domain_nr(dev->bus);
359 restore_ext.bus = dev->bus->number;
360 restore_ext.devfn = dev->devfn;
361 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
362 &restore_ext);
363 if (ret == -ENOSYS)
364 pci_seg_supported = false;
365 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
366 }
367 if (!pci_seg_supported) {
368 struct physdev_restore_msi restore;
369
370 restore.bus = dev->bus->number;
371 restore.devfn = dev->devfn;
372 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
373 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
374 }
375}
376#endif
377
378static void xen_teardown_msi_irqs(struct pci_dev *dev)
379{
380 struct msi_desc *msidesc;
381
382 msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
383 if (msidesc->msi_attrib.is_msix)
384 xen_pci_frontend_disable_msix(dev);
385 else
386 xen_pci_frontend_disable_msi(dev);
387
388 /* Free the IRQ's and the msidesc using the generic code. */
389 default_teardown_msi_irqs(dev);
390}
391
392static void xen_teardown_msi_irq(unsigned int irq)
393{
394 xen_destroy_irq(irq);
395}
396static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
397{
398 return 0;
399}
400static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag)
401{
402 return 0;
403}
404#endif
405
406int __init pci_xen_init(void)
407{
408 if (!xen_pv_domain() || xen_initial_domain())
409 return -ENODEV;
410
411 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
412
413 pcibios_set_cache_line_size();
414
415 pcibios_enable_irq = xen_pcifront_enable_irq;
416 pcibios_disable_irq = NULL;
417
418#ifdef CONFIG_ACPI
419 /* Keep ACPI out of the picture */
420 acpi_noirq = 1;
421#endif
422
423#ifdef CONFIG_PCI_MSI
424 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
425 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
426 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
427 x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
428 x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
429#endif
430 return 0;
431}
432
433int __init pci_xen_hvm_init(void)
434{
435 if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
436 return 0;
437
438#ifdef CONFIG_ACPI
439 /*
440 * We don't want to change the actual ACPI delivery model,
441 * just how GSIs get registered.
442 */
443 __acpi_register_gsi = acpi_register_gsi_xen_hvm;
444#endif
445
446#ifdef CONFIG_PCI_MSI
447 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
448 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
449#endif
450 return 0;
451}
452
453#ifdef CONFIG_XEN_DOM0
454static __init void xen_setup_acpi_sci(void)
455{
456 int rc;
457 int trigger, polarity;
458 int gsi = acpi_sci_override_gsi;
459 int irq = -1;
460 int gsi_override = -1;
461
462 if (!gsi)
463 return;
464
465 rc = acpi_get_override_irq(gsi, &trigger, &polarity);
466 if (rc) {
467 printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
468 " sci, rc=%d\n", rc);
469 return;
470 }
471 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
472 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
473
474 printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
475 "polarity=%d\n", gsi, trigger, polarity);
476
477 /* Before we bind the GSI to a Linux IRQ, check whether
478 * we need to override it with bus_irq (IRQ) value. Usually for
479 * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
480 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
481 * but there are oddballs where the IRQ != GSI:
482 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
483 * which ends up being: gsi_to_irq[9] == 20
484 * (which is what acpi_gsi_to_irq ends up calling when starting the
485 * the ACPI interpreter and keels over since IRQ 9 has not been
486 * setup as we had setup IRQ 20 for it).
487 */
488 if (acpi_gsi_to_irq(gsi, &irq) == 0) {
489 /* Use the provided value if it's valid. */
490 if (irq >= 0)
491 gsi_override = irq;
492 }
493
494 gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
495 printk(KERN_INFO "xen: acpi sci %d\n", gsi);
496
497 return;
498}
499
500int __init pci_xen_initial_domain(void)
501{
502 int irq;
503
504#ifdef CONFIG_PCI_MSI
505 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
506 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
507 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
508 x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
509 x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
510#endif
511 xen_setup_acpi_sci();
512 __acpi_register_gsi = acpi_register_gsi_xen;
513 /* Pre-allocate legacy irqs */
514 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
515 int trigger, polarity;
516
517 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
518 continue;
519
520 xen_register_pirq(irq, -1 /* no GSI override */,
521 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
522 true /* Map GSI to PIRQ */);
523 }
524 if (0 == nr_ioapics) {
525 for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
526 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
527 }
528 return 0;
529}
530
531struct xen_device_domain_owner {
532 domid_t domain;
533 struct pci_dev *dev;
534 struct list_head list;
535};
536
537static DEFINE_SPINLOCK(dev_domain_list_spinlock);
538static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
539
540static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
541{
542 struct xen_device_domain_owner *owner;
543
544 list_for_each_entry(owner, &dev_domain_list, list) {
545 if (owner->dev == dev)
546 return owner;
547 }
548 return NULL;
549}
550
551int xen_find_device_domain_owner(struct pci_dev *dev)
552{
553 struct xen_device_domain_owner *owner;
554 int domain = -ENODEV;
555
556 spin_lock(&dev_domain_list_spinlock);
557 owner = find_device(dev);
558 if (owner)
559 domain = owner->domain;
560 spin_unlock(&dev_domain_list_spinlock);
561 return domain;
562}
563EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
564
565int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
566{
567 struct xen_device_domain_owner *owner;
568
569 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
570 if (!owner)
571 return -ENODEV;
572
573 spin_lock(&dev_domain_list_spinlock);
574 if (find_device(dev)) {
575 spin_unlock(&dev_domain_list_spinlock);
576 kfree(owner);
577 return -EEXIST;
578 }
579 owner->domain = domain;
580 owner->dev = dev;
581 list_add_tail(&owner->list, &dev_domain_list);
582 spin_unlock(&dev_domain_list_spinlock);
583 return 0;
584}
585EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
586
587int xen_unregister_device_domain_owner(struct pci_dev *dev)
588{
589 struct xen_device_domain_owner *owner;
590
591 spin_lock(&dev_domain_list_spinlock);
592 owner = find_device(dev);
593 if (!owner) {
594 spin_unlock(&dev_domain_list_spinlock);
595 return -ENODEV;
596 }
597 list_del(&owner->list);
598 spin_unlock(&dev_domain_list_spinlock);
599 kfree(owner);
600 return 0;
601}
602EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
603#endif